Abstract: Techniques for solar cell electrical characterization are provided. In one aspect, a solar testing device is provided. The device includes a solar simulator; and a continuous neutral density filter in front of the solar simulator having regions of varying light attenuation levels ranging from transparent to opaque, the continuous neutral density filter having an area sufficiently large to filter all light generated by the solar simulator, and wherein a position of the continuous neutral density filter relative to the solar simulator is variable so as to control a light intensity produced by the device. A solar cell electrical characterization system and a method for performing a solar cell electrical characterization are also provided.

Abstract: An electronic circuit includes a first oscillator, a second oscillator and ancillary circuitry. The first oscillator is configured to generate a first clock signal and has a first wake-up delay. The second oscillator is configured to generate a second clock signal and has a second wake-up delay that is shorter than the first wake-up delay. The ancillary circuitry is configured to provide the second clock signal as an output clock signal during wake-up of the first oscillator, and, following the first wake-up delay, to provide the first clock signal as the output clock signal.

Abstract: An oscillator comprising a support substrate, at least one transducer mounted on a first surface of the support substrate, and an integrated circuit element mounted on a second surface of the support substrate. The integrated circuit element includes first and second frequency generating components integrated therein. The first frequency generating component generates a first output frequency, and the second frequency generating component generates a second output frequency that is higher than the first output frequency. The oscillator also includes a ground terminal to which the second frequency generating component is closer than the first frequency generating component.

Abstract: Various emitters and emitter systems are disclosed. For instance, in various embodiments, an emitter can comprise a substrate, an insulator bonded to the substrate, a graphene layer bonded to the insulator, and a first electrical contact and a second electrical contact. The first electrical contact can be bonded over a first portion of the graphene layer, and the second electrical contact can be bonded over a second portion of the graphene layer. The graphene layer electrically couples the first electrical contact and the second electrical contact and is configured to receive the application of a pulsed input voltage between the first electrical contact and the second electrical contact and to radiate radio frequency (RF) energy. An emitter system can comprise a plurality of emitters, each disposed on a single integrated circuit.

Abstract: The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency.

Abstract: Aspects of this disclosure relate to dynamic error vector magnitude (DEVM) compensation. In one embodiment, an apparatus includes an amplifier, a low pass filter, and a bias circuit. The amplifier, such as a power amplifier, can amplify an input signal. The low pass filter, such as an integrator, can generate a correction signal based at least partly on an indication of a duty cycle of the amplifier. The indication of the duty cycle of the amplifier can be an enable signal for the amplifier, for example. The bias circuit can generate a bias signal based at least partly on the correction signal and provide the bias signal to the amplifier to bias the amplifier.

Abstract: A self-setting power supply monitors a supply current drawn by a power amplifier and sets a supply voltage based on the supply current to achieve efficient power operation. In order to maintain operation of the power amplifier above minimum operating conditions, the self-setting power supply sets the supply voltage to the minimum operating voltage when the supply current drops below a threshold bias current. When the supply current is above the threshold bias current, the self-setting power supply adjusts the supply voltage approximately proportionally to the supply current to maintain approximately constant gain of the power amplifier.

Abstract: A radio frequency power amplifier (RF PA) apparatus includes a first RF PA, a second RF PA, and a controller. The first RF PA is configured to deliver RF power to a load over a first range of RF power levels. The second RF PA is configured to deliver RF power to the load over a second range of RF power levels greater than the first range of RF power levels. The controller controls whether the first RF PA is delivering RF power to the load or the second RF PA is delivering RF power to the load, and is further configured to coordinate and control handoffs between the first and second RF PAs by varying magnitudes of input RF voltages applied to the RF input ports of the first and second RF PAs or by varying magnitudes of input bias voltages applied to the RF input ports of the first and second RF PAs.

Abstract: A power amplification module includes: a first transistor that amplifies a first radio frequency signal and outputs a second radio frequency signal; a second transistor that amplifies the second radio frequency signal and outputs a third radio frequency signal; and first and second bias circuits that supply first and second bias currents to bases of the first and second transistors. The first bias circuit includes a third transistor that outputs the first bias current from its emitter or source, a capacitor that is input with the first radio frequency signal and connected to the base of the first transistor, a first resistor connected between the emitter or source of the third transistor and the base of the first transistor, a second resistor connected between the capacitor and the emitter or source of the third transistor, and a third resistor connected between the capacitor and the base of the first transistor.

Abstract: A wideband highly linear amplifier includes a plurality of pre-distortion units for respectively linearizing digital signals of a plurality of bands, a synthesis unit for synthesizing output signals of the pre-distortion units, a single amplifier for amplifying signals outputted from the synthesis unit, distribution units for respectively separating the signals for each of the plurality of bands from the output signals of the amplifier, a plurality of inverse compensation attenuators for respectively attenuating the separated signals for each of the plurality of bands, and a feedback path for respectively feeding the attenuated signals for each of the plurality of bands back into the pre-distortion unit of the corresponding band out of the plurality of the pre-distortion units.

Abstract: Various embodiments of switched amplifiers are disclosed herein. In some embodiments, a switched amplifier may include a first amplifier; a second amplifier; an input matching network common to both the first and second amplifiers; and at least one switch to couple an input of the switched amplifier, via the input matching network, to one of the first amplifier or the second amplifier. In some embodiments, a switched amplifier may include a first amplifier; a second amplifier; an input matching network common to both the first and second amplifiers or an output matching network common to both the first and second amplifiers; and a bias generation circuit to selectively (1) provide a first bias current to the first amplifier or (2) provide a second bias current to the second amplifier, wherein the second bias current is less than the first bias current.

Abstract: Aspects of this disclosure relate to an impedance transformation circuit for use in an amplifier, such as a low noise amplifier. The impedance transformation circuit includes a matching circuit including a first inductor. The impedance transformation circuit also includes a second inductor. The first and second inductors are magnetically coupled to each other to provide negative feedback to linearize the amplifier.

Abstract: A combined ambient sound and secondary audio system comprises at least one microphone for receiving ambient sound, at least one receiver for receiving secondary audio from a secondary audio source not audible in the ambient sound. The system further includes a memory storing one or more sets processing parameters comprising instructions for processing the ambient sound and the secondary audio and a processor coupled to the memory, the microphone, and the receiver configured to generate combined ambient and secondary sound by combining the ambient sound and the secondary audio as directed by a selected set of processing parameters retrieved from the memory.

Abstract: A signal transmitting-receiving apparatus includes a first switching section, a second switching section, a controller, and an isolation unit. The first switching section is configured to connect Bluetooth signal receiving lines to a Bluetooth antenna. The second switching section configured to connect antennas to one of a Bluetooth receiving terminal, a Wi-Fi signal receiving terminal, and a Wi-Fi signal transmitting terminal. The controller is configured to signal process the Bluetooth signal and a Wi-Fi signal that are transmitted and received. The isolation unit is configured to suppress a signal coupling between the transmitted Bluetooth signal and the Bluetooth signal receiving lines.

Abstract: An electronic device includes a waveform generator, a comparator, and an amplifier. The waveform generator receives a voltage from a power supply to the electronic device and outputs a voltage waveform signal. The comparator compares an input signal and the voltage waveform signal to output a first pulse-width-modulated signal. The amplifier receives the first pulse-width-modulated signal and outputs a second pulse-width-modulated signal.

Abstract: A differential two-stage amplifier is provided. The differential two-stage amplifier includes an input circuit, a bias circuit, a common mode feedback circuit, a first stage amplifier, a second stage amplifier and a current compensation circuit. The input circuit receives an input current. The bias circuit provides a bias current. The first stage amplifier is coupled to the input circuit and the second stage amplifier. The common mode feedback circuit is coupled to the second stage amplifier and adjusts a common mode feedback current according to a common mode voltage, wherein the input current is made up of the bias current and the common mode feedback current. The current compensation circuit provides a compensation current, wherein when a temperature of the differential two-stage amplifier is greater than a predetermined temperature, the compensation current is input to the input circuit.

Abstract: An amplifier including a pre-amplifier, an impedance converter, and a traveling wave amplifier (TWA) is disclosed. The pre-amplifier receives a differential input signal and has a pair of first output nodes that output a first differential signal by amplifying the differential input signal. Each first output node has first output impedance. The impedance converter includes a pair of first input nodes that receive the first differential signal and a pair of second output nodes that output a second differential signal. Each first input node has first input impedance greater than the first output impedance. The impedance converter converts the first differential signal into the second differential signal. Each second output node has second output impedance smaller than the first output impedance. The TWA includes a pair of transmission lines connected to the pair of the second output nodes. Each transmission line has characteristic impedance matching with the second output impedance.

Abstract: A distributed amplifier is disclosed having a plurality of amplifier sections, each having an input gate and an output drain, and a first plurality of inductive elements coupled in series between a DA input terminal and a gate termination terminal to form a first plurality of connection nodes. Each of the connection nodes is coupled to a corresponding adjacent pair of the first plurality of inductive elements and to a corresponding input gate of the plurality of amplifier sections. A second plurality of inductive elements is coupled in series between a drain termination terminal and a DA output terminal to form a second plurality of connection nodes, each being coupled to a corresponding adjacent pair of the second plurality of inductive elements and to a corresponding output drain of the plurality of amplifier sections. An active impedance termination circuitry has a termination output coupled to the drain termination terminal.

Abstract: Disclosed are a line filter and a power supply apparatus including the line filter. The line filter includes a first inductor having a first coil wound around a first bobbin; and a second inductor having a second coil wound around a second bobbin, the second inductor being induced by the first inductor to flow current, wherein the first bobbin and the second bobbin are physically separated from each other. The power supply apparatus includes such a line filter.

Abstract: A high frequency termination device includes a printed circuit board. A ground pad having a first predetermined inductive reactance at a resonant frequency can be mounted on the printed circuit board. A resistor landing pad having a second predetermined inductive reactance at the resonant frequency can be mounted on the printed circuit board. The resistor landing pad can be selectively positioned adjacent to the ground pad to create a desired capacitive reactance at the resonant frequency to cancel at least part of the first predetermined inductive reactance and the second predetermined inductive reactance. A terminating resistor can be coupled with the resistor landing pad. An impedance of the termination device is dominated by a resistance value of the terminating resistor at the resonant frequency due to cancellation of at least part of the first predetermined inductive reactance and the second predetermined inductive reactance at the resonant frequency.

Abstract: A wireless communication device and a filter are provided. The filter has an input end and an output end and includes a first energy storage element, a first series resonant circuit, a second series resonant circuit, a first parallel resonant circuit and a second parallel resonant circuit. The first and the second series resonant circuits respectively have a first capacitor and a first inductor connected in series. The first and the second parallel resonant circuits respectively have a second capacitor and a second inductor connected in parallel. The first series resonant circuit and the first parallel resonant circuit are electrically connected in cascade between a first end of the first energy storage element and a ground, and the second series resonant circuit and the second parallel resonant circuit are electrically connected in cascade between a second end of the first energy storage element and the ground.

Abstract: The present invention relates to a phase-shifting unit module, a manufacturing method therefor, a phase shifting device, and an antenna. The phase-shifting unit module comprises a first metal ground plate, a second metal ground plate, an insulating dielectric plate, a slide apparatus, and a fixed transmission line. The insulating dielectric plate is provided thereon with at least one impedance transforming part. The thickness of the impedance transforming part is less than the thickness of the remaining parts of the insulating dielectric plate. The impedance transforming part of the insulating dielectric plate is overlapped with the fixed transmission line during a moving process. The insulating dielectric plate is overlapped only with the fixed transmission line, thus reducing reflected signals, while at the same time reducing losses, and facilitating ultra-wideband design of the phase-shift unit module and of the phase-shifting device.

Abstract: A method and apparatus for detecting RF field strength. A field strength reference generator develops a field strength reference current as a function of a field strength of a received RF signal; and a field strength quantizer develops a digital field-strength value indicative of the field strength reference current. In one embodiment, detected field strength is used to dynamically vary the impedance of a tank circuit whereby, over time, induced current is maximized.

Abstract: A laterally coupled multi-mode monolithic filter includes: a substrate; a piezoelectric film formed on the substrate; a ground electrode formed on a first surface of the piezoelectric film; and signal electrodes formed on a second surface of the piezoelectric film and arranged in parallel to each other, the second surface being opposite to the first surface, each of the signal electrodes including a first electrode finger and a second electrode finger, wherein the first electrode finger and the second electrode finger have different electric potentials; adjacent signal electrodes of the signal electrodes are at a distance from each other, the distance being greater than a pitch of the first electrode finger and the second electrode finger.

Abstract: In an embodiment, a tunable stiffness mechanical filter is provided including an input coupler to a negative stiffness structure with a negative stiffness characteristic, and further including a tuner for tuning the negative stiffness structure. An output sensor is located along the negative stiffness structure. The filter may include an amplifier and/or a driver coupled between the output sensor and the negative stiffness structure.

Abstract: Multi-band filters and communications devices are disclosed. A multi-band filter has a lower pass-band and an upper pass-band separated by an intervening stop-band. The multi-band filter includes a first ladder network and a second ladder network coupled in series. The first ladder network is configured to provide transmission zeros at frequencies below a lower edge of the lower pass-band and transmission zeros at frequencies above an upper edge of the upper pass-band. The second ladder network is configured to provide transmission zeros at frequencies within the intervening stop-band.

Abstract: A multiplexer includes: a first chip that has a first filter and a resonator, the first filter being connected between a common terminal and a first terminal, a first end of the resonator being connected to the common terminal not via the first filter; and a second chip that has a second filter, the second filter being connected between a second end of the resonator and a second terminal and having a pass band lower than that of the first filter, a resonance frequency of the resonator being higher than the pass band of the second filter.

Abstract: A resistor calibration system includes a reference resistor, a first control circuit, a second control circuit, a comparator, a multiplexer and a de-multiplexer. The first control circuit calibrates a first resistor and a duplicated first resistor. The second control circuit calibrates a second resistor. The comparator includes a first input terminal receiving a reference voltage, a second input terminal and an output terminal. The multiplexer includes a first input terminal coupled to the reference resistor and the first resistor, a second input terminal coupled to the duplicated first resistor and the second resistor, and an output terminal coupled to the second input terminal of the comparator. The de-multiplexer includes an input terminal coupled to the output terminal of the comparator, a first output terminal coupled to the first control circuit, and a second output terminal coupled to the second control circuit.

Abstract: A common sub-expression elimination method for simplifying hardware logic of a hardware filter circuit by eliminating a common sub-expression included in a plurality of sub-expressions is provided. Each of the sub-expressions includes a corresponding two or more of inputs constituting a plurality of coefficients used by the hardware filter circuit. The method is implemented on a computing device and includes: identifying for each coefficient of the plurality of coefficients, a combination of the inputs constituting the coefficient; counting occurrences of the sub-expressions in each of the coefficients; identifying one or more of the sub-expressions having a maximum one of the counts and including the corresponding two or more of the inputs; selecting one of the one or more of the sub-expressions as the common sub-expression; eliminating the common sub-expression; and repeating these steps to eliminate more of the sub-expressions common to multiple ones of the coefficients.

Abstract: A method of operating an inverter including the steps of detecting the temperature of the at least one electrolytic capacitor; selecting at least one of a plurality of switching patterns based on the temperature of the at least one electrolytic capacitor; and generating a ripple current across the at least one electrolytic capacitor by operating the inverter from the at least one of the plurality of switching patterns for preheating of the at least one electrolytic capacitor.

Abstract: A wave shaping circuit reduces slope magnitudes during increasing and decreasing voltage transitions. The wave shaping circuit includes a first switch that receives an input voltage having at least two voltage values where an input voltage transition between the at least two voltage values has a first slope magnitude; an inductor connected in series with the first switch; a second switch connected in a parallel arrangement with the first switch and the inductor; and a capacitor having a first end connected between the inductor and an output port and a second end connected to ground. When the input voltage begins the input voltage transition to a higher voltage value, the first switch turns on and the second switch turns off, such that the inductor limits current flow from the input voltage, decreasing a second slope magnitude of an output voltage transition to less than the first slope magnitude.

Abstract: A circuit and method for digital controlling the slew rate of load voltage are provided. The circuit is comprised of a digital slew-rate control unit that utilizes a feedback signal to generate control signals where the feedback signal indicates the observed rate of voltage change on the load. The circuit is further comprised of a load driver circuit that is operated by the control signals and provides a slew-rate controlled output voltage used to operate a load switch, where the load switch provides power to the load. The circuit is configured to operate the load switch using a slew-rate controlling driver, depending on the state of the load switch transition, and a non-controlling driver.

Abstract: A tunable delay circuit includes a first multiplexer, a delay chain, and a second multiplexer. The first multiplexer selects an input signal or a feedback signal as a first output signal according to an enable signal. The delay chain delays the first output signal for different time periods so as to generate a plurality of delay signals. One of the delay signals is used as the feedback signal. The second multiplexer selects one of the delay signals as a second output signal according to a pass signal.

Abstract: A voltage-controlled delay line including a clipper configured to produce a clipped input voltage from an input voltage, an oscillator configured to produce a strobe pulse train that is initiated by the clipped input voltage, and a divider module configured to divide the strobe pulse train and produce an output voltage from the divided strobe pulse train.

Abstract: A method and apparats for undervoltage detection and correction is disclosed. An IC includes sensors implemented in various functional circuit blocks. The sensors are implemented using ring oscillators, and may be characterized by a polynomial. The sensors are used to monitor a supply voltage provided to a corresponding functional unit. The sensors provide information indicative of the voltage on the supply voltage node over successive clock cycles. Comparison circuitry may be used to compare the detected voltage to one or more voltage thresholds, while delta comparison circuitry may be used to determine a slope, or rate of change of the voltage. Based on comparisons performed by the comparison circuitry and the delta comparison circuitry, control circuitry may determine if one or more voltage correction actions are to be taken in order to bring the voltage on the supply node into a specified range.

Abstract: An information processing apparatus which is capable of maintaining the amount of radiation noise from a semiconductor integrated circuit constant. A voltage value information storage unit holds information indicative of a voltage to be applied to the semiconductor integrated circuit. A sub CPU modulates a clock frequency of a clock to be supplied to the semiconductor integrated circuit with a modulation width determined based on the information held in the voltage value information storage unit and supplies the clock.

Abstract: A cascode switch circuit includes a first transistor, a second transistor, and a protector. A first transistor receives a signal from a first terminal through a first end and transfers the signal to a second end in response to a first control signal. A second transistor delivers the signal that the first transistor transfers to a second terminal in response to a second control signal. A protector is connected between a gate of the first transistor and the second terminal. The first control signal is provided to allow the first transistor to operate in a normally-on state. The second control signal is provided to allow the second transistor to operate in a normally-off state.

Abstract: The invention relates to a filter, for example, a switchable harmonic filter for the gigahertz range. A first line segment, which can comprise a radial stub leads away from a main line of the filter. A second line segment can be electrically connected to the first line segment. At least two electronically controllable switching elements are provided, by means of which the first and the second line segment can be connected.

Abstract: In the case of reducing an effect of variations in current characteristics of transistors by inputting a signal current to a transistor in a pixel, a potential of a wiring is detected by using a precharge circuit. In the case where there is a difference between a predetermined potential and the potential of the wiring, a charge is supplied to the wiring to perform a precharge by charging rapidly. When the potential of the wiring reaches the predetermined potential, the supply of charge is stopped and a signal current only is supplied. Thus, a precharge is performed only in a period until the potential of the wiring reaches the predetermined potential, therefore, a precharge can be performed for an optimal period.

Abstract: A circuit for turning off a power semiconductor switch includes a turn-off transistor coupled to switch a signal for turning off the power semiconductor switch onto a control terminal of the power semiconductor switch and a feedback control loop for controlling a voltage on the control terminal of the power semiconductor switch during turn-off. The feedback loop includes a feedback path to feedback a measurement of the voltage of the control terminal of the power semiconductor switch, a control terminal reference voltage generator to generate a time-dependent reference voltage, an error amplifier to generate an error signal representative of a difference between the voltage of the control terminal and the time-dependent reference voltage, and a forward path to convey the error signal forward for controlling the switching of the signal for turning off the power semiconductor switch onto the control terminal of the power semiconductor switch by the turn-off transistor.

Abstract: A programmable equalizer and related method are provided. The equalizer includes a pair of current-setting field effect transistors (FETs) coupled in series with a pair of input FETs and a pair of load resistors, respectively, between a first voltage rail (Vdd) and a second voltage rail (ground). A programmable equalization circuit is coupled between the sources of the input FETs, comprising a plurality of selectable resistive paths and a variable capacitor, which could also be configured as a plurality of selectable capacitive paths. Each of the selectable resistive paths (as well as each of the selectable capacitive paths) include a selection FET for selectively coupling the corresponding resistive (or capacitive) path between the sources of the input FETs. In the case where one of the input FETs is biased with a reference gate voltage, the source of each selection FET is coupled to the source of such input FET.

Abstract: An apparatus for performing signal driving in an electronic device may include a decoupling capacitor and at least one switching unit (e.g. one or more switching units). The decoupling capacitor may have a first terminal and a second terminal, and may be positioned in an output stage within the electronic device and coupled between a first predetermined voltage level and another predetermined voltage level, where the apparatus may perform signal driving with aid of the output stage. In addition, the aforementioned at least one switching unit may be coupled between one terminal of the first and the second terminals of the decoupling capacitor and at least one of the first predetermined voltage level and the other predetermined voltage level, and may be arranged for selectively disabling the decoupling capacitor.

Abstract: An electronic device includes a transmission interface and a control circuit. The transmission interface includes a signal reference contact and a signal transmission contact. The control circuit is electrically coupled between the signal reference contact and a ground layer, in which the control circuit is configured to selectively conduct the signal reference contact and the ground layer, and when the signal reference contact and the ground layer are conducted, the signal transmission contact is configured to transmit a first signal, and when the signal reference contact the ground layer are not conducted, the signal reference contact is configured to transmit a second signal. A transmission frequency of the second signal is less than a transmission frequency of the first signal.

Abstract: Apparatus comprises a switch feature configured to restrict an electrical signal transmitted from a peripheral device, and received through an electrical contact, from being transferred to one of first and second circuit modules coupled to the electrical contact, depending on the voltage amplitude of the electrical signal.

Abstract: A Single-Pole-Single-Throw (SPST) switch for RF application is disclosed that can include a semiconductor MOSFET transistor T, wherein its drain terminal can be connected to a resistor R3 and capacitor C2. It can have a source terminal connected to a resistor R1 and capacitor C1, a gate terminal connected to resistor R2, a body connected by resistor R4 to GND, and the body can be connected to the anode of a diode DE The Cathode of diode D1 can be connected to a power supply Vdd through a resistor R6. The Cathode of diode D1 can also be connected to the cathode of another diode D2. The anode of D2 can be connected to GND through resistor R5. Capacitor C1 can be connected to an I/O port P1, and capacitor C2 can be connected to an I/O port P2. Inductor L1 can connect to ports P1 and P2, while inductor L2 can connect the source terminal and drain terminal of MOSPET T.

Abstract: An impedance calibration circuit includes a first code generator, a first code storing circuit, a second code generator and a second code storing circuit. The first code generator generates a pull-up control code obtained from a result of comparing a target output high level (VOH) voltage with a first voltage of a first node. The first code storing circuit stores the pull-up control code when the target VOH voltage becomes the same as the first voltage. The second code generator generates a pull-down control code obtained from a result of comparing the VOH voltage with a second voltage of a second node. The second storing circuit stores the pull-down control code when the target VOH voltage becomes the same as the second voltage. The first code storing circuit and the second code storing circuit store pull-up control code and pull-down control code pairs respectively.

Abstract: A circuit for preventing multi-bit upsets induced by single event transients is described. The circuit comprises a clock generator configured to generate a first clock signal and a second clock signal; a first memory element configured to receive a first input signal and generate a first output signal, the first memory element having a first clock input configured to receive the first clock signal; and a second memory element configured to receive the first output signal and generate a second output signal, the second memory element having a second clock input configured to receive the second clock signal; wherein the first clock signal is the same as the second clock signal. A method of preventing multi-bit upsets induced by single event transients is also described.

Abstract: A method and apparatus is disclosed herein for segmented and direct routing in a programmable gate array. In one embodiment, the programmable gate array comprises a plurality of programmable tiles, including at least one SHLRT having: a block configurable as a logic function or a routing function; and one or more switching blocks coupled to programmable tiles in the plurality of programmable tiles for segmented routing.

Abstract: A level shifting circuit includes a transistor output unit that receives a first power supply signal and convert the first power supply signal to a second power supply signal having a different level from the first power supply signal and a current provision unit that provides a current to an output terminal of the transistor output unit when the first power supply signal of the transistor output unit is inputted to shorten a prolonged portion of the second power supply signal. Therefore, the level shifting circuit may provide an additional current to the output terminal of the transistor output unit to shorten a prolonged portion of the output voltage.

Abstract: A device includes a programmable logic fabric. The programmable logic fabric includes a first area, wherein a first persona is configured to be programmed in the first area. The programmable logic fabric also includes a second area, wherein a second persona is configured to be programmed in the second area in a second persona programming time. The device is configured to be controlled by a host to switch from running the first persona to running the second persona in a time less than the second persona programming time.