Abstract: A computer implemented method and system for proximity aware identification includes determining a symbol for identification on a first device. The first device is configured to detect a second device in a specified proximity to the first device. The method and system includes displaying the symbol on the first device, and detecting the second device within the specified proximity. The first device sends an image including the symbol to the second device, and the second device receiving the image and displaying the symbol. Indicating a location of the second device on a display of the first device depicting a relative location of the first device to the second device using the symbol, wherein the first device and the second devices include the symbol for identification by users of the first and second devices.

Abstract: An example non-transitory computer-readable medium stores instructions that, when executed by a control device, cause the control device to perform functions. The functions comprise configuring a first playback device associated with a first user-account to (i) play media content from a playback queue comprising one or more audio tracks stored at a network location and (ii) enable one or more other user-accounts associated with other playback devices to subscribe to the playback queue. The functions further comprise receiving an indication that a second user-account associated with a second playback device has subscribed to the playback queue. The functions further comprise in response to receiving the indication, displaying a subscriber indicator on the control device showing that the second user-account has subscribed to the playback queue. An example control device and an example method, both related to the example non-transitory computer-readable medium, are also disclosed herein.

Abstract: Examples described herein involve maintaining a database of audio processing algorithms. Maintaining the database may involve generating or updating audio processing algorithm entries. In one example, generating an audio processing algorithm may involve a computing device causing a playback device to play a first audio signal in a playback zone, receiving (i) data indicating one or more characteristics of a playback zone, and (ii) data indicating a second audio signal detected by a microphone of the playback device in the playback zone. Based on the second audio signal and a characteristic of the playback device, an audio processing algorithm may be determined. The an association between the determined audio processing algorithm at least one of the one or more characteristics of the playback zone may be stored in the database.

Abstract: An embodiment takes the form of an accessory for attachment to a communication device, the accessory comprising a microphone disposed on the accessory to detect sound, a cryptographic module disposed on the accessory in communication with the microphone to generate encrypted audio data based on the detected sound, a communication interface disposed on the accessory in communication with the cryptographic module configured to convey the encrypted audio data to the communication device, and an audio-sensor inhibitor arranged to be positioned adjacent to a communication-device audio sensor.

Abstract: Methods and arrangements involving electronic devices, such as smartphones, tablet computers, wearable devices, etc., are disclosed. One arrangement involves a low-power processing technique for discerning cues from audio input. Another involves a technique for detecting audio activity based on the Kullback-Liebler divergence (KLD) (or a modified version thereof) of the audio input. Still other arrangements concern techniques for managing the manner in which policies are embodied on an electronic device. Others relate to distributed computing techniques. A great variety of other features are also detailed.

Abstract: A method for performing the following operations (not necessarily in the following order): (i) receiving by an augmented reality system, a series of images corresponding to views of the real world; (ii) processing, by the augmented reality system, the series of images to determine presence of a first object; (iii) determining, by the augmented reality system, that the first object meets a first set of conditions such that the first object belongs to a first object category; and (iv) responsive to the determination that the first object belongs to the first object category, providing an audio response in the form of one at least one of the following types of audio responses: communicating a predefined sound to an augmented reality user and/or changing audio characteristic(s) of a sound not generated by the augmented reality system which is being experienced by the augmented reality user.

Abstract: A display device includes a display unit, at least a flight unit connected to the display unit, a position information receiving unit obtaining information on a current position of the display device, a sensor unit obtaining information of a user, a flight control unit automatically controlling a flight of the display device, a posture information obtaining unit obtaining posture information of the display device, a main control unit controlling an overall operation of respective components of the display device, a posture correction unit varying an angle of the display device or the display unit, a vibration system, a voice recognition unit, a communication module, an input member transmitting input information to the communication module, a power source unit, an obstacle detection unit, a joint manipulator connecting the at least one flight unit and the display unit, and a connector connecting the display unit and the display device.

Abstract: A microprocessor performs a fused multiply-accumulate operation of a form ±A*B±C. An evaluation is made to detect whether values of A, B, and/or C meet a sufficient condition for performing a joint accumulation of C with partial products of A and B. If so, a joint accumulation of C is done with partial products of A and B and result of the joint accumulation is rounded. If not, then a primary accumulation is done of the partial products of A and B. This generates an unrounded non-redundant result of the primary accumulation. The unrounded result is then truncated to generate an unrounded non-redundant intermediate result vector that excludes one or more least significant bits of the unrounded non-redundant result. A secondary accumulation is then performed, adding or subtracting C to the unrounded non-redundant intermediate result vector. Finally, the result of the secondary accumulation is rounded.

Abstract: A microprocessor prepares a fused multiply-accumulate operation of a form ±A*B±C for execution by issuing first and second multiply-accumulate microinstructions to one or more instruction execution units to complete the fused multiply-accumulate operation. The first multiply-accumulate microinstruction causes an unrounded nonredundant result vector to be generated from a first accumulation of a selected one of (a) the partial products of A and B or (b) C with the partial products of A and B. The second multiply-accumulate microinstruction causes performance of a second accumulation of C with the unrounded nonredundant result vector, if the first accumulation did not include C. The second multiply-accumulate microinstruction also causes a final rounded result to be generated from the unrounded nonredundant result vector, wherein the final rounded result is a complete result of the fused multiply-accumulate operation.

Abstract: Various embodiments relate to a device including a digital component configured to output a plurality of parallel bits based on an input wherein the digital component is capable of occupying a metastable state between a time the input is changed and a time the output plurality of parallel bits changes based on the changed input, wherein the digital component outputs metastable bits while occupying the metastable state; and a synchronous sampling circuit configured to sample bits from the digital component in synchronization with a received clock signal pulse, wherein when the clock signal pulse occurs while the digital component occupies a metastable state, the synchronous sampling circuit samples metastable bits, and wherein the input into the digital component changes in a manner that is asynchronous with respect to the clock signal pulse. In various embodiments, the digital component is a substitution box (S-box).

Abstract: Aspects of present disclosure relate to random number generator, a method and a computer program product of improving entropy quality of the random number generator. The method may include: receiving, at an input/output interface module of the random number generator, a request to generate a random number having a predetermined number of random bits, and starting a random bit generating loop to generate each of the random bits of the random number to be generated. In certain embodiments, random bit generating loop may include: incorporating a CPU Time as a randomness factor in generating random number to improve entropy quality, including non-deterministic memory-subsystem latencies in entropy extraction, such as those introduced by unpredictable cache movements, generating a Candidate Bit by using a Clock Time, and generating a random bit for random number by using a von Neumann unbiasing analysis module, until every random bits of the random number is generated.

Abstract: Examples of the disclosure provide for receiving a template at a design surface, the template representing a visual layout, logic, and data schema for an application. Received source data is bound to the template based on the data schema. At least one data storage location is selected from identified data storage locations. Based on the selection of the one data storage location, at least a portion of the source data is extracted and sent to the data storage location for storage. The extracted data is rewired to bind the extracted data at the data storage location to the template such that access of the application generated using the template provides access to the extracted data at the data storage location.

Abstract: Systems and methods for integration of carrier-based service functionality with API-based functionality emanating from a single service provider or service network.

Abstract: An assignment of at least one state variable to a respective graphic object is carried out as a function of a user input. An assignment of a respective vehicle parameter or personal characteristic to one state variable respectively, which is assigned to the respective graphic object, is carried out as a function of a user input. This takes place with the inclusion of a respective assignment function, which represents an imaging rule of the respective vehicle parameter or personal characteristic onto the respective state variable.

Abstract: An improved system and method are disclosed for creating a configuration for a platform instance using a development environment that has a graphical user interface (GUI). The method includes creating a service to be run by the platform instance and providing a graphical representation of a block library containing available blocks that are available for use by the service. Input is received via the GUI identifying at least some of the available blocks as selected blocks, where the selected blocks are to be run by the service. Input is received via the GUI arranging the selected blocks into an order of execution. The development environment generates and stores at least one configuration file containing the order of execution for use by the platform instance.

Abstract: A device may receive a model for code generation. The device may determine to preserve continuity with a first generated code associated with the model. The device may receive, based on determining to preserve continuity, a first generation record associated with the first generated code. The first generation record may include information associated with generation of the first code. The device may generate second code based on the model and the first generation record. The device may create a second generation record based on the second generated code. The second generation record may include information associated with generation of the second code. The device may provide the second generated code.

Abstract: Systems and methods for increasing user confidence in results that are produced by one or more programs that are generated by an underlying Programming-By-Example (PBE) system based on user input examples. A plurality of generated programs that have been generated using one or more user input examples that are indicative of an output that should be achieved to comply with a user determined result are received. The generated programs are narrowed based on one or more sub-expressions of the programs that are likely to cause the resultant program to comply with the user determined result. The one or more sub-expressions are exposed. Input that selects at least one of the one or more exposed sub-expressions to thereby identify the one of the generated programs that will result in the user determined result is received.

Abstract: An approach for integrated development environment (IDE)-based program code library searching and selection in multiple programming languages in a networked computing environment is provided. In a typical embodiment, a search request (e.g., to locate a desired program code library) will be received in an IDE and parsed. The search request generally includes a set of annotations corresponding to at least one of: a primary program code language of the program code library, an alternate program code language of the program code library, or a method pair associated with the program code library. A search of at least one program code library repository will then be conducted based on the set of annotations, and a set of matching results will be generated. The set of matching results may include one or more program code libraries, and may be provided to a device hosting the IDE.

Abstract: A system and method for facilitating characterizing data to enable dynamic generation of a user interface feature based on the data. An example method includes maintaining data in accordance with a data model accessible to webpage computer code, wherein the data model is adapted to be populated with data associated with one or more data attributes in the data model; and providing a signal, identifying a data attribute, from the data model to webpage computer code to facilitate dynamic construction of one or more user interface features characterizing a rendering of a webpage. Data in the data model is characterized by one or more data attributes, each of which is associated with an attribute definition. The example method may further include organizing one or more attribute definitions in the data model as computing objects containing characterizations of the one or more data attributes.

Abstract: A method involves compiling a first amount of high-level programming language code (for example, P4) and a second amount of a low-level programming language code (for example, C) thereby obtaining a first section of native code and a second section of native code. The high-level programming language code at least in part defines how an SDN switch performs matching in a first condition. The low-level programming language code at least in part defines how the SDN switch performs matching in a second condition. The low-level code can be a type of plugin or patch for handling special packets. The sections of native code are loaded into the SDN switch such that a first processor (for example, x86 of the host) executes the first section of native code and such that a second processor (for example, ME of an NFP on the NIC) executes the second section of native code.

Abstract: In a method for enabling automatic reference counting, a segment of source code is replaced with an automatic reference counting implementation such that the source code executes an object destructor on demand irrespective of whether there are live references to an object, where a reference associates the object with a portion of memory, and where the object destructor marks the object as disposed without freeing the portion of memory associated with the object and without impacting validity of the reference to the object. The source code is executed with the automatic reference counting implementation, where the automatic reference counting collects a reference and removes the reference from being a live reference, and where marking of the object as disposed by the object destructor is executed on demand based on the source code irrespective of whether there are live references to the object and without impacting validity of the reference to the object.

Abstract: Generic method specialization represents the ability to specialize generic methods over various types. When implementing generic method specialization an annotated class file may include a generic method declaration that is annotated with specialization metadata indicating elements of the generic method to be adjusted during specialization. The annotated method may be usable directly as an erased method implementation (e.g., to load the method when instantiated with reference types) and may also be usable as a template for specialization. When a generic method is being prepared for execution, such as when it is first invoked during runtime, a specialization method generator function may be used to specialize the generic method based on the specialization metadata in the generic method declaration. The specialization method generator function may use the annotated generic method declaration as a template for specialization.

Abstract: Software specification translation includes: receiving a first software specification specified in a first programming language, a second software specification specified in a second programming language, a third software specification specified in a third programming language, the third software specification defining one or more data relationships between the first software specification and the second software specification. A combined representation of the first software specification and the second software specification is formed in a fourth programming language different from the first, second, and third programming languages. Connections are formed in the fourth programming language between a representation of the first software specification and the representation of the second software specification according to identified data relationships.

Abstract: In some examples, a client device receives, from a network-attached storage (NAS) system, installer code. Executing the installer code at the client device causes display of a user interface at the client device. Questions are presented in the user interface at the client device. Responsive to answers to the questions received in the user interface, the installer code executing at the client device installs a subset of software components relating to the NAS system the client device.

Abstract: A method for detecting a confirmation of a properly installed software product on a computing device, determining the software product installation properties of the properly installed software product, and storing information relating to at least one or more software product installation properties of the properly installed software product.

Abstract: A method for designing a system on a target device includes identifying a soft processor to implement on the target device. The soft processor is optimized in response to code to be executed on the soft processor. Other embodiments are also disclosed.

Abstract: One embodiment describes a utility metering system. The utility metering system includes a utility meter that is communicatively coupled to a utility service provider, in which the utility meter includes firmware. The utility meter stores a firmware update downloaded from the utility service provider, and determines a particular time to update the firmware with the firmware update, in which the particular time is determined based at least in part on historical time of use data, time of use pricing rates, or a combination thereof. The historical time of use data include utility consumption by a consumer over time and the time of use pricing rates include the price per unit of utility charged to the consumer. Additionally, the utility meter updates the firmware at the particular time.

Abstract: Provided is software versioning that allows a set of features to be selectively enabled and/or disabled based on a value of a switch associated with each feature of the set of features. The software versioning includes an administrator component that receives a change to a switch associated with at least one application. A toggle component generates a configuration notice based on an indication of the change to the switch. A tool kit component facilitates implementation of the change at the application based on the configuration notice received from the toggle component.

Abstract: Device component status detection and illustration apparatuses, methods, and systems determine and generate visualizations of updates timelines indicating device components associated with a remote connected device at different times. A device component status detection and illustration apparatus may include a memory and processor with instructions to: obtain device selection parameters, determine one or more remote connected devices that satisfy the device selection parameters, and identify a remote connected device selected from one or more remote connected devices by a user. The instructions may further be executed to generate visualizations of updates timelines associated with the remote connected device, including information regarding device components associated with the identified remote connected device as of selected update times. This allows the apparatus to present information regarding the status of a particular device at different points in time.

Abstract: An integrated-circuit radio communication device (1) comprises processing means (7), memory (13), and radio communication logic (17). The memory (13) stores (i) a boot-loader (22), (ii) a firmware module (23) in a firmware memory region, and (iii) a software application (27) in a software-application memory region. The firmware module (23) comprises instructions for controlling the radio communication logic (17) according to a predetermined radio protocol, and the software application (27) comprises instructions for invoking a radio-communication function of the firmware module (23). The boot-loader (22) or the firmware module (23) comprises instructions for using the radio communication logic (17) to receive a new firmware module (40), and the boot-loader (22) or the firmware module (23) comprises instructions for storing the new firmware module (40) in the software-application memory region such that at least a portion of the software application (27) is overwritten by the new firmware module (40).

Abstract: The disclosure generally describes methods, software, and systems, including a method for updating an application. At least one application instance of an application is managed. Each application instance is associated with a plurality of executing work processes connected with a first database schema. A bridge database schema is generated that is related to the first database schema. The bridge database schema represents a copy of the first database schema and is generated in response to initiation of an update to the application. In response to determining that the generation of the bridge database schema is complete, for each of the plurality of work processes, a commit work action performed by the particular work process is determined. In response to determining performance of the commit work action, the particular work process is connected to the bridge database schema.

Abstract: Source interactive content is obtained, including asset objects and code objects. Interactive content metadata is generated from the source interactive content, the interactive content metadata identifying links between asset objects and code objects. Target interactive content is generated from the source interactive content, the target interactive content being capable of playback using the interactive content metadata, the target interactive content being otherwise incapable of playback without the interactive content metadata. The target interactive content and interactive content metadata are packaged into an interactive content package for each of a plurality of different platform formats. A runtime request for interactive content is received, and a platform format associated with the runtime request is identified. A particular platform-specific interactive content package is selected based on the platform format associated with the runtime request.

Abstract: A software development management system for use by multiple developers includes an acquisition unit configured to acquire, for each of a plurality of work items each representing a work to change at least one file, designation of a file associated with the work item. A dependency detection unit detects dependencies among a number of files. A determination unit determines, on the basis of the dependencies among the files, whether there is a dependency relationship between at least two work items based on the dependency relationship between the files detected by the dependency detection unit.

Abstract: An array processor includes a managing element having a load streaming unit coupled to multiple processing elements. The load streaming unit provides input data portions to each of a first subset of processing elements and receives output data from each of a second subset of the processing elements based on a comparatively sorted combination of the input data portions. Each processing element is configurable by the managing element to compare input data portions received from the load streaming unit or two or more of the other processing elements. Each processing unit can further select an input data portion to be output data based on the comparison, and in response to selecting the input data portion, remove a queue entry corresponding to the selected input data portion. Each processing element can provide the selected output data portion to the managing element or as an input to one of the processing elements.

Abstract: An apparatus and method are described for performing conflict detection operations. For example, one embodiment of a processor comprises: a first source vector register to store a first set of data elements; a second source vector register to store a second set of data elements; conflict detection logic to perform a specified comparison operation comparing each of the first set of data elements with specified data elements from the second set and generating a set of comparison results, the comparison operation to be selected from a group consisting of a greater than comparison, a less than comparison, a greater than or equal to comparison, a less than or equal to comparison, and a not equal to comparison.

Abstract: An apparatus and method for performing an efficient scatter operation. For example, one embodiment of a processor comprises: an allocator unit to receive a scatter operation comprising a number of data elements and responsively allocate resources to execute the scatter operation; a memory execution cluster comprising at least a portion of the resources to execute the scatter operation, the resources including one or more store data buffers and one or more store address buffers; and a senior store pipeline to transfer store data elements from the store data buffers to system memory using addresses from the store address buffers prior to retirement of the scatter operation.

Abstract: A microprocessor implemented method for resolving dependencies for a load instruction in a load store queue (LSQ) is disclosed. The method comprises initiating a computation of a virtual address corresponding to the load instruction in a first clock cycle. It also comprises transmitting early calculated lower address bits of the virtual address to a load store queue (LSQ) in the same cycle as the initiating. Finally, it comprises performing a partial match in the LSQ responsive to and using the lower address bits to find a prior aliasing store, wherein the prior aliasing store stores to a same address as the load instruction.

Abstract: A hardware data prefetcher is comprised in a memory access agent, wherein the memory access agent is one of a plurality of memory access agents that share a memory. The hardware data prefetcher includes a prefetch trait that is initially either exclusive or shared. The hardware data prefetcher also includes a prefetch module that performs hardware prefetches from a memory block of the shared memory using the prefetch trait. The hardware data prefetcher also includes an update module that performs analysis of accesses to the memory block by the plurality of memory access agents and, based on the analysis, dynamically updates the prefetch trait to either exclusive or shared while the prefetch module performs hardware prefetches from the memory block using the prefetch trait.

Abstract: A system and method for increasing lockstep core availability provides for writing a state of a main CPU core to a state buffer, executing one or more instructions of a task by the main CPU core to generate a first output for each executed instruction, and executing the one or more instructions of the task by a checker CPU core to generate a second output for each executed instruction. The method further includes comparing the first output with the second output, and if the first output does not match the second output, generating one or more control signals, and based upon the generation of the one or more control signals, loading the state of the main CPU core from the state buffer to the main CPU core and the checker CPU core.

Abstract: A microprocessor includes a predicting unit having storage for holding a prediction history of characteristics of instructions previously executed by the microprocessor. The predicting unit accumulates the prediction history and uses the prediction history to make predictions related to subsequent instruction executions. The storage comprises a plurality of portions separately controllable for accumulating the prediction history. The microprocessor also includes a control unit that detects the microprocessor is running an operating system routine and controls the predicting unit to use only a fraction of the plurality of portions of the storage to accumulate the prediction history while the microprocessor is running the operating system routine.

Abstract: Corruption of program stacks is detected by using guard words placed in the program stacks. A called routine executing on a processor checks a guard word in a stack of a calling routine. The checking determines whether the guard word has an expected value. Based on determining the guard word has an unexpected value, an indication of corruption of the stack is provided. Some routines, however, may not support use of guard words. Thus, routines that are interlinked may have differing protection capabilities. A determination is made as to the differing protection capabilities, an indication of the same is provided, and the routines are executed without failing due to the differing protection capabilities.

Abstract: Embodiments of systems, apparatuses, and methods of performing in a computer processor dependency index vector calculation in response to an instruction that includes a first and second source writemask register operands, a destination vector register operand, and an opcode are described.

Abstract: The RISC data processor is based on the idea that in case that there are many flag-generating instructions, the number of flags generated by each instruction is increased so that a decrease of flag-generating instructions exceeds an increase of flag-using instructions in quantity, thereby achieving the decrease in instructions. With the data processor, an instruction for generating flags according to operands' data sizes is defined. To an instruction set handled by the RISC data processor, an instruction capable of executing an operation on operand in more than one data size, which performs a process identical to an operation process conducted on the small-size operand on low-order bits of the large-size operand, and generates flags capable of coping with the respective data sizes regardless of the data size of each operand subjected to the operation is added. Thus, the reduction in instruction code space of the RISC data processor tight in instruction code space can be achieved.

Abstract: Embodiments relate to selectively blocking branch instruction predictions. An aspect includes a computer system for performing selective branch prediction. The system includes memory and a processor, and the system is configured to perform a method. The method includes detecting a branch-prediction blocking instruction in a stream of instructions and blocking branch prediction of a predetermined number of branch instructions following the branch-prediction blocking instruction based on the detecting the branch-prediction blocking instruction.

Abstract: A loop predictor trains a branch instruction to determine a trained loop count of a loop. When the loop fits in an instruction buffer, the processor stops fetching from an instruction cache, sends the loop instructions to an execution engine from the buffer without fetching from the cache, maintains a loop pop count of times the branch is sent to the execution engine from the buffer, and predicts the branch instruction is taken when the loop pop count is less than the trained loop count and otherwise predicts not taken.

Abstract: A method for implementing a reduced size register view data structure in a microprocessor. The method includes receiving an incoming instruction sequence using a global front end; grouping the instructions to form instruction blocks; using a plurality of multiplexers to access ports of a scheduling array to store the instruction blocks as a series of chunks.

Abstract: An allocation system and a method for allocating an architectural register in a system having one or more mapping tables. When the allocation system detects a plurality of available architectural registers to an allocation target virtual register, it identifies adjacent instructions to all instructions having the allocation target virtual register in its destination operand, counts the number of uses of the architectural register appearing in the destination operand for each architectural register, summing the number of uses for each architectural register for each entry group in one or more mapping tables having the same assignment rule for correlations with the architectural registers, calculating the total of the numbers of uses of entries for each entry group, and allocating the architectural register to the allocation target virtual register such that the total of the numbers of uses of entries for each entry group approaches uniformity.

Abstract: Embodiments relate to a heterogeneous core microarchitecture. An aspect includes binding, by an operating system that is executing on a processor comprising a core comprising a heterogeneous microarchitecture comprising two or more flows, a job that is being executed by the operating system to a flow of the two or more flows. Another aspect includes issuing an instruction corresponding to the job with a tag indicating the binding of the job to which the instruction corresponds. Yet another aspect includes executing the instruction by the flow in the core that is indicated by the tag.

Abstract: A microprocessor includes a plurality of processing cores and an uncore random access memory (RAM) readable and writable by each of the plurality of processing cores. Each core of the plurality of processing cores comprises microcode run by the core that implements architectural instructions of an instruction set architecture of the microprocessor. The microcode is configured to both read and write the uncore RAM to accomplish inter-core communication between the plurality of processing cores.

Abstract: A microprocessor a plurality of processing cores, wherein each of the plurality of processing cores instantiates a respective architecturally-visible storage resource. A first core of the plurality of processing cores is configured to encounter an architectural instruction that instructs the first core to update the respective architecturally-visible storage resource of the first core with a value specified by the architectural instruction. The first core is further configured to, in response to encountering the architectural instruction, provide the value to each of the other of the plurality of processing cores and update the respective architecturally-visible storage resource of the first core with the value. Each core of the plurality of processing cores other than the first core is configured to update the respective architecturally-visible storage resource of the core with the value provided by the first core without encountering the architectural instruction.