Patents Issued in March 7, 2019
-
Publication number: 20190073217Abstract: Instruction code is executed in a central processing unit of a network computing device. Besides the central processing unit the device is provided with a code sequencer operative to execute predefined instruction sequences. The code sequencer is invoked by a trigger instruction in the instruction code, which is encountered by the central processing unit. Responsively to its invocations the code sequencer executes the predefined instruction sequences.Type: ApplicationFiled: September 4, 2017Publication date: March 7, 2019Inventor: Uria Basher
-
Publication number: 20190073218Abstract: A method for speeding the re-use of Physical Register Names (PRNs), and hence the processor registers, in a processor. The method involves returning a PRN to a freelist for reuse when it is obsolete even when it is not complete, and blocking writes to the Processor Register File (PRF) by obsolete realms.Type: ApplicationFiled: September 5, 2017Publication date: March 7, 2019Inventors: Tejaswi TALLURU, Rodney SMITH, Yusuf Cagatay TEKMEN, Kiran SETH, Daniel HIGDON, Jeffery Michael SCHOTTMILLER, Andrew IRWIN
-
Publication number: 20190073219Abstract: Aspects for vector operations in neural network are described herein. The aspects may include a vector caching unit configured to store a first vector and a second vector, wherein the first vector includes one or more first elements and the second vector includes one or more second elements. The aspects may further include a computation module that includes one or more bitwise processors and a combiner. The bitwise processors may be configured to perform bitwise operations between each of the first elements and a corresponding one of the second elements to generate one or more operation results. The combiner may be configured to combine the one or more operation results into an output vector.Type: ApplicationFiled: October 26, 2018Publication date: March 7, 2019Inventors: Tao Luo, Tian Zhi, Shaoli Liu, Tianshi Chen, Yunji Chen
-
Publication number: 20190073220Abstract: The present disclosure provides a data read-write scheduler and a reservation station for vector operations. The data read-write scheduler suspends the instruction execution by providing a read instruction cache module and a write instruction cache module and detecting conflict instructions based on the two modules. After the time is satisfied, instructions are re-executed, thereby solving the read-after-write conflict and the write-after-read conflict between instructions and guaranteeing that correct data are provided to a vector operations component. Therefore, the subject disclosure has more values for promotion and application.Type: ApplicationFiled: November 7, 2018Publication date: March 7, 2019Inventors: Dong HAN, Shaoli LIU, Yunji CHEN, Tianshi Chen
-
Publication number: 20190073221Abstract: The present disclosure provides a data read-write scheduler and a reservation station for vector operations. The data read-write scheduler suspends the instruction execution by providing a read instruction cache module and a write instruction cache module and detecting conflict instructions based on the two modules. After the time is satisfied, instructions are re-executed, thereby solving the read-after-write conflict and the write-after-read conflict between instructions and guaranteeing that correct data are provided to a vector operations component. Therefore, the subject disclosure has more values for promotion and application.Type: ApplicationFiled: November 7, 2018Publication date: March 7, 2019Inventors: Dong HAN, Shaoli LIU, Yunji CHEN, Tianshi Chen
-
Publication number: 20190073222Abstract: A streaming engine employed in a digital data processor specifies a fixed read only data stream defined by plural nested loops. An address generator produces address of data elements. A steam head register stores data elements next to be supplied to functional units for use as operands. The streaming engine fetches stream data ahead of use by the central processing unit core in a stream buffer constructed like a cache. The stream buffer cache includes plural cache lines, each includes tag bits, at least one valid bit and data bits. Cache lines are allocated to store newly fetched stream data. Cache lines are deallocated upon consumption of the data by a central processing unit core functional unit. Instructions preferably include operand fields with a first subset of codings corresponding to registers, a stream read only operand coding and a stream read and advance operand coding.Type: ApplicationFiled: September 10, 2018Publication date: March 7, 2019Inventor: Joseph Zbiciak
-
Publication number: 20190073223Abstract: Systems and methods for branch prediction include detecting a subset of branch instructions which are not fixed direction branch instructions, and for this subset of branch instructions, utilizing complex branch prediction mechanisms such as a neural branch predictor. Detecting the subset of branch instructions includes using a state machine to determine the branch instructions whose outcomes change between a taken direction and a not-taken direction in separate instances of their execution. For the remaining branch instructions which are fixed direction branch instructions, the complex branch prediction techniques are avoided.Type: ApplicationFiled: September 5, 2017Publication date: March 7, 2019Inventors: Richard SENIOR, Raghuveer RAGHAVENDRA, Gurkanwal BRAR, Arvind GOVINDARAJ
-
Publication number: 20190073224Abstract: Techniques are disclosed for implementing an extensible, light-weight, flexible (ELF) processing platform that can efficiently capture state information from multiple threads during execution of instructions (e.g., an instance of a game). The ELF processing platform supports execution of multiple threads in a single process for parallel execution of multiple instances of the same or different program code or games. Upon capturing the state information, one or more threads may be executed in the ELF platform to compute one or more actions to perform at any state of execution by each of those threads. The threads can easily access the state information from a shared memory space and use the state information to implement rule-based and/or learning-based techniques for determining subsequent actions for execution for the threads.Type: ApplicationFiled: September 1, 2017Publication date: March 7, 2019Inventors: Yuandong Tian, Qucheng Gong, Yuxin Wu
-
Publication number: 20190073225Abstract: Fault tolerant and fault detecting multi-threaded processors are described. Instructions from a program are executed by both a master thread and a slave thread and execution of the master thread is prioritized. If the master thread stalls or reaches a memory write after having executed a sequence of instructions, the slave thread executes a corresponding sequence of instructions, where at least the first and last instructions in the sequence are the same as the sequence executed by the master thread. When the slave thread reaches the point at which execution of the master thread stopped, the contents of register banks for both the threads are compared, and if they are the same, execution by the master thread is allowed to continue, and any buffered speculative writes are committed to the memory system.Type: ApplicationFiled: August 10, 2018Publication date: March 7, 2019Inventors: Timothy Charles Mace, Ryan C Kinter
-
Publication number: 20190073226Abstract: Some embodiments provide a non-transitory machine-readable medium that stores a program. The program generates a plurality of background user interface (UI) pages. The program further receives a request for a layout page comprising a set of locations for presenting a set of visualizations. The program also instructs the plurality of background UI pages to process a subset of the set of visualizations. The program further presents the processed subset of the set of visualizations in the corresponding locations of the layout page.Type: ApplicationFiled: September 5, 2017Publication date: March 7, 2019Applicant: SAP SEInventors: Walter Mak, Pak Man Chan, Steffen Kötte, Nathan Wang, Michael Tsz Hong Sung
-
Publication number: 20190073227Abstract: A service model-oriented software system and an operation method of the present invention take a service module object as a basic component to drive the software system to run; support componentized software running and development, provide loose coupling, good openness and high security and is easy to be expanded. The software system includes a server-sided system architecture and a client-sided system architecture; the server-sided system architecture includes a service model factory component, a service model control engine and an activity service model component; the client-sided system architecture includes a client-sided control engine, a data object agent component and a view component. The software system and the operation method thereof lay a solid foundation for the development of the service-oriented software technology, provide solutions for the development of the computer software system in the cloud environment, and open new ideas and methods for the development and application of the software.Type: ApplicationFiled: November 1, 2018Publication date: March 7, 2019Inventor: Wenxiang Zhong
-
Publication number: 20190073228Abstract: A graph-based program specification includes components corresponding to tasks and directed links between ports of the components, including: a first type of link configuration defined by respective output and input ports of linked components, and a second type of link configuration defined by respective output and input ports of linked components. A compiler recognizes different types of link configurations and provides in a target program specification occurrences of a target primitive for executing a function for each occurrence of a data element flowing over a link of the second type. A computing node initiates execution of the target program specification, and determines at runtime, for components associated with the occurrences of the target primitive, an order in which instances of tasks corresponding to the components are to be invoked, and/or a computing node on which instances of tasks corresponding to the components are to be executed.Type: ApplicationFiled: September 1, 2017Publication date: March 7, 2019Inventors: Craig W. Stanfill, Richard Shapiro, Adam Weiss, Andrew F. Roberts, Joseph Skeffington Wholey, III, Joel Gould, Stephen A. Kukolich
-
Publication number: 20190073229Abstract: A method for storage retrieval, including receiving a request for application content. The request includes a first field identifier. The method further includes submitting a query to a content repository, for each asset including the first field identifier, receiving a first asset including the first field identifier and a second asset including the first field identifier, and extracting a first variability tag from the first asset and a second variability tag from the second asset based on the first asset having a matching asset property value to the second asset. The first asset and second asset are scored based at least on the first variability tag and at least on the second variability tag to obtain a first and second score, respectively. The method further includes selecting the first asset based on the first score and the second score, and transmitting the first asset as the application content.Type: ApplicationFiled: November 7, 2018Publication date: March 7, 2019Applicant: Intuit Inc.Inventors: Jay JieBing Yu, Matthew Sivertson, Vinay Kumar
-
Publication number: 20190073230Abstract: A method for modifying a native runtime environment comprising modifying symbols in the least one of a compiled executable or byte-code of each of a plurality of library versions, modifying references to the symbols in development code associated with the at least one of the compiled executable or byte-code, building the development code into a plurality of versioned library packages, renaming identifiers in each of the versioned library packages and modify an application build for the native runtime environment to reference each of the versioned library packages according to their renamed identifiers.Type: ApplicationFiled: February 28, 2017Publication date: March 7, 2019Applicant: 650 Industries, Inc.Inventors: Jesse Kicho Ruder, James Hiroaki Ide, Charles Duplain Cheever, Benjamin Carroll Alcala Roth
-
Publication number: 20190073231Abstract: Apparatuses, methods and storage medium associated with content consumption are disclosed herein. In embodiments, an apparatus may include a decoder, a user interface engine, and a presentation engine. The decoder may be configured to receive and decode a streaming of the content. The user interface engine may be configured to receive user commands. The presentation engine may be configured to present the content as the content is decoded from the stream, in response to received user commands. Further, the decoder, the user interface engine, the presentation engine, and/or combination/sub-combination thereof, may be arranged to adapt the presentation to enhance user experience during response to a skip back command, where the adaption is in addition to a nominal response to the skip back command, e.g., display of closed captions. Other embodiments may be described and/or claimed.Type: ApplicationFiled: November 7, 2018Publication date: March 7, 2019Applicant: INTEL CORPORATIONInventor: Johannes P. Schmidt
-
Publication number: 20190073232Abstract: Responsive to a detected user access by a user to help content of an application, at least one subsequent detected user interaction with the application is recorded that documents the user's actual use of the application in response to instructions within the accessed help content. The help content includes tracking metrics that include at least one configured expected user interaction with the application to perform the instructions within the accessed help content. The usability of the application is improved by automatically changing the application based upon results of a comparison of the recorded at least one subsequent detected user interaction with the application after the help content was accessed with the at least one configured expected user interaction with the application to perform the instructions within the accessed help content reaching a threshold for modification of the application.Type: ApplicationFiled: November 6, 2018Publication date: March 7, 2019Inventors: Andrew A. Armstrong, Richard W. Pilot
-
Publication number: 20190073233Abstract: The disclosed embodiments relate to a system for monitoring a virtual-machine environment. During operation, the system identifies a parent and a set of two or more child components that are related to the parent component in the virtual-machine environment. Next, the system determines a performance metric for each child component in the set of two or more child components. The system then determines a child-component performance state for each child component in the set of two or more child components based on the performance metric for the child component and a child-component state criterion. Finally, the system determines a parent state for the parent component based on the child-component performance state for each child component in the set of two or more child components and a parent-component state criterion, wherein the parent-component state criterion includes a threshold percentage or number of child components that have a specified state.Type: ApplicationFiled: October 29, 2018Publication date: March 7, 2019Inventors: Brian Bingham, Tristan Fletcher
-
Publication number: 20190073234Abstract: Systems and methods are described for managing initialization of virtual machine instances within an on-demand code execution environment or other distributed code execution environment. Such environments utilize pre-initialized virtual machine instances to enable execution of user-specified code in a rapid manner, without delays typically caused by initialization of the virtual machine instances. However, because the number of pre-initialized virtual machine instances maintained at an on-demand code execution environment is typically limited, insufficient number of pre-initialized virtual machine instances may be available at the on-demand code execution environment during times of heavy use. Embodiments described herein utilize pre-trigger notifications to indicate to the on-demand code execution environment that subsequent requests to execute user-specified code are likely to occur.Type: ApplicationFiled: July 2, 2018Publication date: March 7, 2019Inventors: Timothy Allen Wagner, Marc John Brooker
-
Publication number: 20190073235Abstract: In order to provide a network system that contributes to efficient expansion of an image file used in the instantiation of a virtualized network function (VNF), this network system provides a network functions virtualization infrastructure (NFVI) that provides the execution infrastructure of a VNF implemented by software operating on a virtual machine and virtualized, an element management system (EMS) that corresponds to the VNF, an NFV orchestrator (NFVO) that realizes a network service on the NFVI, and a VNF manager (VNFM) that manages the lifecycle of the VNF. One of the EMS, the NFVO and the VNFM provide a patch file used in updating the VNF.Type: ApplicationFiled: April 14, 2017Publication date: March 7, 2019Applicant: NEC CorporationInventor: Yoshihiko HOSHINO
-
Publication number: 20190073236Abstract: Methods and apparatus to automatically configure monitoring of a virtual machine are disclosed. An example apparatus includes a service analyzer to: identify a first virtual machine in a first application definition, the first application definition identifying virtual machines included in a first application, the first virtual machine currently running in the first application; and detect a second virtual machine currently running in the first application, the second virtual machine not included in the first application definition; and a virtual machine analyzer to: generate a second application definition, the second application definition created by adding the second virtual machine to the first application definition; and store the second application definition in an application configuration database.Type: ApplicationFiled: October 31, 2018Publication date: March 7, 2019Inventors: Dan Zada, Asaf Kariv, Mayan Weiss, Amir Wiener, Ella Rozanov
-
Publication number: 20190073237Abstract: Techniques are described that can be used to enable a transfer of an operating system from one machine to another. The transfer permits the operating system to be available to the target machine at buffers that are accessible to one or more application or other logic. In some implementations, information related to an operating system migration is stored in a buffer that is accessible to an application that is to use the information and thereby avoids a copy of such information from an intermediate buffer to an application buffer.Type: ApplicationFiled: November 5, 2018Publication date: March 7, 2019Inventors: Eliel Louzoun, Mickey Gutman, Gregory Cummins
-
Publication number: 20190073238Abstract: Although most contemporary and envisioned microfluidic systems are entirely passive or have limited control capabilities, future microfluidic systems require detailed sequenced control of valves and other elements. For this software-control of transport and processes for microfluidic systems under the control of temporal and/or event-driven scripts, script authoring and editing, functional libraries, and other development tools for process and configuration control are proposed with intent towards future standardization. Scripts can respond to external inputs and can comprise conditional-logic, temporal-logic, calculations, hierarchical structure, subroutines, macros, multi-thread and parallel execution operations, procedural calls, interrupts, real-time regulatory control calculations, and element resource allocation.Type: ApplicationFiled: November 2, 2018Publication date: March 7, 2019Inventors: Lester F. LUDWIG, Catherine LUK, Sulu LALCHANDANI, Ying CHEN
-
Publication number: 20190073239Abstract: A computer system maintains its computer system components. In an exemplary embodiment, of the computer system, a topology engine generates topology data to individually correlate hardware components, virtual machines, databases, middleware services, and applications based on hardware execution data. A hardware controller determines when a virtual machine stop condition for a virtual machine is met based on the topology data. When the virtual machine stop condition is met, the hardware controller instructs a hardware component to stop the virtual machine. The hardware controller determines when a virtual machine start condition for a virtual machine is met based on the topology data. When the virtual machine start condition is met, the hardware controller instructs a hardware component to start the virtual machine.Type: ApplicationFiled: September 1, 2017Publication date: March 7, 2019Inventors: VIKAS KRISHNA KALLALATHIL KONNATH, MANOJ KUMAR SHARMA
-
Publication number: 20190073240Abstract: This application discloses an event processing method and apparatus. A first communication request is received by a server system from a first terminal device. A second communication request is received by the server system from one or more second terminal devices. The first terminal device and the one or more second terminal devices are added to a same communication group by processing circuitry of the server system. A task to be executed at the one or more second terminal devices is sent to the one or more second terminal devices via the same communication group. A task execution result is received that is associated with task execution by the one or more second terminal devices that execute the task. An event object associated with the task is sent by the server system to the one or more second terminal devices that execute the task when the task execution result satisfies a predetermined condition.Type: ApplicationFiled: November 2, 2018Publication date: March 7, 2019Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Xinming CHEN, Liang GUO
-
Publication number: 20190073241Abstract: An apparatus and method are provided for executing thread groups. The apparatus comprises scheduling circuitry for selecting for execution a first thread group from a plurality of thread groups, and thread processing circuitry that is responsive to the scheduling circuitry to execute active threads of the first thread group in dependence on a common program counter shared between the active threads. In response to an exit event occurring for the first thread group, the thread processing circuitry determines whether a program counter check condition is present, and this can be used to trigger program counter checking circuitry to perform a program counter check operation to update the common program counter and an active thread indication for the first thread group.Type: ApplicationFiled: July 25, 2018Publication date: March 7, 2019Inventors: Isidoros SIDERIS, Eugenia CORDERO-CRESPO, Amir KLEEN
-
Publication number: 20190073242Abstract: For a task that has been partially executed, a residual complexity index is computed, the task being of a complexity that cannot be ascertained prior to executing the task. An evaluation is made whether the residual complexity index exceeds a cost of a resource that should be considered for allocation to the task. When the evaluation is affirmative, a priority of the task is established relative to a second task. The resource is scheduled to perform the task according to a timing, the timing being determined using the cost of the resource. The resource is allocated to the task according to the timing.Type: ApplicationFiled: November 7, 2018Publication date: March 7, 2019Applicant: International Business Machines CorporationInventors: Munish Goyal, Qin S. Held, Steven M. O'Brien, JR.
-
Publication number: 20190073243Abstract: Systems and methods for efficiently protecting simultaneous access to user-space shared data by multiple threads using a kernel structure is disclosed. Further, a mechanism within a spinlock allows reduction of the performance and power interference associated with the improved spinlock. This allows a thread in the critical section to complete its execution sooner by increasing the frequency and voltage of the CPU core it runs on. The improved spinlock allows a thread to enter a power saving state and the critical section to instruct a PCU to allocate a headroom power budget exclusively to the core that executed the instruction. The improved spinlock also provides saving in dynamic power during clock gated of the CPU resources and dynamic and static power during power gated of the CPU resources.Type: ApplicationFiled: September 7, 2017Publication date: March 7, 2019Inventor: Xiaowei JIANG
-
Publication number: 20190073244Abstract: A host system defines an event having a pool. The event is contingent on an outcome. The host system receives event data such as a stake value, a certainty value, and content data from network entities coupled to the network. The host system may identify and exclude network entities from the event and accordingly release their bids. The host system computes an estimated allotment for each active network entity and communicates the estimated allotments to the network entities. The estimated allotment may be based on a multiplier, determined based on certainty values of the event data. The host system determines outcome data and an actual allotment for the active network entities based on the outcome data. The host system generates and communicates results data to be displayed. The host system generates a command to allot respective winnings to the appropriate network entities, by transferring winnings to a beneficiary account.Type: ApplicationFiled: September 4, 2018Publication date: March 7, 2019Inventor: Ka Shun Kevin Fung
-
Publication number: 20190073245Abstract: A system generates a command to cause a computing machine to collect information for an issue that occurred with an application. The command is stored in a command list and associated with a computing machine identifier for the computing machine. The system receives a query from the computing machine for the command list. The query includes the computing machine identifier and the system locates the command in the command list based on the command being associated with the computing machine identifier. The system then sends the command to the computing machine where the command dynamically causes the computing machine to collect the information for the issue with the application.Type: ApplicationFiled: September 7, 2017Publication date: March 7, 2019Inventors: Wei HUANG, Rajeswari RAJAGOPALAN, Joshua B. BRUNO, Zhongyuan LI
-
Publication number: 20190073246Abstract: Technologies are described for protecting compute resources during outage conditions. For example, when an outage condition is detected, currently allocated compute resources can be protected by not releasing them in response to the outage condition. For example, a load pattern representing historical usage of compute resources by a computer service can be obtained. A predicted load pattern of compute resources can be generated based on the obtained load pattern. An outage condition related to the computer service can then be detected based on the predicted load pattern. In response to detecting the outage condition, compute resources can be protected and not released in response to the outage condition.Type: ApplicationFiled: November 6, 2018Publication date: March 7, 2019Applicant: Microsoft Technology Licensing, LLCInventors: Sharad Cornejo Altuzar, Pietro Verrecchia, Benjamin Byrnes, Victoria Svidenko, Donald McNamara, Joseph Cusimano, Michael Paul Scott Bauer, Daniel Howard Black
-
Publication number: 20190073247Abstract: A computation node device includes a buffer configured to store first data, a receiver configured to receive a packet including second data, an error check circuit configured to perform an error check of the packet and output a check result, and an operation device configured to perform, before receiving the check result output from the error check circuit, a reduction operation by using the first data stored in the buffer and the second data included in the packet and output an operation result of the reduction operation when the check result output from the error check circuit indicates non-existence of an error in the packet.Type: ApplicationFiled: August 6, 2018Publication date: March 7, 2019Applicant: FUJITSU LIMITEDInventors: YUJI KONDO, Shinya Hiramoto, Yuichiro Ajima
-
Publication number: 20190073248Abstract: Systems, methods, apparatuses, and software for touch input systems in computing environments are provided herein. In one example, an interaction service positioned logically between an operating system and an application is provided. The interaction service directs a processing system to receive a call from the application referencing an interaction class to attach to an object in a user interface used for the application, wherein the interaction class comprises a set of declarative statements. The interaction class attaches to the object in the user interface. A user input is then identified to the operating system associated with the object. In response to the user input, the interaction service determines which one of the declarative statements corresponds to the user input. The one of the declarative statements is then executed to call corresponding native code that performs an action with respect to the object.Type: ApplicationFiled: November 5, 2018Publication date: March 7, 2019Inventors: Brent Gilbert, Benjamin D. Haynes, Tony J. Beeman, Tyler R. Adams
-
Publication number: 20190073249Abstract: Embodiments of the present invention provide a method, system and computer program product for the integration of a rules engine with message oriented middleware. In an embodiment of the invention, a method for managing a messaging component in message oriented middleware has been provided. The method includes creating shared memory in the memory of a computer and adding or deleting tokens in the shared memory corresponding to objects such as messages and message queues, created in and removed from, respectively, in a messaging component of message oriented middleware. The method additionally includes applying rules in a rules engine to the tokens in the shared memory. Finally, the method includes directing management operations in the messaging component responsive to the applied rules by the rules engine.Type: ApplicationFiled: November 6, 2018Publication date: March 7, 2019Inventors: Geoffrey Winn, Neil G. Young
-
Publication number: 20190073250Abstract: A remote procedure call channel for interprocess communication in a managed code environment ensures thread-affinity on both sides of an interprocess communication. Using the channel, calls from a first process to a second process are guaranteed to run on a same thread in a target process. Furthermore, calls from the second process back to the first process will also always execute on the same thread. An interprocess communication manager that allows thread affinity and reentrancy is able to correctly keep track of the logical thread of execution so calls are not blocked in unmanaged hosts. Furthermore, both unmanaged and managed hosts are able to make use of transparent remote call functionality provided by an interprocess communication manager for the managed code environment.Type: ApplicationFiled: September 7, 2018Publication date: March 7, 2019Applicant: Microsoft Technology Licensing, LLCInventors: Jackson M. Davis, John A. Shepard
-
Publication number: 20190073251Abstract: Apparatus having an array of memory cells include a controller configured to read a particular memory cell of a last written page of memory cells of a block of memory cells of the array of memory cells, determine whether a threshold voltage of the particular memory cell is less than a particular voltage level, and mark the last written page of memory cells as affected by power loss during a programming operation of the last written page of memory cells when the threshold voltage of the particular memory cell is determined to be higher than the particular voltage level.Type: ApplicationFiled: November 2, 2018Publication date: March 7, 2019Applicant: MICRON TECHNOLOGY, INC.Inventors: Michael G. Miller, Ashutosh Malshe, Violante Moschiano, Peter Feeley, Gary F. Besinga, Sampath K. Ratnam, Walter Di-Francesco, Renato C. Padilla, JR., Yun Li, Kishore Kumar Muchherla
-
Publication number: 20190073252Abstract: A recording control device, a recording control method, and a recording tape cartridge capable of estimating a lifetime of the recording tape cartridge are obtained. A recording control device reads information correlated with an error rate of reading or writing of data from or to a magnetic tape included in a recording tape cartridge, the information being recorded on a RFID tag included in the recording tape cartridge, and a measurement date of the information, and estimates a lifetime of the recording tape cartridge using the read information and the read measurement date, and the information measured at the time of using the recording tape cartridge and a measurement date.Type: ApplicationFiled: September 3, 2018Publication date: March 7, 2019Inventors: Naoaki TOKAI, Hirokazu HASHIMOTO, Yosuke SUMIYA
-
Publication number: 20190073253Abstract: The flow of events though an event-analysis system is controlled by a number of event throttles which filter events, prioritize events and control the rate at which events are provided to event-processing components of the event-analysis system. Incoming events to the event-analysis system are associated with a profile, and a metrics engine generates metrics based on the incoming events for each profile. The flow of events to the metrics engine is controlled on a per profile basis, so that excessive generation of new metrics and new profiles is limited. If the system from which the events originate is compromised, metrics associated with compromised profiles may be frozen to avoid corrupting existing metrics. Processing of events and anomalies by analysis engines within the event-analysis system may be delayed to allow the accumulation of metrics necessary for accurate analysis.Type: ApplicationFiled: November 2, 2018Publication date: March 7, 2019Inventor: Nima Sharifi Mehr
-
Publication number: 20190073254Abstract: Disclosed herein are systems and methods for managing information management operations. The system may be configured to employ a work flow queue to reduce network traffic and manage server processing resources. The system may also be configured to forecast or estimate information management operations based on estimations of throughput between computing devices scheduled to execute one or more jobs. The system may also be configured to escalate or automatically reassign notification of system alerts based on the availability of system alert recipients. Various other embodiments are also disclosed herein.Type: ApplicationFiled: November 8, 2018Publication date: March 7, 2019Inventors: Anand Vibhor, Bhavyan Bharatkumar Mehta, Amey Vijaykumar Karandikar
-
Publication number: 20190073255Abstract: A storage device includes a receiving circuit including a correction circuit configured to correct an input signal from a host system based on correction factors and output the corrected input signal as an output signal containing a data value that is to be stored in the storage device, an interface controller configured to adjust the correction factors based on a difference value generated by the correction circuit using the output signal, and a transmission circuit configured to transmit the correction factors to the host system.Type: ApplicationFiled: February 26, 2018Publication date: March 7, 2019Inventors: Masayoshi SATO, Ichirou HARA
-
Publication number: 20190073256Abstract: An abnormality determination means performs detection of abnormality of one of the pairs of detection means at a normal speed, and performs detection of abnormality of the other of the pairs at a speed not higher than the normal speed, and, when a sign of abnormality of the detection means is detected at the normal speed, a CPU performs switching to the other normal pair and continues control, and the abnormality determination means performs detection of abnormality of the other normal pair at the normal speed, and meanwhile, continues to perform detection of abnormality of the abnormal pair at a speed not higher than the normal speed.Type: ApplicationFiled: May 24, 2016Publication date: March 7, 2019Applicant: Mitsubishi Electric CorporationInventors: Eiji IWAMI, Munenori YAMAMOTO
-
Publication number: 20190073257Abstract: A method and system can implement error and event log correlation in an apparatus and include extracting one or more log information associated with a storage location and creating a flexible structure of the one or more log information. The one or more log information is translated to a database store based on a user input. A match level is determined between an event and error data through the one or more log information extracted. When the match level exceeds a predetermined value, a relationship between the event and error data is created through an algorithm and a shareable entry is created for the relationship in a format usable by another apparatus.Type: ApplicationFiled: November 27, 2017Publication date: March 7, 2019Applicant: Infosys LimitedInventors: Sudipto Shankar Dasgupta, Mayoor Rao, Ganapathy Subramanian
-
Publication number: 20190073258Abstract: Technologies are described herein for differentiating normal operation of an application program from error conditions to predict, diagnose, and recover from application failures. Access to resources by the application program is monitored, and resource access events are logged. Resource access patterns are established from the logged resource access events utilizing computer pattern recognition techniques. If subsequent access to resources by the application program deviates from the established patterns, then a user and/or administrator of the application program is notified of a potential error condition based on the detected deviation. In addition, sequences of resource access events that deviate from the established resources access patterns are correlated with an error condition based on a temporal proximity to the time of occurrence of the error to provide diagnostic information regarding the error.Type: ApplicationFiled: November 2, 2018Publication date: March 7, 2019Inventors: Matthew David YOUNG, Kristofer Hellick REIERSON, Eric JEWART
-
Publication number: 20190073259Abstract: Disclosed include a device and a method for storing a neural network. The device includes a plurality of memory cells configured to store weights of the neural network. The plurality of memory cells may include one or more faulty cells. The device further includes a processor coupled to the plurality of memory cells. The processor is configured to construct the neural network based on a structure of the neural network and a subset of the weights stored by the plurality of memory cells. The subset of the weights may exclude another subset of the weights stored by one or more memory cells comprising the one or more faulty cells.Type: ApplicationFiled: December 12, 2017Publication date: March 7, 2019Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Minghai Qin, Dejan Vucinic, Chao Sun
-
Publication number: 20190073260Abstract: An information processing apparatus includes a memory and a processor. The memory stores a first string of error detection codes each corresponding to a used partial area of a stack area allocated to a program. The processor generates, when execution of the program is interrupted, a differential string of error detection codes each corresponding to a used partial area of a difference between used partial areas at the time of generating the first string and used partial areas at the interruption. The processor obtains a second string of error detection codes by reflecting the differential string to the first string. The processor generates, when the execution of the program is resumed, a third string of error detection codes each corresponding to a used partial area of the stack area at the resumption. The processor detects stack destruction based on collation between the second string and the third string.Type: ApplicationFiled: August 24, 2018Publication date: March 7, 2019Applicant: FUJITSU LIMITEDInventor: Yoshihisa MORIZUMI
-
Publication number: 20190073261Abstract: An error check and scrub (ECS) mode enables a memory device to perform error checking and correction (ECC) and count errors. An associated memory controller triggers the ECS mode with a trigger sent to the memory device. The memory device includes multiple addressable memory locations, which can be organized in segments such as wordlines. The memory locations store data and have associated ECC information. In the ECS mode, the memory device reads one or more memory locations and performs ECC for the one or more memory locations based on the ECC information. The memory device counts error information including a segment count indicating a number of segments having at least a threshold number of errors, and a maximum count indicating a maximum number of errors in any segment.Type: ApplicationFiled: November 1, 2018Publication date: March 7, 2019Inventors: John B. HALBERT, Kuljit S. BAINS
-
Publication number: 20190073262Abstract: An error checking and correcting (ECC) decoding method and apparatus are provided. A decoding circuit decodes a codeword using (or without using) reference information, wherein when the decoding circuit fails to decode a first codeword, the decoding circuit decodes a second codeword to produce decoded data. The decoding circuit checks whether a change has occurred from each codeword bit of the second codeword to a corresponding bit of the decoded data. In accordance with a bit position of the changed corresponding bit, the decoding circuit correspondingly changes the first codeword to a modified codeword, and/or correspondingly changes the reference information to modified information. The decoding circuit performs the ECC decoding again on the modified codeword (or the first codeword) using (or without using) the modified information.Type: ApplicationFiled: November 9, 2017Publication date: March 7, 2019Applicant: VIA Technologies, Inc.Inventors: Ching-Yu Chen, Yi-Lin Lai, Chen-Te Chen
-
Publication number: 20190073263Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: ApplicationFiled: November 8, 2018Publication date: March 7, 2019Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
-
Publication number: 20190073264Abstract: The present invention provides a data storage device including a flash memory.Type: ApplicationFiled: October 29, 2018Publication date: March 7, 2019Inventors: Hsu-Ping Ou, Ho-Chien Hsu
-
Publication number: 20190073265Abstract: Incremental RAID stripe update parity calculation includes: receiving a first portion of data of a RAID stripe for writing to a first memory location of a plurality of solid state drives; calculating a first parity value for the first portion of data of the RAID stripe; receiving a second portion of data of the RAID stripe for writing to a second memory location that is different from the first memory location; calculating a second parity value in dependence upon the second portion of the data of the RAID stripe and upon the first parity value; and responsive to successfully writing the second portion of data of the RAID stripe, replacing the first parity value with the second parity value.Type: ApplicationFiled: September 7, 2017Publication date: March 7, 2019Inventors: TIMOTHY BRENNAN, MARCO SANVIDO, CONSTANTINE SAPUNTZAKIS
-
Publication number: 20190073266Abstract: A decoding method is provided according to an exemplary embodiment. The method includes: reading first data and second data from a rewritable non-volatile memory module according to a read command; generating a re-read data set if a default decoding operation performed for the first data and the second data respectively fails; reading a to-be-decoded data set from the rewritable non-volatile memory module according to the re-read data set, and performing a first decoding operation for the first data based on the to-be-decoded data set; removing identification information corresponding to the second data from the re-read data set and storing the corrected second data if the second data is corrected in the first decode operation; and transmitting the corrected first data and the corrected second data to a host system.Type: ApplicationFiled: October 31, 2017Publication date: March 7, 2019Applicant: PHISON ELECTRONICS CORP.Inventor: Luong Khon