Abstract: A microprocessor with Booth multiplication, in which several acquisition registers are used. In a first word length, a first acquisition register stores an unsigned ending acquisition of a first multiplier number carried in multiplier number supply data, and a third acquisition register stores a starting acquisition of a second multiplier number carried in the multiplier number supply data. In a second word length that is longer than the first word length, a fourth acquisition register stores a middle acquisition of a third multiplier number carried in the multiplier number supply data. A partial product selection circuit is required for selection of a partial product, to get the partial product from Booth multiplication based on the third acquisition register (corresponding to the first word length) or based on the fourth acquisition register (corresponding to the second word length).

Abstract: A microprocessor provides at least two storage areas and uses a datapath for Booth multiplication. According to a first and second field of a microinstruction, the datapath gets multiplicand number supply data from the first storage area and multiplier number supply data from the second storage area. The datapath operates according to a word length indicated in a third field of the microinstruction. The datapath gets multi-bit acquisitions for Booth multiplication from the multiplier number supply data. The datapath divides the multiplicand number supply data into multiplicand numbers according to the word length, and performs Booth multiplication on the multiplicand numbers based on the multi-bit acquisitions to get partial products. According to the word length, the datapath selects a part of the partial products to be shifted and added for generation of a plurality of products.

Abstract: An arithmetic processing device includes a coefficient memory storing coefficients of a Taylor series expansion of a trigonometric function, a multiply-add arithmetic unit, a first bypass path supplying an output of the multiply-add arithmetic unit to a register file, an OR circuit calculating OR of a sign bit of the output of the multiply-add arithmetic unit and a least significant bit of a second input, a first selector selecting either a first input y or a value “1.0” an EOR circuit calculating an EOR of a first bit of the second input and a sign bit of an output of the first selector, and a second bypass path supplying the least significant bit of the second input to a coefficient selector. The multiply-add arithmetic unit executes an auxiliary instruction repeatedly while modifying a coefficient index from a maximum value to a minimum value to calculate sin (x).

Abstract: A system and method for generating a random number from an IP network is provided. A first datagram is transmitted from a first system to a second system and back to the first system. A second datagram is transmitted from the first system to the second system and back to the first system. The time elapsed between transmission of the first datagram to the second system and receipt of the first datagram back at the first system is measured as a first elapsed time. The time elapsed between transmission of the second datagram to the second system and receipt of the second datagram back at the first system is measured as a second elapsed time. The difference between the first elapsed time and the second elapsed time provides a random value.

Abstract: A method facilitates development of instructions in a precise syntax, such as built-in functions of a computational system such as a spreadsheet application, using natural language (NL) input. A user may enter NL input in a workspace. An NL processing system may process the NL input to generate instruction(s) in a precise syntax that corresponds to the NL input. The instruction(s) in the precise syntax then may be included in the workspace.

Abstract: A code completion tool uses machine learning models to more precisely predict the likelihood of a method invocation completing a code fragment that follows one or more method invocations of a same class in a same document during program development. In one aspect, the machine learning model is a n-order Markov chain model that is trained on features that represent characteristics of the context of method invocations of a class in commonly-used programs from a sampled population.

Abstract: Disclosed is a mobile robot. The mobile robot including a programmable input module includes a processor controlling the mobile robot, an input module receiving a command for programming the mobile robot from a user, a sensor module sensing an ambient change of the mobile robot, and an operation module operating depending on the action command input from the input module when the processor executes a command sequence including a command input from the input module. The control command includes a repeat command, and the processor repeats the execution of the action command input from the input module before the repeat command is input.

Abstract: An orchestration engine provides a technical output across multiple programmable objects such as electronic devices, virtual objects and cloud based services in response to user specified logic. The orchestration engine may be deployed on a mobile computer, a tablet computer, a laptop computer, a desktop computer, a wired or wireless electronic device in the system or on a server computer connected via internet. The orchestration engine is capable of supporting extensibility in order to expand support for similar common interaction methods to newer electronic devices via a plug-in framework by specifying the communication protocol of the new element and its capabilities in a descriptive way via a markup language. The orchestration engine is provided along with a library of drag and drop Visual Programming Language steps required for providing executable computer program steps for specifying a user specified logic by computer language illiterate person.

Abstract: Disclosed examples to detect and annotate backedges in data-flow graphs include: a characteristic detector to store a node characteristic identifier in memory in association with a first node of a dataflow graph; a characteristic comparator to compare the node characteristic identifier with a reference criterion; and a backedge identifier generator to generate a backedge identifier indicative of a backedge between the first node and a second node of the dataflow graph based on the comparison, the memory to store the backedge identifier in association with a connection arc between the first and second nodes.

Abstract: The example embodiments are directed to a system and method for generating and controlling a user interface for managing a software development lifecycle of an industrial software application. In one example, the method includes developing a software application via a user interface, storing an application file representing the developed software application in a code repository associated with the user interface, testing the application file to determine whether the developed software application successfully satisfies requirements for a platform, and deploying the successfully tested application file from the code repository to the platform and activating the application on the platform, in response to receiving a user request.

Abstract: The disclosure invention provides a method for executing a program compiled for a source architecture on a machine having a different target architecture, a non-transitory computer readable medium configured to store instructions for performing such a method, and a system for performing such a method.

Abstract: Disclosed embodiments describe systems and methods for versioning a cloud environment for a device. A versioning system can store a snapshot of a first version of an environment of a device for using a cloud provider of a plurality of cloud providers. The environment can include one or more resource template files and one or more deployment application programming interfaces (APIs) for the cloud provider. The versioning system can receive a request to automatically deploy a second version of the environment for the device. A snapshot of the second version of the environment can include at least one second resource template file different than the one or more resource template files of the snapshot of the first version of the environment. The versioning system can automatically deploy the second version of the environment responsive to the request.

Abstract: The current document is directed to methods and systems that carry out live migration of multi-node applications in distributed-computing systems, including cloud-computing applications in cloud-computing facilities. The disclosed methods and systems employ an installer/agent and a data-transformation component to install new versions of a multi-node application within a distributed computing system and to then warm start each application-provided service within the newly installed new-version application nodes. Following a data sync operation, each warm-started application service is brought online to service subsequently received service requests as older-version corresponding services of current application nodes complete request services and terminate, providing live migration from an older version multi-node application to a new-version multi-node application without service-provision interruption.

Abstract: A method for updating a software program installed in a target electronic device includes: displaying a barcode that encodes device information; by a mobile electronic device, scanning the barcode and decoding the barcode to obtain the device information; communicating, by the mobile electronic device, with an update server to download update data; by the mobile electronic device, transmitting the update data to the target electronic device through wireless communication; and updating, by the target electronic device, the software program installed therein to a new version using the received update data.

Abstract: An electronic apparatus and a firmware update method thereof are provided. The electronic apparatus includes a firmware storage device, a microcontroller and a network interface module. Firmware is stored in the firmware storage device, and the microcontroller is coupled to the firmware storage device. The network interface module is coupled to the microcontroller, receives a packet from a remote server via a network, and determines whether the packet conforms to a specific format by determining whether the packet is a Wake-on-LAN packet and whether the packet includes a firmware update command. If the packet conforms to the specific format, the microcontroller obtains firmware update data provided by the remote server through the network interface module, to refresh the firmware stored in the firmware storage device by using the firmware update data.

Abstract: Embodiments described herein provide a system and method for secure delivery of assets to a trusted device. Multiple levels of verification are implemented to enable components of a software update and asset delivery system to verify other components within the system. Furthermore, updates are provided only to client devices that are authorized to receive such updates. In one embodiment, the specific assets provided to a client device during a software update can be tailored to the client device, such that individual client devices can receive updated versions of software asset at a faster or slower rate than mass market devices. For example, developer or beta tester devices can receive pre-release assets, while enterprise devices can receive updates at a slower rate relative to mass market devices.

Abstract: A program update system that includes a distribution device with an electronic control unit configured to distribute a computer program; and a communication device with an electronic control unit configured to mutually transmit/receive a communication signal and a new computer program, thereby storing the new computer program distributed to the communication device into a memory of the communication device and updating the computer program.

Abstract: Techniques are disclosed for efficiently updating multiple computing systems in potentially heterogeneous computing environments. Embodiments provide for efficient patching of multiple software applications executing in multiple execution environments. For example, a custom installation tool can be provided to each of the computing devices in the cloud infrastructure system. The computing devices can execute the custom installation tool and identify, retrieve, and apply the necessary patches to applications on the computing devices. The patch-related processing across the multiple computing devices may occur in parallel such that at least a portion of the processing is performed concurrently from one another.

Abstract: A system receives one or more messages including information related to one or more issues associated with a software application installed on a user device. In response to receiving the message, a processor in the system identifies a user context associated with the user device, wherein the user context comprises usage information related to the software application. The processor further analyzes the received information and the user context associated with the user device to determine one or more errors associated with the software application. One or more software updates that are available and associated with the one or more errors are determined. The system automatically installs one or more of the determined software updates on the user device. Embodiments of the present invention further include a method and computer program product for managing and installing one or more software updates in substantially the same manner as is described above.

Abstract: A memory system may include: a nonvolatile memory device including a system region for storing lifespan information of a plurality of memory blocks and an one-Time Programmable (OTP) region which is not reset when firmware is upgraded; a function component configured to store the firmware; an interface configured to receive new firmware for upgrade; a validation control component configured to perform a validation operation of the nonvolatile memory device; and an upgrade component configured to upgrade the firmware when the validation operation of the nonvolatile memory device is performed, wherein the validation control component selects at least one backup block by referring to the OTP region, backs up the lifespan information to the at least one backup block, and then controls the upgrade component to upgrade the firmware.

Abstract: Communication network architectures, systems and methods for supporting a network of mobile nodes. As a non-limiting example, various aspects of this disclosure provide communication network architectures, systems, and methods for supporting a dynamically configurable communication network comprising a complex array of both static and moving communication nodes (e.g., the Internet of moving things). Aspects of the disclosure disclose systems and methods for reliable software update in a network of moving things including, for example, autonomous vehicles.

Abstract: A relay device and a hot water supply device are provided. A communication adapter downloads an update program for software update of the constituent devices of a hot water supply system from a management center via a communication network (the Internet). The downloaded update program is stored in a storage part in the communication adapter. When there is more than one software update target device, the communication adapter sequentially selects one of the target devices and sequentially transmits the update program stored in the storage part to the devices one by one via a communication line.

Abstract: A source control system is used for the distributed incremental updating of trays that include all of the dependencies needed for an application to execute within a computing environment. An application of a first version of a tray is executed on a server responsive to the first version of the tray being retrieved from a source control system. Tray management software of the first version of the tray receives a request to update the tray to a second version. The tray management software requests a changeset including file differences between the first and second versions of the tray from the source control system. Responsive to a determination by the tray management software that there are no pending requests preventing an update, the tray is updated from the first version to the second version by updating files in the tray according to the changeset.

Abstract: A method for controlling a web application state in a micro-service architecture may be provided. The method loading a current state of the web application via a server-side state micro-service from a server state store upon a navigation to a website relating to a server-side micro-service of the web application. The method also comprises triggering a state change of the web application by a user interface control of the client user interface component, transmitting the changed state from the server-side micro-service of the web application to the server-side state micro-service, managing the changed state by the server-side state micro-service together with a state identifier in a server state store, transmitting the changed state and the state identifier from the server-side state micro-service to the state client, and notifying the client user interface component about the changed state.

Abstract: The current document is directed to an automated-application-release-management system that organizes and manages the application-development and application-release processes to allow for continuous application development and release. The current document is particularly directed to implementations in which the automated application-release-management subsystem provides code-change ratings and developer ratings used throughout the code-change-submission-to-acceptance process. Code-change ratings and developer ratings are used to tailor tasks and control flow within the code-change-submission-to-acceptance process in order to respond to particular characteristics of code changes and developers.

Abstract: An approach is proposed to support version control for integrating updated web-based components with a native application of a mobile device. A new version of a mini app is received at an application version control module configured to control versioning of the mini app and the native application, wherein the mini app includes one or more web-based features in JavaScript to be integrated with the native application. Version compatibility checks are performed to confirm that the new version of the mini app only contains native dependencies that match with a version of the native application the version of the mini app depends on. The new version of the mini app is integrated with the native application into the target mobile application if the version compatibility checks pass. Finally, the target mobile application is uploaded to an app store to make the target mobile application available to an end user.

Abstract: A microprocessor for neural network computing having a mapping table, a microcode memory, and a microcode decoding finite-state machine (FSM) is disclosed. According to the mapping table, a macroinstruction is mapped to an address on the microcode memory. The microcode decoding FSM decodes contents which are retrieved from the microcode memory according to the address, to get microinstructions involving at least one microinstruction loop that is repeated to operate a datapath to complete the macroinstruction.

Abstract: An apparatus and method of operating a data processing apparatus are provided. The data processing circuitry is responsive to a hint instruction to then assert at least one performance modifying control signal, when subsequently generating control signals for other data processing instructions. This causes the data processing functional hardware which performs the data processing operations defined by the data processing instructions to operate in a modified manner, although the data processing results produced do not change in dependence on whether the at least one performance modifying control signal is asserted.

Abstract: An apparatus and method for performing multiply-accumulate operations.

Abstract: A method performed by a processor includes receiving an instruction. The instruction indicating a source operand, indicating a stride, indicating at least one set of strided data element positions out of all sets of strided data element positions for the indicated stride, and indicating at least one destination packed data register. The method also includes storing, in response to the instruction, for each of the indicated at least one set of strided data element positions, a corresponding result packed data operand, in a corresponding destination packed data register of the processor. Each result packed data operand including a plurality of data elements, which are from the corresponding indicated set of strided data element positions of the source operand. The strided data element positions of the set are separated from one another by integer multiples of the indicated stride. Other methods, processors, systems, and machine readable media are also disclosed.

Abstract: A microprocessor with dynamically adjustable bit width is provided, which has a bit width register, a datapath, a statistical register, and a bit width adjuster. The bit width register stores at least one bit width. The datapath operates according to the bit width stored in the bit width register to acquire input operands from received data and process input operands. The statistical register collects calculation results of the datapath. The bit width adjuster adjusts the bit width stored in the bit width register based on the calculation results collected in the statistical register.

Abstract: A vector friendly instruction format and execution thereof. According to one embodiment of the invention, a processor is configured to execute an instruction set. The instruction set includes a vector friendly instruction format. The vector friendly instruction format has a plurality of fields including a base operation field, a modifier field, an augmentation operation field, and a data element width field, wherein the first instruction format supports different versions of base operations and different augmentation operations through placement of different values in the base operation field, the modifier field, the alpha field, the beta field, and the data element width field, and wherein only one of the different values may be placed in each of the base operation field, the modifier field, the alpha field, the beta field, and the data element width field on each occurrence of an instruction in the first instruction format in instruction streams.

Abstract: An apparatus and method for scalable interrupt reporting.

Abstract: A predicted branch result is determined based on at least a portion of branch prediction information, which is updated based on an actual branch result, which is provided based on an executed branch instruction. For a first execution of a first branch instruction, the updating includes: computing a randomized value and storing the randomized value in association with an identified subset of one or more contexts that includes a context associated with the first branch instruction, obfuscating the actual branch result based at least in part on the randomized value, and storing a resulting obfuscated value in the branch prediction information. Providing a predicted branch result for a second execution of the first branch instruction includes: retrieving the obfuscated value from the branch prediction information, retrieving the randomized value, and de-obfuscating the obfuscated value using the randomized value to recover the actual branch result as the predicted branch result.

Abstract: Instructions are executed in a pipeline of a processor, where each instruction is associated with a particular context. A first storage stores branch prediction information characterizing results of branch instructions previously executed. The first storage is dynamically partitioned into partitions of one or more entries. Dynamically partitioning includes updating a partition to include an additional entry by associating the additional entry with a particular subset of one or more contexts. A predicted branch result is determined based on at least a portion of the branch prediction information. An actual branch result provided based on an executed branch instruction is used to update the branch prediction information. Providing a predicted branch result for a first branch instruction includes retrieving a first entry from a first partition based at least in part on an identified first subset of one or more contexts associated with the first branch instruction.

Abstract: Instructions are executed in a pipeline. Storage accessible to the pipeline stores branch prediction information characterizing results of branch instructions previously executed. A predicted branch result is provided, for at least some branch instructions, based on a selected predictor of multiple predictors. An actual branch result is provided based on an executed branch instruction, and the branch prediction information is updated based on the actual branch result. The predictors include: a first predictor that determines the predicted branch result based on at least a portion of the branch prediction information; and a second predictor that determines the predicted branch result independently from the branch prediction information.

Abstract: Systems and methods of selecting a collection of compatible issue-ready instructions for parallel execution by functional units in a superscalar processor in a single clock cycle. All possible instructions (opcodes) to be executed by the functional units are pre-arranged into several scenarios based on potential resource conflicts among the instructions. Each scenario includes multiple groups of predefined instructions. During operation, concurrently for all the groups, an issue-ready instruction is identified with reference to each group based on group-specific selection policies. Further, based on the identified instructions, predefined policies are applied to select one or more scenarios and select among the picks of the selected scenarios. As a result, the output instructions of the selected scenarios are issued for parallel execution by the functional units.

Abstract: Variable latency flush filtering including receiving a first flush instruction tag (ITAG) and a second flush ITAG, wherein the first flush ITAG and the second flush ITAG are instructions to invalidate internal operation results after an internal operation identified by the first flush ITAG and the second flush ITAG; determining that the second flush ITAG is before the first flush ITAG by comparing the first flush ITAG and the second flush ITAG; determining that the first flush ITAG requires adjustment; and delaying the flush to a subsequent cycle in response to determining that the second flush ITAG is before the first flush ITAG and determining that the first flush ITAG requires adjustment.

Abstract: Hardware units and methods for performing matrix multiplication via a multi-stage pipeline wherein the storage elements associated with one or more stages of the pipeline are clock gated based on the data elements and/or portions thereof that known to have a zero value (or can be treated as having a zero value). In some cases, the storage elements may be clock gated on a per data element basis based on whether the data element has a zero value (or can be treated as having a zero value). In other cases, the storage elements may be clock gated on a partial element basis based on the bit width of the data elements. For example, if bit width of the data elements is less than a maximum bit width for the data elements then a portion of the bits related to that data element can be treated as having a zero value and a portion of the storage elements associated with that data element may not be clocked. In yet other cases the storage elements may be clock gated on both a per element and a partial element basis.

Abstract: Technologies for performing hyper-dimensional operations in memory includes a device with a memory media and a memory controller. The memory controller is configured to receive a query from a requestor and determine, in response to receiving the query, a reference hyper-dimensional vector associated with the query. The memory controller is further configured to perform a nearest neighbor search by searching columns of a stochastic associative array in the memory media to determine a number of matching bit values for each row relative to the reference hyper-dimensional vector, wherein each bit in a column of the stochastic associative array represents a bit value of a corresponding row, identify a closest matching row that has a highest number of matching bit values, and output data of the closest matching row.

Abstract: An information handling system includes a plurality of storage class memory (SCM) devices and a processor. Each SCM device is configured to determine a health indication of the SCM device. The processor is configured to execute code to provide a basic input/output system (BIOS). The BIOS receives the health indications, ranks the SCMs based upon the health indications, determines that a first BIOS function has a first quality of service level, and allocates the first BIOS function to a first SCM based upon the first quality of service level, wherein the first SCM has a highest rank of the SCMs.

Abstract: Examples relate to integrity reports. In an implementation, an entity for executing a function is launched, the entity operating one or more files for executing the function. In response to the entity being launched, an entity image integrity report is generated comprising, for one or more files operated by the entity, a reference to the file measurement in a first integrity report the first integrity report containing measurements of a plurality of files operable in one or more entities. Alternatively, in response to the entity being launched, an entity integrity report is generated comprising a file measurement for each of the files operated by the entity.

Abstract: A device comprises a first processor and a second processor, the first processor being able to execute a boot loader. The device implements a phase of boot-securing in the event of an electrical anomaly occurring while the boot loader is being updated, the phase of boot-securing being implemented by way of an emergency power supply source acting as a relay for a main power supply, the phase of boot-securing comprising the following steps: stopping (203) the current updating of the boot loader; and invalidating (205) the boot loader. The device implements a phase of delayed booting of the second processor, enabling to boot the device in a boot loader update mode if said stored boot loader is invalid.

Abstract: An STP warm reboot system includes first switch device(s) including first switch ports, and a second switch device including second switch ports linked to respective first switch ports. During a warm reboot, the second switch device blocks designated-state second switch ports that are linked to first switch ports that have either an alternate role or a discarding state, redirects BPDUs identifying a designated peer port role and received on designated-state second switch ports from their respective linked first switch ports back to those first switch ports, and identifies topology change notification(s) received on the second switch ports. Subsequent to the warm reboot process, the second switch device reprograms the second switch ports that have experienced a state change during the warm reboot, and sends a topology change notification based on the identification of the topology state change notification received by the second switch ports during the warm reboot.

Abstract: A networked computer system is described herein. The networked computer system includes a mobile computing device and a mobile application server in communication with the mobile computing device. The mobile application server computer includes a processor programmed to display a company culture selection webpage on the mobile computing device including one or more user selectable company culture indicators. The mobile application server then receives a user selection of a company culture indicator and displays an activity capture screen that allows the user to operate a camera of the mobile computing device to capture a digital photo image of an event, select an employee ID associated with one or more employees included in the photo image, and input a textual description of the captured activity.

Abstract: Systems and methods are disclosed for derivation of executable tasks for synchronizing configuration parameters. An example method may comprise: obtaining a first set of configuration parameters of a first computer system corresponding to a first time value; obtaining a second set of configuration parameters of the first computer system corresponding to a second time value; performing a comparison between the first set of configuration parameters and the second set of configuration parameters to determine one or more differences; deriving in view of the comparison, one or more executable tasks to convert the first set of configuration parameters to the second set of configuration parameters; and providing, to a second computer system, the one or more executable tasks for execution by the second computer system to synchronize configuration parameters of the second computer system to configuration parameters of the first computer system corresponding to the second time value.

Abstract: Methods, systems, and devices for preemptively loading code dependencies are described. In some systems, an application server—which may be a software component of a user device—may perform a loading process for an application framework module (e.g., based on receiving an execution request for a corresponding application). To reduce the latency of loading the framework module, the application server may perform one or more preemptive non-framework network requests to retrieve code dependencies for the framework or the application code. These requests may be sent prior to the framework loading process, or in parallel with the framework loading process. The application server may receive the code dependencies in response, and may store these dependencies in a memory cache. When the framework loading process needs these code dependencies, the application server may efficiently access the dependencies locally in the memory cache rather than remotely requesting the dependencies over the network.

Abstract: A method for activating a processing unit using a circuit configuration in response to an activation signal, and when the activation signal exceeds a switching threshold, a reference-voltage source is connected to a supply-voltage source, the reference-voltage source supplies a first reference voltage at a first comparator and supplies a second reference voltage at a second comparator, the first comparator carries out a comparison with the first reference voltage in order to detect a high level of the activation signal, and the second comparator carries out a comparison with a second reference voltage, and if a high level of the activation signal is detected, a voltage supply is activated with a time delay at a particularly low deviation from the desired delay time, via a variation of the supply voltage and the temperature.

Abstract: A virtual-computing environment definition language automates the deployment of a virtualized computing environment. A set of basic requirements of a planned virtual computing environment is described in the definition language to provide a concise, textual representation of the planned environment's architecture. This representation also predicts the planned environment's performance characteristics as a function of expected workloads, such as expected numbers of concurrent users or expected numbers of concurrent transactions. The definition-language representation is then translated into an orchestration template from which virtual resources are provisioned and the virtual-computing environment deployed.

Abstract: A device includes an analog block array, a first analog bus segment coupled to the analog block array, a second analog bus segment coupled to the analog block array, and a third analog bus segment coupled to the analog block array. The device also includes a first I/O pin selectively couplable to the first analog bus segment, a second I/O pin selectively couplable to the second analog bus segment, and a third I/O pin selectively couplable to the third analog bus segment. A first switch is configured to selectively propagate a first analog signal on the first analog bus segment to the second analog bus segment, and a second switch is configured to selectively propagate a second analog signal on the first analog bus segment to the third analog bus segment. In a first mode of operation, the first and second switches are open. In a second mode of operation, the first switch is closed. In a third mode of operation, the second switch is closed.