Patents Issued in September 17, 2019
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Patent number: 10416877Abstract: A systems, method and computer program product for use in guiding handwriting input to a computing device are provided. The computing device is connected to an input device in the form of an input surface. A user is able to provide input by applying pressure to or gesturing above the input surface using either his or her finger or an instrument such as a stylus or pen. The present system and method monitors the input strokes. The computing device further has a processor and at least one application for recognizing the handwriting input under control of the processor. The at least one system application is configured to cause display of, on an interactive display of the computer device, a guide element contiguous with at least a portion of display of digital ink corresponding to the handwriting input. The guide element is configured to guide further handwriting input.Type: GrantFiled: October 19, 2015Date of Patent: September 17, 2019Assignee: MyScriptInventors: Nicolas Rucine, Erwan Jestin, Anthony Laurence
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Patent number: 10416878Abstract: A messaging device allows a user to initiate communication to recipients via a graphical user interface. In some embodiments, messages are composed by a user via a touchscreen display. Pre-existing messages may also be retrieved by the user via the display. Icons representing potential message recipients are displayed, and the user may deliver a message to a recipient by associating the message with the icon that represents the desired recipient, such as by a drag-and-drop or pop-and-hop motion. In addition, the user may indicate to which of the recipient's various electronic devices or services the message is to be delivered. In some embodiments, the user may deliver the message to a group of recipients.Type: GrantFiled: November 28, 2016Date of Patent: September 17, 2019Assignee: T-Mobile USA, Inc.Inventors: Ming Ligh, Paulo S. T. Chow, Valerie Goulart, Anthony Giardini, Georgiana Gormley, Jeff Gough, Patrick Carney
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Patent number: 10416879Abstract: A method for operating an infotainment system of a motor vehicle in which at least one data set stored on at least one mobile terminal is transmitted wirelessly to the infotainment system and received by the infotainment system as soon as a swipe gesture has been detected on the mobile terminal wherein the at least one data set is stored first in a buffer memory of the infotainment system and only then transmitted to a further memory of the infotainment system and then processed by means of the infotainment system when a predetermined confirmation action has been detected on-board. The invention also relates to an infotainment system for a motor vehicle.Type: GrantFiled: October 29, 2015Date of Patent: September 17, 2019Assignee: Audi AGInventors: Thomas Knittl, Vladimir Macoun, Lorenz Bohrer, Carolin Koeberle
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Patent number: 10416880Abstract: A touch input method for a mobile device includes receiving a first touch input as an input of a first finger which is a reference finger, receiving a second touch input of a second finger with elapse of a predetermined time after receiving the first touch input, calculating a relative displacement of the second touch input with respect to the first touch input on the basis of a position of the first touch input and a position of the second touch input, identifying the second finger used for the second touch input on the basis of the relative displacement, determining whether a pattern associated with the first touch input of the first finger and the second touch input of the identified second finger corresponds to a previously stored pattern, correcting the position of the second touch input of the second finger on the basis of a position of the second finger defined in the previously stored pattern when the pattern corresponds to the previously stored pattern, and performing an operation corresponding to thType: GrantFiled: November 2, 2016Date of Patent: September 17, 2019Assignee: XOGAMES INC.Inventor: Eui Joon Youm
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Patent number: 10416881Abstract: A wearable electronic device comprises a ring body defining an annular receiving space within the ring body and a substrate disposed in the annular receiving space. The ring body has an interface disposed on an exterior of the ring body. The substrate has a plurality of capacitive plates positioned proximate the interface.Type: GrantFiled: April 5, 2018Date of Patent: September 17, 2019Assignee: Apollo 13 Designs, LLCInventor: Michael K. Warren
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Patent number: 10416882Abstract: An electronic device with a touch-sensitive surface and display can execute a messaging application. In the messaging application, swipe options can be displayed for messages and threads. Swipe options correspond to actions that can be taken on the messages or threads. Messages and threads can be associated with notification rules as well as be ignored. Composition interfaces and messages can be displayed simultaneously in the messaging application. The messaging application can display a conversation view of a message thread with a common header that can include subject information and names of participants in the threads. The messaging application allows for adding and removing participants to the conversation view. The messaging application allows for grouping search results from a search of messages using a search term. The grouping can be based on the location of the search term within the messages.Type: GrantFiled: May 11, 2018Date of Patent: September 17, 2019Assignee: Apple Inc.Inventors: Lawrence Y. Yang, Stephen O. Lemay, Tiffany S. Jon, Mohammed N. Jisrawi, Cristobal Baray, Chanaka G. Karunamuni
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Patent number: 10416883Abstract: A user terminal apparatus is provided. The user terminal device includes a display having a main display area disposed on a front side of the user terminal apparatus and a sub display area extended from one side of the main display area to be disposed on at least one area of a rear side of the user terminal apparatus and a processor configured to, in response to a predetermined touch input being input on the sub display area, control the display to display a UI displayed on the sub display area on the main display area.Type: GrantFiled: August 29, 2016Date of Patent: September 17, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dae-myung Kim, Il-ho Lee, Hyun-sub Park
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Patent number: 10416884Abstract: An electronic device is disclosed. The electronic device may include a software keyboard that may include keys, each key including a sensing region and a character code. The software keyboard may detect a contact on a sensing region of a key and output the character code of the key. The electronic device may include a memory that may store a fixed layout and a moving layout. The fixed layout may include one or more fixed sensing regions, and each one may correspond to a key and include an unchangeable range. The moving layout may include one or more moving sensing regions, and each one may correspond to a key and include a changeable range. A character code output unit may, in response to contact at a fixed sensing region or moving sensing region, output the character code corresponding to the key of the contacted sensing region.Type: GrantFiled: December 19, 2016Date of Patent: September 17, 2019Assignee: Lenovo (Singapore) PTE. LTD.Inventors: Ryohta Nomura, Jun Luo
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Patent number: 10416885Abstract: Disclosed are systems and methods that model a user's interaction with a user interface. There is provided a data input system, comprising a user interface having a plurality of targets and being configured to receive user input. The system comprises a plurality of models, each of which relates previous user input events corresponding to a target to that target. An input probability generator is configured to generate, in association with the plurality of models, a probability that a user input event corresponds to a particular target. There is also provided a method of modelling a target of a user interface having a plurality of targets and being configured to receive input, by modelling for each target previous user input events which correspond to that target. Furthermore, there is provided a method of inputting data into a system comprising a user interface having a plurality of targets and being configured to receive input.Type: GrantFiled: March 21, 2017Date of Patent: September 17, 2019Assignee: TOUCHTYPE LIMITEDInventors: Benjamin Medlock, Douglas Alexander Harper Orr
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Patent number: 10416886Abstract: The data storage device includes scale-out storage devices and a controller configured to assign commands to the scale-out storage devices and re-assign the commands assigned to the scale-out storage devices based on state information output from a first scale-out storage device among the scale-out storage devices. Each of the scale-out storage devices includes a volatile memory device, a non-volatile memory device, and a scale-out controller configured to control the volatile memory device and the non-volatile memory device.Type: GrantFiled: April 5, 2016Date of Patent: September 17, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Ju Yi, Seok Won Ahn, Jun Ho Choi, Chan Ho Yoon
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Patent number: 10416887Abstract: A hybrid storage device includes at least a first storage device operating under a first storage interface protocol, at least a second storage device operating under a second storage interface protocol, and a drive controller interface. The drive controller interface has a front-end for connecting to a host via a host interface protocol, a back-end for connecting to the first storage device via the first storage interface protocol, and to the second storage device via the second storage interface protocol, and a respective translation module for translating between the host interface protocol and a respective one of the first and second storage interface protocols. The hybrid storage device may be included in a hybrid storage system with a host processor. The host interface protocol may be the same as one of the first and second storage interface protocols, such as NVMe. The protocols may be implemented in hardware or software.Type: GrantFiled: May 17, 2017Date of Patent: September 17, 2019Assignee: Marvell International Ltd.Inventors: Dimitry Melts, Scott Furey
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Patent number: 10416888Abstract: A parallel processing device includes a management unit, a plurality of nodes, and a controller that controls each of the plurality of nodes in accordance with a first command transmitted from the management unit. The controller includes a command storage that stores a second command generated a previous time, a command type identification unit that identifies a command type of the first command transmitted from the management unit, and a command generator that generates a third command by using the second command according to the command type.Type: GrantFiled: August 25, 2017Date of Patent: September 17, 2019Assignee: FUJITSU LIMITEDInventor: Akihiro Waku
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Patent number: 10416889Abstract: A method includes receiving, by a storage unit of a dispersed storage network (DSN) an access request for an encoded data a slice of a set of encoded data slices from a computing device of the DSN. The method further includes queueing, by the storage unit, the access request for the encoded data slice. The method further includes, prior to executing the access request, determining, by the storage unit, whether a session associated with the access request is still active and whether execution the access request for encoded data slice is still needed. When the session is still active and the execution of the access request for the encoded data slice is still needed, the method further includes executing, by the storage unit, the access request for the encoded data slice.Type: GrantFiled: November 22, 2017Date of Patent: September 17, 2019Assignee: PURE STORAGE, INC.Inventors: Andrew Baptist, Joseph Martin Kaczmarek, Yogesh Ramesh Vedpathak
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Patent number: 10416890Abstract: Apparatuses, methods and storage medium associated with application execution enclave cache management, are disclosed herein. In embodiments, an apparatus may include one or more processors with supports for application execution enclaves; cache memory coupled with the one or more processors to be organized into a plurality of cache pages; and an exception handler to be operated by the one or more processors to handle cache page fault exceptions, wherein to handle cache page fault exceptions includes to handle a cache page fault triggered to request additional allocation of one or more cache pages to an execution enclave of an application. Other embodiments may be described and/or claimed.Type: GrantFiled: September 9, 2015Date of Patent: September 17, 2019Assignee: Intel CorporationInventors: Bin Xing, Mark W. Shanahan, Bo Zhang
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Patent number: 10416891Abstract: Systems and methods for transitioning and updating machine instructions from a first system with an older/initial component(s) to a second system or platform with one or more different components and new or modified operations or functions are provided. Embodiments enable improved obsolescence/configuration management and customization of the older/initial system's machine instructions (MI) to a target application/platform with new or modified capabilities. One exemplary system enables processing binary tape tracks for linear flash media over a universal serial bus (USB) to a personal computer (PC) card interface. User interfaces are provided for editing MIs to insert/modify functions or capabilities of obsolete MIs, e.g. binary tape tracks that are customized for a system with obsolete component(s) (e.g. tape drive), transferring data to/from a newer component (e.g. a linear flash media).Type: GrantFiled: September 15, 2017Date of Patent: September 17, 2019Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Douglas N. Morgan, Eric Morgan, Clyde Paul Hager, Jr., Nathan S. Popp, George Vollman, Dave P. Nordquist
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Patent number: 10416892Abstract: An approach, for fileset based data locality management in Distributed File Systems. A data locality manager receives fileset identifiers and associated block allocation information, for storing in data block locality tables. The data locality manager determines data block locality factors based on the fileset identifiers and the block allocation information, creating a collection of the data block locality factors. The data locality manager stores the collection of the data block locality factors in the data block locality tables. The data locality manager receives the fileset identifiers for determining the collection of the data block locality factors associated to the fileset identifiers and outputs the collection of the data block locality factors.Type: GrantFiled: June 24, 2016Date of Patent: September 17, 2019Assignee: International Business Machines CorporationInventors: Cheng Ding, Shuo Feng, Lin Feng Shen, Zheng Cai Yuan, Yong Zheng
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Patent number: 10416893Abstract: A method of operating a mobile device including an embedded storage having a first capacity includes recognizing, in an application processor of the mobile device, that an external storage is connected to the mobile device, and measuring a performance of the external storage in the application processor of the mobile device. When the performance is equal to or greater than a reference value, the embedded storage and the external storage are constituted into one parallel processing storage, and workload is allocated by memory control module of the application processor to the embedded storage and the external storage based on a first performance of the embedded storage and a second performance of the external storage.Type: GrantFiled: March 16, 2017Date of Patent: September 17, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Bum Lee, Seung-Yong Shin, Seok-Heon Lee
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Patent number: 10416894Abstract: Systems and methods dynamically manage replicas of data sets. A collection of data stores is used to redundantly store one or more replicas of one or more data sets. The replicas may be used to respond to read requests from multiple sources. Upon identification of a need to allocate storage space to a data object, space used by one or more of the replicas is allocated to the data object. Various parameters may be utilized in the selection of one or more replicas whose storage space can be allocated to the data object. The parameters may be based at least in part on characteristics of the one or more data sets relative to one another.Type: GrantFiled: October 23, 2017Date of Patent: September 17, 2019Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Swaminathan Sivasubramanian, Bradley E. Marshall, Tate Andrew Certain, Nicholas J. Maniscalco
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Patent number: 10416895Abstract: A storage device may include one or more nonvolatile memory devices and a controller. The nonvolatile memory devices may be configured to store target data. When the number of operations which is performed on the target data is equal to or greater than a first reference value, the controller may be configured to store duplicated data, which is identical to some or all portions of the target data, in the nonvolatile memory devices. When the number of operations performed on the target data becomes equal to or smaller than a second reference value after the duplicated data is generated, the controller may be configured to invalidate the duplicated data.Type: GrantFiled: December 13, 2017Date of Patent: September 17, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Shiva Pahwa, Alex Mohandas
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Patent number: 10416896Abstract: A memory module includes a memory device, a command/address buffering device, and a processing data buffer. The memory device includes a memory cell array, a first set of input/output terminals, each terminal configured to receive first command/address bits, and a second set of input/output terminals, each terminal configured to receive both data bits and second command/address bits. The command/address buffering device is configured to output the first command/address bits to the first set of input/output terminals. The processing data buffer is configured to output the data bits and second command/address bits to the second set of input/output terminals. The memory device is configured such that the first command/address bits, second command/address bits, and data bits are all used to access the memory cell array.Type: GrantFiled: May 23, 2017Date of Patent: September 17, 2019Assignees: Samsung Electronics Co., Ltd., SNU R&DB Foundation, Wisconsin Alumni Research FoundationInventors: Seong-Il O, Nam Sung Kim, Young-Hoon Son, Chan-Kyung Kim, Ho-Young Song, Jung Ho Ahn, Sang-Joon Hwang
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Patent number: 10416897Abstract: A memory system and an operating method thereof include: at least a CPU including multiple CPU cores, wherein the multiple CPU cores include reserved CPU cores and host CPU cores; at least a PCIe link coupled with the CPU, wherein the PCIe link includes at least a PCIe switch and a plurality of memory devices; and the plurality of memory devices coupled with the host CPU cores through respective workload threads and interrupt handlers, wherein the workload threads and interrupt handlers of each of the host CPU cores are configured to be optimized, the host CPU cores are isolated for the optimized workloads threads and interrupt handlers, and the workload threads and interrupt handlers are executed at the host CPU cores coupled thereto.Type: GrantFiled: December 12, 2017Date of Patent: September 17, 2019Assignee: SK hynix Inc.Inventors: Young Tack Jin, Sungjoon Ahn, Seong Won Shin
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Patent number: 10416898Abstract: A method includes sending data access requests to storage units regarding a set of encoded data slices. The method further includes, when a write transaction is pending for the set of encoded data slices, receiving proposal records from the storage units. The method further includes interpreting the proposal records to determine an ordering of visible versions of the set of encoded data slices stored by the storage units. The method further includes determining whether a threshold number of encoded data slices of a desired version of the set of encoded data slices is visible. The method further includes, when the threshold number of encoded data slices is visible, determining whether to proceed with the data access request. The method further includes, when determined to proceed with the data access request, sending a request to proceed with the data access request to the storage units.Type: GrantFiled: May 16, 2018Date of Patent: September 17, 2019Assignee: International Business Machines CorporationInventors: Andrew D. Baptist, Greg R. Dhuse, Ravi V. Khadiwala, Ilya Volvovski
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Patent number: 10416899Abstract: In various embodiment, the present invention teaches a sequencer that identifies an address point of a first data block within a memory and a length of data that comprises that data block and is related to an input of a matrix processor. The sequencer then calculates, based on the block length, the input length, and a memory map, a block count representative of a number of data blocks that are to be retrieved from the memory. Using the address pointer, the sequencer may retrieve a number of data blocks from the memory in a number of cycles that depends on whether the data blocks are contiguous. In embodiments, based on the length of data, a formatter then maps the data blocks to the input of the matrix processor.Type: GrantFiled: June 5, 2018Date of Patent: September 17, 2019Assignee: Tesla, Inc.Inventors: Peter Joseph Bannon, Kevin Altair Hurd, Emil Talpes
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Patent number: 10416900Abstract: Technologies for addressing data in a memory include an apparatus that includes a memory and a controller. The memory is to store sub-blocks of data in a data table and a pointer table of locations of the sub-blocks in the data table. The controller is to manage the storage and lookup of data in the memory. Further, the controller is to store a sub-block pointer in the pointer table to a location of a sub-block in the data table and store a second pointer that references an entry where the sub-block pointer is stored in the pointer table.Type: GrantFiled: June 30, 2016Date of Patent: September 17, 2019Assignee: Intel CorporationInventors: Jawad B. Khan, Vinodh Gopal, Sanjeev N. Trika
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Patent number: 10416901Abstract: A mapping apparatus comprises a mapper that translates from an input key to an output key in one or more storage devices. A pre-mapper for processing update operations comprises a plurality of mapping tablets and an in-memory look-up filter to identify a given mapping table storing a given input key. The mapping tablets comprise at least one dynamic in-memory ingress tablet and a plurality of persisted frozen tablets. For a given update operation, a first entry is added to one dynamic in-memory ingress tablet comprising the input key for the given update operation and a corresponding output key where data for the given update operation is stored; and a second entry is added to the look-up filter comprising the input key of the first entry and an identifier of the dynamic in-memory ingress tablet storing the first entry for the given update operation. The dynamic in-memory ingress tablet is persisted as a persisted frozen tablet.Type: GrantFiled: October 31, 2017Date of Patent: September 17, 2019Assignee: EMC IP Holding Company LLCInventor: Joris Wils
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Patent number: 10416902Abstract: A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: determining whether a relative relation between a first wear value of first physical erasing units initially configured to be programmed based on a first programming mode and a second wear value of second physical erasing units initially configured to be programmed based on a second programming mode is satisfied; and when the relative relation between the first wear value and the second wear value is not satisfied, selecting one or more third physical erasing units from second physical erasing units. The method also includes: programming the one or more third physical erasing units based on the first programming mode to store first data received from a host system into the one or more third physical erasing units.Type: GrantFiled: April 6, 2016Date of Patent: September 17, 2019Assignee: PHISON ELECTRONICS CORP.Inventor: Hsueh-Yuan Wu
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Patent number: 10416903Abstract: In an example, a portion of a memory array may be selected to be wear leveled based on how often the portion is or is to be accessed. The portion may be wear leveled.Type: GrantFiled: August 14, 2018Date of Patent: September 17, 2019Assignee: Micron Technology, IncInventors: Richard E. Fackenthal, Duane R. Mills
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Patent number: 10416904Abstract: A method for recovering storage object records in solid state memory. The method includes, for each memory location of a solid state memory region, reading data fragment metadata and identifying, based on the data fragment metadata, a storage object. The storage object occupies a subset of memory locations of the memory locations of the solid state memory region. The method further includes identifying a first and a last memory location of the subset of memory locations, and restoring a storage object record for the storage object, wherein the storage object record comprises variables that enable a logical to physical address translation for the storage object.Type: GrantFiled: December 30, 2016Date of Patent: September 17, 2019Assignee: EMC IP Holding Company LLCInventor: Richard H. Van Gaasbeck
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Patent number: 10416905Abstract: An example method of controlling a storage system that includes a replication group. The method may include adding a virtual volume to the replication group by storing a journal entry for the virtual volume at a source site. The journal entry may include: metadata for hooking the virtual volume to a corresponding replica volume; and data indicating a status of the virtual volume. The method may further include sending a message to a replica site instructing it to create the corresponding replica volume for the virtual volume and store a replica journal entry for the replica volume. The method may also include determining whether to set the status of the virtual volume to pending admittance or newly admitted based on whether the replica site was able to successfully create the replica volume and store the replica journal entry.Type: GrantFiled: February 9, 2017Date of Patent: September 17, 2019Assignee: Hewlett Packard Enterprise Development LPInventors: Nathaniel Rogers, Sonali Somyalipi, Robert Neal-Joslin, Lisa Liu, Sujatha Mudupalli
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Patent number: 10416906Abstract: A method includes determining, by a managing unit of a dispersed storage network (DSN), an addition of a new storage unit to a group of storage units. The DSN includes a logical address space divided into a set of logical address sub-spaces, one of which is allocated to the group of storage units. The method further includes reorganizing, by the managing unit, distribution of the logical address sub-space among the new storage unit and each storage unit in the group of storage units to produce a reorganized logical address sub-space. The allocation includes the new storage unit's portion being between portions of first and second storage units. The method further includes transferring, by the first storage unit, a first group of encoded data slices to the new storage unit and transferring, by the second storage unit, a second group of encoded data slices to the new storage unit.Type: GrantFiled: March 23, 2017Date of Patent: September 17, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andrew D. Baptist, Ravi V. Khadiwala, Manish Motwani, Jason K. Resch
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Patent number: 10416907Abstract: A storage system includes a storage device including a first memory area and a second memory area, and a storage control apparatus configured to receive a first command requesting write of first data, cause the storage device to store the first data in the first memory area based on the first command, determine whether to cause the storage device to execute garbage collection on the first memory area based on a data amount of the first data, transmit a first instruction that instructs the storage device to execute the garbage collection on the first memory area, and cause the storage device to store second data in the second memory area when the garbage collection on the first memory area is being executed based on the first instruction and the processor receives a second command requesting write of the second data.Type: GrantFiled: June 14, 2017Date of Patent: September 17, 2019Assignee: FUJITSU LIMITEDInventor: Emi Cho
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Patent number: 10416908Abstract: Provided herein may be a memory system and a method of operating the memory system. The memory system may include a semiconductor device in which data are stored, and a memory controller for communicating with the semiconductor device, sequentially processing tasks included in a descriptor, detecting an error section by checking the tasks in reverse order when an error occurred in the tasks, and reprocessing the tasks included in the detected error section.Type: GrantFiled: June 28, 2017Date of Patent: September 17, 2019Assignee: SK hynix Inc.Inventor: Jeen Park
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Patent number: 10416909Abstract: Methods of operating phase-change memory arrays are described. A method includes determining a pattern to be written to a phase-change memory array and executing, according to the pattern, two or more proper reset sequences on the phase-change memory array to write the pattern to the phase-change memory array. Another method includes executing a set sequence on a phase-change memory array and performing a proper read of the phase-change memory array to obtain a pattern derived from executing the set sequence.Type: GrantFiled: January 21, 2019Date of Patent: September 17, 2019Assignee: Micron Technology, Inc.Inventors: Ferdinando Bedeschi, Claudio Resta, Marco Ferraro
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Patent number: 10416910Abstract: One embodiment relates to a method of saving power in a memory subsystem. A first procedure is performed to save memory controller power by changing a clock toggle rate, and a second procedure is performed to save memory subsystem power by changing a clock frequency for the memory subsystem. A third procedure is performed to rebound back to full speed. Another embodiment relates to a memory subsystem which includes a memory controller, a memory, and a physical input/output interface. The memory controller performs at least a first procedure to save memory controller power by changing a clock toggle rate. Other embodiments and features are also disclosed.Type: GrantFiled: September 20, 2016Date of Patent: September 17, 2019Assignee: Altera CorporationInventor: Siaw Kang Lai
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Patent number: 10416911Abstract: Techniques are disclosed which allow a secondary storage system to provide data to non-production workloads in conjunction with performing data backup and protection tasks. As disclosed, a secondary storage system exposes backup data stored by the secondary storage system to other workloads, such as test and development applications, data analytics, etc. These non-production workloads can run at the same time the secondary storage system provides backup services to a primary storage system. This consolidation eliminates the need for an enterprise to deploy separate storage clusters for analytics, test and development applications, etc. and eliminates unnecessary copies of data.Type: GrantFiled: August 23, 2018Date of Patent: September 17, 2019Assignee: Cohesity, Inc.Inventors: Mohit Aron, Vinay Reddy
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Patent number: 10416912Abstract: A chip select training mode (CSTM) enables a memory subsystem to train a chip select signal separately from command bus training. A memory device and a memory controller can connect via a command bus including a chip select signal line. Instead of training the chip select along with other signal lines of the command bus, a CSTM mode enables the memory subsystem to more accurately train the chip select. The memory device can be triggered for CSTM mode with a command, and then train voltage margining for the CS signal line to align chip select signaling with the memory subsystem clock signal.Type: GrantFiled: September 29, 2017Date of Patent: September 17, 2019Assignee: Intel CorporationInventors: Tonia G. Morris, Christopher P. Mozak, Christopher E. Cox
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Patent number: 10416913Abstract: An information processing device including: a processor configured to collect information on a connected expansion device; and a controller configured to receive the information on the expansion device from the processor, to determine, with respect to a type of an expansion device, whether the expansion device is a specific device that is connected to a storage, and to perform, when the expansion device has been determined to be the specific device, monitoring processing of monitoring an operation of the storage based on information on the storage that is obtained from the specific device.Type: GrantFiled: September 20, 2017Date of Patent: September 17, 2019Assignee: FUJITSU LIMITEDInventor: Ryosuke Watanabe
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Patent number: 10416914Abstract: Embodiments of the present disclosure provide methods and apparatus for path selection in a storage system. The storage system includes a plurality of storage devices, each storage device being connected to a plurality of different HBA ports of a server via a plurality of paths; the method comprises: monitoring a system-wide performance metric of the storage system to obtain dynamic performance statistics; detecting a performance-related event based on the dynamic performance statistics; and selecting, from the plurality of paths, an active path for a storage device of the plurality of storage devices based on the dynamic performance statistics and a result of the detecting. With the methods or apparatus according to the embodiments of the present disclosure, performance bottleneck can be avoided or timely eliminated, load balance can be achieved, and system resources can be utilized more effectively.Type: GrantFiled: December 16, 2016Date of Patent: September 17, 2019Assignee: EMC IP Holding Company LLCInventors: Bing Liu, Man Lv, James Lei Ni, Martin Chaojun Mei
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Patent number: 10416915Abstract: A data storage system having a hashing engine for facilitating data deduplication. A device is provided that includes: a storage media; and a controller, wherein the controller includes a hashing engine for implementing a data deduplication process on data stored in the storage medium, wherein the hashing engine: inputs parameters from a host that specifies a sliding widow size and a boundary condition; implements a rolling hash function; and outputs a data chunk boundary.Type: GrantFiled: May 13, 2016Date of Patent: September 17, 2019Assignee: SCALEFLUXInventors: Hao Zhong, Fei Sun, Yang Liu
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Patent number: 10416916Abstract: A Memory Merging Function “MMF” for merging memory pages. A hardware system comprises a set of memory blades and a set of computing pools. At least one instance of an operating system executes on the hardware system. The MMF is independent of the operating system. The MMF finds a first and a second memory page. The first and second memory pages include identical information. The first and second memory pages are associated with at least one computing unit of the computing units. The MMF obtains a respective memory blade parameter relating to memory blade of the first and second memory pages and a respective latency parameter relating to latency for accessing the first and second memory pages. The MMF releases at least one of the first and second memory pages based on the respective memory blade and latency parameters.Type: GrantFiled: October 19, 2015Date of Patent: September 17, 2019Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventors: Amir Roozbeh, Joao Monteiro Soares, Daniel Turull
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Patent number: 10416917Abstract: Provided is a linking server that can easily link outputted data with another system. The linking server includes: a communication unit that is capable of communicating between a management server that collects one or more pieces of operating information from one or more image forming apparatus, and an external system that performs processing using the one or more pieces of operating information; a storage unit; an input/output unit that acquires the one or more pieces of operating information that is outputted from the management server, and stores that operating information in the storage unit; and a packaging unit that acquires the one or more pieces of operating information, generates compressed data by performing a compression process and a packaging process, and writes the generated compressed data back into the storage unit; wherein the input/output unit outputs the compressed data to the external system.Type: GrantFiled: February 23, 2018Date of Patent: September 17, 2019Assignee: KYOCERA Document Solutions Inc.Inventor: Takeshi Araya
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Patent number: 10416918Abstract: A method managing a state of a service of a control plane in a computer system includes: executing a service host process of the control plane on a software platform of the computer system; creating, by the service host process, a service object representing the service and a service document object representing the state of the service; modifying the service document object to update the state of the service; parsing at least a first portion of the service document to designate data to be indexed and at least a second portion of the service document to designate data to be persistently stored; and updating index data of an index stored in storage of the computer system with the data to be indexed and updating auxiliary data in the index with the data to be persistently stored.Type: GrantFiled: June 28, 2016Date of Patent: September 17, 2019Assignee: VMware, Inc.Inventors: Georgios Chrysanthakopoulos, Pieter Noordhuis
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Patent number: 10416919Abstract: File access statistics associated with a content file are maintained by a file tier agent of a secondary storage system. The content file is accessible via a primary storage system. A target storage tier corresponding to the file access statistics associated with the content file is determined according to one or more policies. At least a portion of data of the content file is migrated to the determined storage tier while accessibility of the content file via the primary storage system is maintained.Type: GrantFiled: August 28, 2018Date of Patent: September 17, 2019Assignee: Cohesity, Inc.Inventors: Zheng Cai, Vijay Pasikanti, Ganesha Shanmuganathan
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Patent number: 10416920Abstract: System and method for performing a high-bandwidth memory copy. Memory transfer instructions allow for copying of data from a first memory location to a second memory location without the use of load and store word instructions thereby achieving a high-bandwidth copy. In one embodiment, the method includes the steps of (1) decoding a destination address from a first memory transfer instruction, (2) storing the destination address in a register in the bus interface unit, (3) decoding a source address from a second memory transfer instruction, and (4) copying the contents of a memory location specified by the source memory address to a memory location specified by the contents of the register. Other methods and a microprocessor system are also presented.Type: GrantFiled: November 30, 2015Date of Patent: September 17, 2019Assignee: ARM Finance Overseas LimitedInventors: Karagada R. Kishore, Kevin D. Kissell, Georgi Z. Beloev
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Patent number: 10416921Abstract: In one embodiment, a local copy target is also a local primary of an incomplete consistency group of an ongoing asynchronous mirror relationship. Completion of the consistency group is facilitated notwithstanding that the local copy operation was initiated after the consistency group was initiated. In one aspect, asynchronous data mirroring logic, prior to the overwriting of existing data of the target, reads the existing data of the target for purposes of mirroring the read data to a remote secondary target of the consistency group. As a result, existing data of the local copy target which is also a local primary source of the consistency group, may be safely overwritten. Other features and aspects may be realized, depending upon the particular application.Type: GrantFiled: March 31, 2017Date of Patent: September 17, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Theresa M. Brown, Anthony J. Ciaravella, Nicolas M. Clayton, Michael S. Gagner, Theodore T. Harris, Jr., Mark L. Lipets, Gregory E. McBride, Carol S. Mellgren, Matthew J. Ward
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Patent number: 10416922Abstract: Embodiments are directed to a method of performing block based backups for large-scale source volumes, by obtaining a total source volume size to determine if the source volume exceeds 64 TB, creating a number of sub-volumes to divide the total source volume into discrete sub-volumes of 64 TB each, and storing in an advanced file type device (AFTD), upon a read operation for a block based backup operation, each block of the source volume into a corresponding sub-volume of the sub-volumes. The method determines a block number and offset of each block and derives the corresponding sub-volume from the offset. Each sub-volume represents an individual saveset of the backup operation, and the container manages the individual saveset for the block based backup operation.Type: GrantFiled: April 28, 2017Date of Patent: September 17, 2019Assignee: EMC IP Holding Company LLCInventors: Ravi Rangapuram, Pavan Kumar Dattatreya Ati, Sridhar Surampudi
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Patent number: 10416923Abstract: One embodiment is related to a method for backing up a shared volume using parallel save streams, comprising: taking a snapshot of the shared storage volume that is shared across a plurality of nodes; identifying used blocks on the shared storage volume based on the snapshot; organizing logically the used blocks into extent sets, wherein a number of extent sets is equal to a number of the plurality of nodes; assigning the extent sets to the plurality of nodes, wherein each of the plurality of nodes is assigned one extent set; and streaming, by each of the plurality of nodes, a respective extent set to a backup apparatus, wherein the plurality of nodes stream the extent sets in parallel.Type: GrantFiled: September 29, 2017Date of Patent: September 17, 2019Assignee: EMC IP Holding Company LLCInventors: Mv Kiran, Manjunath Jagannatha, Ravi Shankar Panem
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Patent number: 10416924Abstract: Accumulating application-level statistics in a storage system that includes a plurality of block storage devices, including: identifying, from data stored on a block storage device, one or more sub-regions of the data stored on the block storage device that are associated with an application; and compiling, from statistics maintained for each of the one or more sub-regions of the stored data associated with the application, cumulative statistics for the application.Type: GrantFiled: November 28, 2018Date of Patent: September 17, 2019Assignee: Pure Storage, Inc.Inventors: Steven Hodgson, Ronald Karr
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Patent number: 10416925Abstract: A distributed computation system comprising computation units and memory shared between computation units, comprises a hardware module for detecting conflicts of access of computation units to shared memory; each hardware module for detecting conflicts configured to: store a probabilistic data structure, indicative of the addresses of shared memory involved in the current transactions; receive at least one message indicative of request for access, by one computation unit to an address of shared memory; determine, from a probabilistic data structure, whether the address is already involved in a current transaction, and transmit a message indicating presence or absence of access conflicts; receive a message indicative or confirmative of reservation or releasing of an address of shared memory, and update the probabilistic data structure for the reserved addresses and the released addresses to be considered, as being/not being involved in a current transaction. A method for using the system is provided.Type: GrantFiled: April 9, 2015Date of Patent: September 17, 2019Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Julien Peeters, Nicolas Ventroux, Tanguy Sassolas, Marc Shapiro
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Patent number: 10416926Abstract: An information processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to calculate, for each of first users, time lengths of accesses to data stored in a storage device on basis of start information on start times and finish information on finish times. The accesses are made by a node of each of the first users. The start times are times at which the respective accesses are started. The finish times are times at which the respective accesses are finished. The processor is configured to calculate, for each of second users among the first users, a first sum of the time lengths. The second users are in a logged-in state of being after login and before logout. The processor is configured to determine whether to power on the storage device on basis of the first sum.Type: GrantFiled: April 6, 2017Date of Patent: September 17, 2019Assignee: FUJITSU LIMITEDInventor: Yasubumi Nozawa