Abstract: An abnormality detection device includes a processor and a storage unit connected to the processor.

Abstract: Detecting equipment failure risk in industrial process may include distributing equipment operations data to a cluster of nodes based on a range of time and operation specified in maintenance data associated with the equipment. From a record entry in the maintenance data, an operation, installation and maintenance time may be determined. A plurality of nodes storing equipment operations data associated with the operation during a time range between the installation and the maintenance time are selected. Operation features may be determined by distributed processing operation in the plurality of nodes. The operation features are aggregated and added as an entry in a target table. Equipment failure risk is detected by risk failure analysis performed based on the target table. A signal may be sent to automatically adjust or correct one or more operation features.

Abstract: An apparatus comprises processing circuitry, transactional memory support circuitry and a cache. The processing circuitry processes threads of data processing, and the transactional memory support circuitry supports execution of a transaction within a thread, including tracking a read set of addresses, comprising addresses accessed by read instructions within the transaction. A transaction comprises instructions for which the processing circuitry is configured to prevent commitment of the results of speculatively executed instruction until the transaction has completed. The cache has a plurality of entries, each associated with an address and specifying a replaceable-information value for that address that comprises information for which, outside of the transaction, processing would be functionally correct even if the information was incorrect.

Abstract: An operation method of a decoder may include: performing a first sub-decoding operation on a target data chunk; performing a second sub-decoding operation on candidate chunks and a chip-kill chunk; performing a third sub-decoding operation to determine a global check node; performing a fourth sub-decoding operation to infer and update local variable nodes of the target data chunk and local variable nodes of a data chunk from the global check node; and repeating the first to fourth sub-decoding operations once by a set number of times based on components of the updated local variable nodes.

Abstract: Example apparatus and methods control a data storage system to store data in a self-describing logical data storage capsule using a logical cylindrical recording format. Example apparatus and methods assign a searchable, globally unique identifier to the capsule and associate the globally unique identifier with a user. The logical data storage capsule is migrated from a first data storage medium to a second data storage medium without translating or reformatting the data storage capsule. The data storage capsule contains information describing to a data storage device how to migrate the capsule without translating or reformatting the data storage capsule. Example apparatus and methods dynamically select an error correction approach for storing data in the data storage capsule, de-duplicate, and encrypt the data storage capsule. The data storage capsule may be local, or may be part of a cloud-based storage system.

Abstract: A computer-implemented method according to one embodiment includes establishing a predetermined checkpoint and storing a log of duplicate read data in association with the predetermined checkpoint during a running of an application that is processing at least one data set, the duplicate read data including an image of all data retrieved from the at least one data set in response to a plurality of data reads made by the application before the predetermined checkpoint; identifying a first failure of the application; and restarting the application and performing a first replay of the application in response to the first failure.

Abstract: A system and method for using a snapshot as a data source is described. In some cases, the system stores a snapshot and an associated data structure or index to storage media to create a secondary copy of a volume of data. In some cases, the associated index includes application specific data about a file system or other application that created the data to identify the location of the data. The associated index may include three entries, and may be used to facilitate the recovery of data via the snapshot.

Abstract: The Multiclient Backup Replication Apparatuses, Methods and Systems (“MBR”) transforms pairing request, replication data stream inputs via MBR components into pairing response, replication confirmation outputs. A replication notification for a snapshot of a backup volume at a source node is obtained. A source node named pipe for the snapshot is created. A priority for the snapshot is determined. When appropriate to send the snapshot to a replication target node, snapshot data is read from the source node named pipe and serialized into chunks Chunks associated with the snapshot and other snapshots are multiplexed into a replication data stream and sent to the replication target node via a persistent network connection. The replication data stream is received by the replication target node and chunks associated with the snapshot are deserialized. A replication target node named pipe for the snapshot is created and used to write snapshot data to a replication volume.

Abstract: A method, computer program product, and computer system for handling open transactions in a data replication environment is provided. The method includes determining a database user that initiated an earliest open transaction in a transaction log. The method further includes, upon determining that the database user does not have access privileges for one or more tables of a target database corresponding to one or more tables of a source database associated with the earliest open transaction, skipping replication of the earliest open transaction to the target database, such that the data replication system no longer waits for the earliest open transaction to complete. The skipping includes discarding, from the transaction log, one or more entries related to the earliest open transaction, and identifying, in the transaction log, a next earliest open transaction.

Abstract: Methods and systems for identifying a set of disks within a cluster and then storing a plurality of data chunks into the set of disks such that the placement of the plurality of data chunks within the cluster optimizes failure tolerance and storage system performance for the cluster are described. The plurality of data chunks may be generated using replication of data (e.g., n-way mirroring) or application of erasure coding to the data (e.g., using a Reed-Solomon code or a Low-Density Parity-Check code). The topology of the cluster including the physical arrangement of the nodes and disks within the cluster and status information for the nodes and disks within the cluster (e.g., information regarding disk fullness, disk performance, and disk age) may be used to identify the set of disks in which to store the plurality of data chunks.

Abstract: Embodiments for disaster recovery (DR) configuration management. An orchestration mechanism is used to automate a deployment and/or a configuring of two or more storage clusters for DR by arranging, in one step, a mirroring session between the two or more storage clusters. The two or more storage clusters are existing clusters, and the orchestration mechanism locates each of the existing storage clusters and establishes the mirroring session between the two.

Abstract: Technology is disclosed for storing data in a distributed storage system using a virtual chunk service (VCS). In the VCS based storage technique, a storage node (“node”) is split into multiple VCSs and each of the VCSs can be assigned a unique ID in the distributed storage. A set of VCSs from a set of nodes form a storage group, which also can be assigned a unique ID in the distributed storage. When a data object is received for storage, a storage group is identified for the data object, the data object is encoded to generate multiple fragments and each fragment is stored in a VCS of the identified storage group. The data recovery process is made more efficient by using metadata, e.g., VCS to storage node mapping, storage group to VCS mapping, VCS to objects mapping, which eliminates resource intensive read and write operations during recovery.

Abstract: In a data storage system including a non-volatile random access memory (NVRAM) array, a page is a smallest granularity of the NVRAM array that can be accessed by read and write operations, and a memory block containing multiple pages is a smallest granularity of the NVRAM array that can be erased. Data are stored in the NVRAM array in page stripes distributed across multiple memory blocks. In response to detection of an error in a particular page of a particular block of the NVRAM array, only the particular page of the particular block is retired, such that at least two of the multiple memory blocks across which a particular one of the page stripes is distributed include differing numbers of active (non-retired) pages.

Abstract: Provided is an information processing device which is capable of suppressing a deterioration in accuracy of detecting an anomaly and accuracy of analyzing the anomaly, while suppressing an increase in an amount of data to be stored. The information processing system includes anomaly detection unit that collects event data indicating a predetermined event detected in a process of a device to be monitored, determines whether a predetermined index value related to the event exceeds a preset first threshold, and instructs enhanced monitoring of the device to be monitored and the process related to the event when the index value exceeds the first threshold, and collection instruction unit that determines an additional event being an event to be additionally monitored when the enhanced monitoring is instructed, and instructs the device to be monitored, which is subjected to the enhanced monitoring, to monitor the determined additional event.

Abstract: A software update monitor is configured to receive a software update intended for a safety critical control unit. The software update monitor determines a first verification code based on the received software update from a software update component and independently receives a second verification code associated with the software update from an update server. Next, it determines if the first verification code matches the second verification code. If the two codes match, the software update monitor effects the software update at the control unit. The software update monitor is configured to write the software update into a target memory location in a memory of the control unit. The software update monitor is configured to enable switching from a previous memory location, where an older software version may be running, to the target memory location, where the new software update is written, if the first and the second verification codes match.

Abstract: A method for indicating a status of a storage device to be implemented by a complex programmable logic device (CPLD) is provided. The CPLD is coupled to a connector for connection with the storage device, and to an LED. The method includes: in response to receipt of a signal set from a connector, determining whether the connector is connected with a storage device based on the signal set; when affirmative, identifying the storage device based on the signal set; operating in a mode corresponding to a result of identification; generating a determination result representing an operating status of the storage device based on the signal set; and outputting a control signal corresponding to the determination result to the LED.

Abstract: A variety of systems and methods can include evaluation of human user effort data. Various embodiments apply techniques to identify anomalous effort data for the purpose of detecting the efforts of a single person, as well as to segment and isolate multiple persons from a single collection of data. Additional embodiments describe the methods for using real-time anomaly detection systems that provide indicators for scoring effort data in synthesized risk analysis. Other embodiments include approaches to distinguish anomalous effort data when the abnormalities are known to be produced by a single entity, as might be applied to medical research and enhance sentiment analysis, as well as detecting the presence of a single person's effort data among multiple collections, as might be applied to fraud analysis and insider threat investigations. Embodiments include techniques for analyzing the effects of adding and removing detected anomalies from a given collection on subsequent analysis.

Abstract: The present application provides methods and systems for simulating full-system performance of a hardware device. An exemplary system for simulating full-system performance of a hardware device may include a cycle-accurate performance simulator configured to model a performance of a hardware component of a plurality of hardware components of a system, and the cycle-accurate performance simulator may include a first transactor. The system may also include a full-system simulator configured to model a performance of the plurality of hardware components of the system, and the full-system simulator includes a second transactor. The system may further include a communication mechanism between the first transactor and the second transactor, wherein the communication mechanism is configured to communicate data between the cycle-accurate performance simulator and the full-system simulator.

Abstract: Methods, systems, and computer program products for tracking missing data using provenance traces and data simulation are provided herein. A computer-implemented method includes generating, for each of multiple stages in a data curation sequence, a machine learning model of the data curation sequence, wherein the model is based on historical input records within the data curation sequence, historical output records within the data curation sequence, and provenance data within the data curation sequence; creating a simulated output record based on a detected anomaly corresponding to the data curation sequence; predicting the content of absent input records that precede the simulated output record in the data curation sequence and provenance data corresponding to the simulated output record; and outputting, to a user, in response to a query pertaining to the detected anomaly, the predicted input records and information relating the predicted input records to the detected anomaly.

Abstract: A method including receiving, from a user device, a user request to access data associated with a web page; generating, by a processor, a first transaction identification; collecting transaction information, the transaction information comprising server-side metrics; integrating, by the processor, the first transaction identification with the transaction information; transmitting, by the processor, the first transaction identification to the user device; receiving, from the user device, client-side data associated with a second transaction identification; integrating, by the processor, the server-side metrics and the client-side data; and analyzing, by the processor, the integrated server-side metrics and the client-side data.

Abstract: The present invention relates to a method of creating a script for automatically handling a mobile terminal in the process of testing an application mounted on the mobile terminal such as a smart phone or the like. Through the present invention, an automation script faithfully reflecting the use environment of a mobile terminal can be created, and therefore, effectiveness and reliability of the test of an application program can be dramatically enhanced.

Abstract: Test case data is received for individual test cases. The test case data includes sets of test case specific elements. A test case base object is generated to represent a generic test case. The test case base object includes a set of test case specific properties. The test case base object is expanded into individual test case specific objects that represent the individual test cases. Each individual test case specific object is generated by setting the set of test case specific properties to a respective set of test case specific values as indicated in the sets of test case specific elements. The individual test case objects are used to execute the individual test cases against one or more systems under test.

Abstract: In response to receiving a test suite specification, a processor of a testing platform determines a schedule of execution of a test suite to test a system under test (SUT). The SUT has a hardware resource set including at least one of a set including a processor system and a data storage system, and the test suite includes a plurality of tests, each including a respective set of one or more testcases. The processor initiates execution of the test suite on the SUT in accordance with the schedule. In response to failure of a hardware resource during execution of the test suite, the processor automatically and dynamically reallocating a test in the test suite to at least one different hardware resource in the hardware resource set.

Abstract: Based on a test step execution order for a test case such as one against a database system, a specific test step to be executed next is identified. In response to identifying the specific test step, a test step message is published to indicate that the specific test step is to be executed next, which causes a subscriber of the test step message to execute the specific test step. In response to determining that the specific test step has ended, a dependent test step message is published accordingly to cause a subscriber of the dependent test step message to perform: determining whether a next test step should be executed following the specific test step in the test step execution order; in response to determining that a next test step should be executed, the foregoing may be repeated by using the next test step in place of the specific test step.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for obtaining copies of resources at a canary server and from a hosting server. The resources include initial instructions for responding to requests from an external device. The canary server executes an update that modifies the initial instructions in the resources to create modified instructions. A request router determines a routing of a request for resources that render a webpage based on parameters in the request. The request is processed using the modified instructions rather than the initial instructions and in response to the request router determining that the canary server is a destination of the determined routing of the request. The system determines a reliability measure of the update when the request is processed at the canary server. The reliability measure identifies whether the update will trigger a fault during execution at production servers of the system.

Abstract: The disclosure relates in some aspects to the use of host metadata by a controller of a data storage device, such as the controller of a solid state device (SSD) having non-volatile memory (NVM) arrays that is coupled to a host device. In some aspects, the controller parses metadata within host commands to extract relevant hints and then correlates the hints with actual host device behavior. If the controller finds a strong correlation between the metadata hints and the host behavior, the hints are used for command storage optimization. Later, if there ceases to be a strong correlation between the hints and the host behavior, hint-based storage optimization may be suspended. In other aspects, the controller uses metadata to provide for virtual or expanded write streams. In still other aspects, the controller and the host device negotiate a structure for metadata during an initialization phase.

Abstract: Systems and methods for allocation of overprovisioned blocks for minimizing write amplification in solid state drives are disclosed.

Abstract: In one form, a data processing system includes a host integrated circuit having a memory controller, a memory bus coupled to the memory controller, and a memory module. The memory module includes a bulk memory and a memory module scratchpad coupled to the bulk memory, wherein the memory module scratchpad has a lower access overhead than the bulk memory. The memory controller selectively provides predetermined commands over the memory bus to cause the memory module to copy data between the bulk memory and the memory module scratchpad without conducting data on the memory bus in response to a data movement decision.

Abstract: A cache controller with a pattern recognition mechanism can identify patterns in cache lines. Instead of transmitting the entire data of the cache line to a destination device, the cache controller can generate a meta signal to represent the identified bit pattern. The cache controller transmits the meta signal to the destination in place of at least part of the cache line.

Abstract: A device includes first and second buffers fillable with contents of memory locations. A selection circuit is configured to select a filling mode between simultaneous filling of the buffers and sequential filling of the buffers. In some examples, the device can be a system on a chip that includes a non-volatile memory and a processor.

Abstract: An apparatus includes a CPU core, a first memory cache with a first line size, and a second memory cache having a second line size larger than the first line size. Each line of the second memory cache includes an upper half and a lower half. A memory controller subsystem is coupled to the CPU core and to the first and second memory caches. Upon a miss in the first memory cache for a first target address, the memory controller subsystem determines that the first target address resulting in the miss maps to the lower half of a line in the second memory cache, retrieves the entire line from the second memory cache, and returns the entire line from the second memory cache to the first memory cache.

Abstract: A computer system monitors usage of an application on a computing device to identify one or more pre-fetch situations corresponding to a user of the computing device. The computer system determines whether the computing device is in a situation that corresponds to at least one of the identified one or more pre-fetch situations. In response to determining that the computing device is in the situation that corresponds to the at least one of the identified one or more pre-fetch situations, the computer system causes data corresponding to the application to be pre-fetched.

Abstract: A data reading and writing method based on a variable length cache line. A lookup table stores cache line information of each request. When a read task arrives at the cache, the cache line information is obtained according to the request index, and the request is hit. The data in the cache is read and sent to the requester in multiple cycles, otherwise the request is not in the cache, some read requests are created and sent. The offset, tag and cache line size are recorded in the record of the lookup table, and the request is sent to the DRAM. Once all the data is returned and written to the cache, the corresponding record of the lookup table is set to be valid.

Abstract: A prefetch unit generates a prefetch address in response to an address associated with a memory read request received from the first or second cache. The prefetch unit includes a prefetch buffer that is arranged to store the prefetch address in an address buffer of a selected slot of the prefetch buffer, where each slot of the prefetch unit includes a buffer for storing a prefetch address, and two sub-slots. Each sub-slot includes a data buffer for storing data that is prefetched using the prefetch address stored in the slot, and one of the two sub-slots of the slot is selected in response to a portion of the generated prefetch address. Subsequent hits on the prefetcher result in returning prefetched data to the requestor in response to a subsequent memory read request received after the initial received memory read request.

Abstract: A memory configured to store map data; a processor configured to compare a size of target map data corresponding to the un-map command with a threshold value; and an un-map manager configured to perform, when the size of target map data is equal to or greater than the threshold value, a vertical un-map operation on the target map data stored in the memory.

Abstract: A data storage device may include: a nonvolatile memory device including a first memory block and a second memory block; and a processor configured to generate an invalid entry including first physical block addresses of the first memory block, corresponding to sequential logical block addresses, and generate a valid entry including second physical block addresses of the second memory block, in which data for the sequential logical block addresses are to be stored, collectively change, based on the invalid entry, bits corresponding to the first physical block addresses in a first valid page bitmap table of the first memory block to a first value, and collectively change, based on the valid entry, bits corresponding to the second physical block addresses in a second valid page bitmap table of the second memory block to a second value.

Abstract: Devices and techniques for host accelerated operations in managed NAND devices are described herein. A controller can receive an operation. Here the operation includes address data with a logical address portion and a physical address portion. The controller can then extract an index value and a location value from the physical address portion. The controller can retrieve a key using the index value and invoke a reversible function—using the index value and the location value—to produce a physical address. The controller can then perform the operation using the physical address.

Abstract: A pre-match method includes: receiving an initial address; gradually increasing a current address according to the initial address; adding an offset value to the current address for generating a match address; generating a hit parameter by comparing the match address with at least one defect address stored in the mapping table; generating a redundancy address corresponding to the match address; and setting a Y-direction address as either the redundancy address or the current address according to the hit parameter.

Abstract: a memory system includes a memory device comprising a plurality of memory cells storing data, and configured to perform one or more of a write operation, read operation and erase operation on the plurality of memory cells; and a controller configured to control an operation of the memory device, wherein the controller is configured to: cache a logical block addressing (LBA) mapping table from the memory device when the memory system is powered on by driving power applied thereto; and transfer a direct memory access (DMA) setup to a host when the LBA mapping table is cached.

Abstract: A memory access method is applied to a computer system including a hybrid memory. The hybrid memory includes a first memory and a second memory. According to the method, after receiving a first access request including a first virtual address, the first virtual address is translated into a first physical address, where the first physical address is a physical address of a first large page in the first memory, and the first large page includes a plurality of small pages. When it is determined that data of a first small page in the first large page is migrated to the second memory, accessing the second memory according to a second physical address stored in the first small page, where the second physical address is a physical address of a second small page in the second memory, the second small page stores the data migrated from the first small page.

Abstract: A memory device and methods for operating the same are provided. The memory device includes an array of memory cells, and a controller configured to receive a data word to be stored at an address in the array and to store, at the address in the array, the data word and a location indicia corresponding to the address. The controller can be further configured to command the array to read the data word from the address, to receive response data from the array, and to verify that a location indicia of the response data corresponds to the address. If the location indicia of the response data does not correspond to the address, the controller can be further configured to indicate an error.

Abstract: Techniques are described for offloading remote direct memory operations (RDMOs) to “execution candidates”. The execution candidates may be any hardware capable of performing the offloaded operation. Thus, the execution candidates may be network interface controllers, specialized co-processors, FPGAs, etc. The execution candidates may be on a machine that is remote from the processor that is offloading the operation, or may be on the same machine as the processor that is offloading the operation. Details for certain specific RDMOs, which are particularly useful in online transaction processing (OLTP) and hybrid transactional/analytical (HTAP) workloads, are provided.

Abstract: An IC card and a method of controlling the IC card which can improve convenience are provided. An IC card of embodiments includes a communicator, a storage and an authentication processor. The communicator performs communication with a terminal device. The storage stores authentication information for authenticating a user. The authentication processor performs personal authentication on the basis of input information received from the terminal device through the communicator and authentication information stored in the storage. In addition, the authentication processor extends an authentication processing time until completion of authentication becomes possible again on the basis of the number of times of the personal authentication having failed.

Abstract: According to one embodiment, a data storage apparatus includes a controller with a data protection function. The controller manages first and second personal identification data. The first personal identification data only includes authority to request inactivation of the data protection function. The second personal identification data includes authority to request inactivation of the data protection function and activation of the data protection function. The controller permits setting of the first personal identification data, when the second personal identification data is used for successful authentication and the first personal identification data is an initial value, or when the data protection function is in an inactive state.

Abstract: A method for switching a shared network protocol of a baseboard management controller comprises: determining whether a mainboard is connected with an external network card by a baseboard management controller; determining whether an external network card network port of the external network card is connected with a network cable by the baseboard management controller when the mainboard is connected with the external network card; connecting a physical link of a shared network protocol of the baseboard management controller with the external network card network port when the external network card network port is connected with the network cable; and connecting the physical link of the shared network protocol of the baseboard management controller with a mainboard network port of the mainboard when the external network card network port is not connected with the network cable. As a result, the shared network protocol can be maintained in normal operation.

Abstract: A storage and communication apparatus for plugging into a server, includes a circuit board, a bus interface, a Medium Access Control (MAC) processor, one or more storage devices and at least one Central Processing Unit (CPU). The bus interface is configured to connect the apparatus at least to a processor of the server. The MAC is mounted on the circuit board and is configured to connect to a communication network. The storage devices are mounted on the circuit board and are configured to store data. The CPU is mounted on the circuit board and is configured to expose the storage devices both (i) to the processor of the server via the bus interface, and (ii) indirectly to other servers over the communication network.

Abstract: An information sharing circuit for sharing the information of a memory module comprises an input port, two storage units, a control unit, and two output ports. The control unit instructs the input port to receive an information collection from the memory module and store the information collection to the first and the second storage unit. Two output ports are respectively electrically connected to two distinct external devices. The information collection is sent to the corresponding external device when any of the two output ports receives a request from the connected external devices respectively.

Abstract: A system and method for efficiently arbitrating traffic on a bus. A computing system includes a fabric for routing traffic among one or more agents and one or more endpoints. The fabric includes multiple arbiters in an arbitration hierarchy. Arbiters store traffic in buffers with each buffer associated with a particular traffic type and a source of the traffic. Arbiters maintain a respective urgency counter for keeping track of a period of time traffic of a particular type is blocked by upstream arbiters. When the block is removed, the traffic of the particular type has priority for selection based on the urgency counter. When arbiters receive feedback from downstream arbiters or sources, the arbiters adjust selection priority accordingly. For example, changes in bandwidth requirement, low latency tolerance and active status cause adjustments in selection priority of stored requests.

Abstract: In one aspect of the present description, in an input/output (I/O) device having multiple CPUs and multiple I/O ports, a cycle of I/O port rotations is initiated in which each port rotation of the cycle includes rotating an assignment of at least one I/O port from one CPU to a different CPU of a plurality of the CPUs. In the illustrated embodiment, an I/O port assignment for each CPU of the plurality CPUs is rotated for at least a portion of the cycle. Other features and aspects may be realized, depending upon the particular application.

Abstract: A method to enable a vehicle's embedded USB Host system to connect to multiple mobile devices through a USB Hub, regardless of whether the mobile devices are configured to act as USB Hosts or USB Devices, without USB On the Go (OTG) controllers or additional vehicle wiring, or inhibiting the functionality of any consumer devices connected to the same USB Hub. Preferably, the method is configured to provide that no additional cabling is required, and no hardware changes are required to be made to the HU. The method can be employed between a vehicle's embedded USB Host, USB Hub and at least one consumer accessible USB port. When the consumer device is acting as a USB Host, signals between the consumer device and the vehicle's embedded USB Host are processed through a USB bridge, thereby rendering the consumer device compatible with the vehicle's embedded USB Host.