Patents Issued in February 1, 2022
  • Patent number: 11239787
    Abstract: A control system and method of controlling a multi-phase electric machine for controlling the flow of electrical current between a voltage source and the multi-phase electric machine or other application/load. The control system includes, between each phase of the multi-phase electric machine and the voltage source: a high side diode and a high side switch positioned in parallel between a positive terminal of the voltage source and the electric machine with the high side diode being reverse biased with regard to the positive terminal; and a low side diode and a low side switch positioned in parallel between a negative terminal of the voltage source and the electric machine with the low side diode being reverse biased with regard to the electric machine. The control system operates the high side and low side switches to provide efficient operation of the electric machine.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: February 1, 2022
    Assignee: BorgWarner Inc.
    Inventor: Caleb W. Secrest
  • Patent number: 11239788
    Abstract: A motor driving device includes an inverter to supply an alternating current, a switch unit that switches the number of at least one permanent magnet synchronous motor to which the alternating current is supplied from the inverter, a detector to detect a detection value corresponding to the alternating current supplied to the at least one permanent magnet synchronous motor, and a control device to control the inverter and the switch unit. The control device sets an overcurrent interruption threshold value at a value based on the number. When the detection value is greater than or equal to the overcurrent interruption threshold value, the control device makes the inverter stop the supplying of the alternating current to the at least one permanent magnet synchronous motor.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: February 1, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Atsushi Tsuchiya, Keisuke Uemura, Kazunori Hatakeyama, Yuichi Shimizu
  • Patent number: 11239789
    Abstract: A floating photovoltaic power station and a load-bearing system thereof are provided according to the present application. The load-bearing system of the floating photovoltaic power station includes an aisle floating body providing buoyancy and forming a first operation and maintenance passage. The aisle floating body is provided with a fixing portion for fixedly connecting with a front side of a photovoltaic assembly, and one photovoltaic assembly is only fixedly connected to one aisle floating body located on the front side of the photovoltaic assembly. In the load-bearing system of the floating photovoltaic power station, the aisle floating body can support the photovoltaic assembly, and can provide buoyancy at the same time.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: February 1, 2022
    Assignee: HUAINAN SUNGROW FLOATING MODULE SCI. & TECH. CO., LTD.
    Inventors: Lihua Wang, Yukun Wang, Duo Li, Fuqin Xiao, Weiwu Wu
  • Patent number: 11239790
    Abstract: A solar tower system; the solar tower system includes a module unit having a cylindrical core, a series of tower slices positioned in a continuous series around the cylindrical core and together forming a cylindrical solar tower, and a battery unit attachment. Each tower slice comprises a clear plastic block having a series of solar panel bays, each configured to house one of a series of solar panels. The solar tower system provides a portable solar energy source for various uses.
    Type: Grant
    Filed: August 1, 2020
    Date of Patent: February 1, 2022
    Inventor: Mihai Cantemir
  • Patent number: 11239791
    Abstract: A photovoltaic (PV) module having bi-directional couplings is described. The bi-directional couplings include a first coupling mounted on a support frame under a first edge of the PV module and a second coupling mounted on the support frame under a second edge of the PV module. The PV module can be a keystone module and the bi-directional couplings of the keystone module can connect to respective couplings of several adjacent PV modules. The bi-directional couplings can form male-to-female connections with the respective couplings to quickly combine the PV modules into a PV module assembly. The PV module assembly includes the bi-directionally connected PV modules supporting each other in both an x-direction and a y-direction.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: February 1, 2022
    Assignee: SunPower Corporation
    Inventors: Lee Gorny, Gabriela Elena Bunea
  • Patent number: 11239792
    Abstract: The deployable solar tracker system comprises a single-axis solar tracker (1) including a plurality of foldable panel array sections (10, 10a). Each foldable panel array section (10, 10a) comprises a shaft section (11), a plurality of support ribs (12) hinged to the shaft section (11), a plurality of solar panels (13) attached to the support ribs (12) and a handling element (28) attached on top of the shaft section (11). The handling element (28) has one or more handle openings (29, 30) dimensioned for receiving one or more lift members oriented in a transversal direction perpendicular to the shaft section (11). The handle openings (29, 30) of the handling elements (28) of the plurality of the foldable panel array sections (10, 10a) are mutually aligned when the plurality of foldable panel array sections (10, 10a) are arranged in a shipping arrangement.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: February 1, 2022
    Inventor: Thomas McGregor James Grant
  • Patent number: 11239793
    Abstract: Systems and methods for removing charge buildup/leakage from solar modules. A discharge controller may be coupled between a solar module and a string bus of a solar array. The discharge controller is configured to disconnect the solar module from the string bus, and to connect a grounded frame to solar cells of the solar module. Since the grounded frame of the solar module is grounded, connecting the grounded frame and the solar cells allows charge buildup/leakage to discharge into ground.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: February 1, 2022
    Assignee: Tigo Energy, Inc.
    Inventors: Ron Hadar, Shmuel Arditi, Dan Kikinis
  • Patent number: 11239794
    Abstract: A frequency doubler (tripler, or quadrupler) employs current re-use coupled oscillator technique to enhance phase noise without increasing current consumption. Frequency doubler uses coupling between two oscillators running at different frequencies; a first oscillator is running at the target frequency and a second oscillator is running at half the frequency. The coupling between the two oscillators is via a transformer having a primary transformer coil and a secondary transformer coil. The first oscillator comprises a differential inductor, coarse/fine tuning capacitor arrays, and an n-type trans-conductor (GM). A virtual ground node of the n-type GM is coupled to one side of the primary transformer coil and the other side of the primary coil is coupled to the center tap of the secondary coil. The second oscillator comprises the secondary coil, coarse/fine tuning capacitor arrays, n-type GM, frequency tracking loop (FTL) and 2nd-harmonic LC filter network.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: February 1, 2022
    Assignee: Intel Corporation
    Inventors: Dongseok Shin, Hyung Seok Kim, Yongping Fan
  • Patent number: 11239795
    Abstract: A self-operating oscillator which increases an input DC voltage by a coefficient factor of 4 or more is provided. The self-operating oscillator includes a primary LC tank pair, a secondary LC tank pair, and a switch pair. The primary and the secondary LC tank provide a differential sinusoidal output voltage which corresponds to high amplitude, low phase noise and high purity.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: February 1, 2022
    Assignee: ORTA DOGU TEKNIK UNIVERSITESI
    Inventors: Ali Muhtaroglu, Jayaweera Herath
  • Patent number: 11239796
    Abstract: An embodiment of the present disclosure relates to a device comprising an electronic circuit; an oscillation circuit comprising a quartz crystal, configured to provide a clock signal to the electronic circuit; and a heater configured to increase the temperature of the quartz crystal.
    Type: Grant
    Filed: February 20, 2021
    Date of Patent: February 1, 2022
    Assignees: STMICROELECTRONICS S.R.L., STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Daniele Mangano, Benoit Marchand, Santo Leotta, Hamilton Emmanuel Querino De Carvalho
  • Patent number: 11239797
    Abstract: A frequency doubler is provided that filters an input signal to form I and Q components responsive to a tuning signal. A single sideband mixer mixes the I and Q components with I and Q components of a local oscillator signal to form an output signal having a frequency of twice the frequency of the input signal.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: February 1, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Omar Essam El-Aassar, Bhushan Shanti Asuri
  • Patent number: 11239798
    Abstract: A distributed mixer is configured of an artificial transmission line of which an input end is connected to an LO terminal and a terminal end is connected to an IF terminal, an artificial transmission line of which an input end is connected to an RF terminal, FETs that perform frequency synthesis of LO signals and RF signals and that are disposed following the artificial transmission lines and of which gates are connected to the artificial transmission line and sources are grounded, a bias circuit that applies gate bias voltage to a terminal end of the artificial transmission line, a terminating resistor that connects the terminal end of the artificial transmission line and a ground, and a plurality of transmission lines provided between the artificial transmission line and a drain of each FET.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: February 1, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hiroshi Hamada, Teruo Jo, Hideyuki Nosaka
  • Patent number: 11239799
    Abstract: An apparatus includes a radio-frequency (RF) circuit, which includes a power amplifier coupled to receive an RF input signal and to provide an RF output signal in response to a modified bias signal. The RF circuit further includes a bias path circuit coupled to modify a bias signal as a function of a characteristic of an input signal to generate the modified bias signal. The bias path circuit provides the modified bias signal to the power amplifier.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: February 1, 2022
    Assignee: Silicon Laboratories Inc.
    Inventors: Luigi Panseri, Mustafa H. Koroglu, Praveen Vangala, John M. Khoury
  • Patent number: 11239800
    Abstract: Apparatus and methods for power amplifier bias modulation for low bandwidth envelope tracking are provided herein. In certain embodiments, an envelope tracking system includes a power amplifier that amplifies an RF signal and a low bandwidth envelope tracker that generates a power amplifier supply voltage for the power amplifier based on an envelope of the RF signal. The envelope tracking system further includes a bias modulation circuit that modulates a bias signal of the power amplifier based on a voltage level of the power amplifier supply voltage.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: February 1, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Philip John Lehtola, Florinel G. Balteanu
  • Patent number: 11239801
    Abstract: An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: February 1, 2022
    Assignee: pSemi Corporation
    Inventors: Kashish Pal, Emre Ayranci, Miles Sanner
  • Patent number: 11239802
    Abstract: Gallium nitride based RF transistor amplifiers include a semiconductor structure having a gallium nitride based channel layer and a gallium nitride based barrier layer thereon, and are configured to operate at a specific direct current drain-to-source bias voltage. These amplifiers are configured to have a normalized drain-to-gate capacitance at the direct current drain-to-source bias voltage, and to have a second normalized drain-to-gate capacitance at two-thirds the direct current drain-to-source bias voltage, where the second normalized drain-to-gate capacitance is less than twice the first normalized drain-to-gate capacitance.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: February 1, 2022
    Assignee: Wolfspeed, Inc.
    Inventors: Qianli Mu, Zulhazmi Mokhti, Jia Guo, Scott Sheppard
  • Patent number: 11239803
    Abstract: Various methods and circuital arrangements for protection of an RF amplifier are presented. According to one aspect, the RF amplifier is part of switchable RF paths that may include at least one path with one or more attenuators or switches that can be used during normal operation to define different modes of operation of the at least one path. An RF level detector monitors a level of an RF signal during operation of any one of the switchable RF paths and may control the attenuators or switches to provide an attenuation of the RF signal according to a desired level of protection at an input and/or output of the RF amplifier. According to another aspect, the RF level detector may control a switch to force the RF signal through a different switchable RF path.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: February 1, 2022
    Assignee: PSEMI CORPORATION
    Inventors: Parvez Daruwalla, David Kovac
  • Patent number: 11239804
    Abstract: Techniques for controlling the output of a power amplifier are disclosed. In one embodiment, the techniques may be realized as a system that includes a power amplifier and a controller coupled to the power amplifier to form a feedback loop. The power amplifier is enabled or disabled in response to a blanking signal. The controller includes an accumulator that stores an accumulated error of the feedback loop. The controller suspends operation of the accumulator when (1) a level of the input signal is below a first threshold for an amount of time that exceeds a second threshold, (2) the blanking signal indicates that the power amplifier is disabled, or (3) both. The controller resumes operation of the accumulator when (1) the level of the input signal is above the first threshold and (2) the blanking signal indicates that the power amplifier is enabled.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: February 1, 2022
    Assignee: EMPOWER RF SYSTEMS, INC.
    Inventors: Donald M. Wike, Steve Stevenson, Paulo Correa
  • Patent number: 11239805
    Abstract: Isolators and methods for operating the same are described for opto-isolators with improved common mode transient immunity (CMTI). In some embodiments, a pair of photodetectors are provided in the opto-isolator and configured to generate photocurrents of opposite signs or directions in response to a light signal. Photocurrents from the pair of photodetectors are combined in a differential manner to represent data transmitted in a light signal, while common mode transient noise at the two photodetectors is attenuated or eliminated.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: February 1, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Check F. Lee, Baoxing Chen
  • Patent number: 11239806
    Abstract: An ultra-low power sub-threshold gm stage is disclosed where transconductance is very stable with process, temperature, and voltage variations. This technique can be implemented in a differential amplifier with constant gain and a second order biquad filter with constant cut off frequency. The amplifier gain can achieve a small temperature coefficient of 48.6 ppm/° C. and exhibits small sigma of 75 mdB with process. The second order biquad can achieve temperature stability of 69 ppm/° C. and a voltage coefficient of only 49 ppm/mV.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: February 1, 2022
    Assignee: Northeastern University
    Inventor: Aatmesh Shrivastava
  • Patent number: 11239807
    Abstract: An offset compensated differential amplifier employing a multi-tan h circuit comprising differential pairs coupled in parallel to compensate for an offset voltage of the output voltage in the offset compensation calibration mode is disclosed. The differential pairs each include a compensation transistor coupled to the positive internal node and a reference transistor coupled to the negative internal node. Each compensation transistor receives the compensation control voltage and each reference transistor receives a different reference voltage. The multi-tan h circuit generates an offset compensation voltage on the positive and negative internal nodes based on a difference between the compensation control voltage and the different reference voltages. The multi-tan h circuit comprises a larger linear range than a hyperbolic tangent current transfer function of a single differential pair.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: February 1, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Burt L. Price, Jin Liang
  • Patent number: 11239808
    Abstract: A power amplifier and power amplification circuit are described herein. An illustrative power amplifier is disclosed to include an input terminal, a drive amplifier connected to the input terminal, and an impedance modulator having a capacitance that is adjusted inversely and proportionately relative to a signal output by the drive amplifier, wherein the impedance modulator provides a feedback loop between an output of the drive amplifier and the input terminal.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: February 1, 2022
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Seung Yub Lee, Jun Hee Oh, Un-Ha Kim, Joo Young Jeon
  • Patent number: 11239809
    Abstract: A high-frequency power amplifier apparatus includes: a plurality of amplifiers that respectively amplify a plurality of distributed signals obtained by distributing a high-frequency signal of a predetermined frequency, the amplifiers respectively outputting a plurality of amplified signals; and a cavity-type high-frequency power combiner having a cavity surrounded by a conductor wall, the cavity-type high-frequency power combiner combining together power of the plurality of amplified signals in the cavity by operating in a TE011 resonance mode with a resonance frequency equal to the predetermined frequency.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: February 1, 2022
    Assignee: RIKEN
    Inventor: Yuji Otake
  • Patent number: 11239810
    Abstract: An electronic device and method that automatically adjusts an audio output volume level based on a live environmental acoustic scenario input via a microphone using a machine learning algorithm trained with Human Activity Recognition (HAR). Equipped with such an intelligence the electronic device classifies ambient sounds occurring in the environment of the listening area in which the device is situated into different acoustic scenario mappings such a voice or conversation, for an ambient human conversation detected event, and noise, such as for example a vacuum cleaner or dish washer noise detected event, and automatically adjust the audio output volume accordingly.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: February 1, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Swaroop Mahadeva, Chandra Shekar Ksheerasagar, Jeethendra Poral
  • Patent number: 11239811
    Abstract: Described herein is an audio device with a microphone which may adapt the audio output volume of a speaker by either increasing or decreasing output volume based on an audio input volume from a user and a distance from the user to the audio device. The audio device may also adapt its output volume to lower the audio output based on detecting one or more interruptions including occupancy and acoustic sounds.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: February 1, 2022
    Assignee: Lutron Technology Company LLC
    Inventor: Galen E Knode
  • Patent number: 11239812
    Abstract: Various embodiments of the present disclosure are directed to modifying an input signal. In one example of a process for modifying an input signal, the process includes splitting the input signal into at least a first input part and a second input part, the amplification of at least the first input part with a linear gain to create a first output part, the nonlinear amplification of at least the second input part of the input signal to create a second output part, and summing the first output part and the second output part in order to provide an output signal.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: February 1, 2022
    Assignee: Isuniye LLC
    Inventor: Zlatan Ribic
  • Patent number: 11239813
    Abstract: A first conductive pattern made from a conductive material is formed on a first surface that is one surface of a flexible film made from a dielectric material. An adhesive layer is disposed on a second surface opposite to the first surface of the flexible film. A pair of first outer electrodes generates an electric field in an in-plane direction of a composite member composed of the flexible film and the adhesive layer, and causes an electric current to flow through the first conductive pattern.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: February 1, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kiyomi Ikemoto
  • Patent number: 11239814
    Abstract: The present subject matter provides technical solutions for the technical problems facing cryogenic ion traps by providing a cryogenic radio-frequency (RF) resonator that is compact, monolithic, modular, and impedance-matched to a cryogenic ion trap. The cryogenic RF resonator described herein is power-efficient, properly impedance-matched to the RF source, has a stable gain profile, and is compatible with a low temperature and ultra-high vacuum environment. In some examples, the gain profile is selected so that the cryogenic RF resonator acts as a cryogenic RF amplifier. This cryogenic RF resonator improves the performance of ion traps by reducing or minimizing the heat load and reducing or minimizing the unwanted noise that may erroneously drive trapped ions. These features of the present subject matter improve the performance of atomic clocks and mass spectrometers, and especially improve the performance of trapped ion quantum computers.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: February 1, 2022
    Assignee: Honeywell International Inc.
    Inventors: Adam Phillip Reed, Benjamin Norman Spaun, Zachary Ryan Price
  • Patent number: 11239815
    Abstract: A resonance matching circuit used in a power supply system that supplies electric power by an electric field coupling method is provided. The resonance matching circuit includes an inverter circuit that functions as a voltage source, parallel transformer devices that are connected in parallel to the inverter circuit and transmit a current supplied from the inverter circuit, and a timing adjustment circuit that is located between the inverter circuit and the parallel transformer devices and adjusts an input timing of a pulse current supplied by the inverter circuit.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: February 1, 2022
    Inventor: Hiroyuki Miyazaki
  • Patent number: 11239816
    Abstract: Acoustic resonator devices and filters are disclosed. An acoustic resonator includes a substrate and a piezoelectric plate having parallel front and back surfaces, the back surface attached to the substrate. A decoupling dielectric layer is on the front surface of the piezoelectric plate. An interdigital transducer (IDT) is formed over the decoupling dielectric layer such that interleaved fingers of the IDT are over a portion of the piezoelectric plate suspended across a cavity formed in the substrate.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: February 1, 2022
    Assignee: Resonant Inc.
    Inventor: Sean McHugh
  • Patent number: 11239817
    Abstract: A surface acoustic wave resonator comprises at least one set of interdigital transducer (IDT) electrodes disposed on an upper surface of a piezoelectric substrate between first and second reflector gratings, a layer of silicon nitride disposed over the at least one set of IDT electrodes and the first and second reflector gratings, and a continuous trench formed in the layer of silicon nitride over portions of bus bar electrodes and tips of electrode fingers of the at least one set of IDT electrodes and over portions of bus bar electrodes and electrode fingers of the first and second reflector gratings to reduce acoustic leakage at electrode fingers of the first and second reflector gratings proximate the at least one set of IDT electrodes.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: February 1, 2022
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventor: Koichi Hatano
  • Patent number: 11239818
    Abstract: An acoustic wave device includes a first acoustic wave element including a first substrate having piezoelectricity at least in a portion thereof, a first functional electrode provided on a first surface of the first substrate, and a first wiring conductor electrically connected to the first functional electrode. The first acoustic wave element further includes a relay electrode on the first surface of the first substrate and electrically connected to a second wiring conductor, and a ground electrode on the first surface of the first substrate and electrically connected to the first functional electrode. The ground electrode is between at least one of the first functional electrode and the first wiring conductor, and the relay electrode, and is electrically insulated from the relay electrode.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: February 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takashi Iwamoto
  • Patent number: 11239819
    Abstract: An elastic wave device includes a supporting substrate, an acoustic multilayer film on the supporting substrate, a piezoelectric substrate on the acoustic multilayer film, and an IDT electrode on the piezoelectric substrate. The acoustic multilayer film includes at least four acoustic impedance layers. The at least four acoustic impedance layers include at least one low acoustic impedance layer and at least one high acoustic impedance layer having an acoustic impedance higher than the low acoustic impedance layer. The elastic wave device further includes a bonding layer provided at any position in a range of from inside the acoustic impedance layer, which is the fourth acoustic impedance layer from the piezoelectric substrate side towards the supporting substrate side, to an interface between the acoustic multilayer film and the supporting substrate.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: February 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yutaka Kishimoto, Masashi Omura, Tetsuya Kimura
  • Patent number: 11239820
    Abstract: An acoustic wave device includes a piezoelectric substrate and an IDT electrode directly or indirectly disposed on the piezoelectric substrate. The IDT electrode includes first metal layers, a second metal layer disposed on one of the first metal layers, and a third metal layer disposed on the second metal layer. The first, second, and third metal layers include side surfaces, respectively. The side surface includes a first end portion adjacent to the second metal layer. The side surface includes a second end portion adjacent to the second metal layer. In at least a portion of the IDT electrode, a creepage distance stretching from the first end portion to the second end portion via the side surface of the second metal layer is longer than a distance between the first end portion and the second end portion.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: February 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Chihiro Konoma
  • Patent number: 11239821
    Abstract: An electronic component device includes first and second mount boards, and first, second, and third electronic components. The first electronic component includes a first major surface and a second major surface, and is disposed on the first mount board. The first major surface is positioned closer to the first mount board than the second major surface. The second electronic component includes a third major surface and a fourth major surface, and is disposed on the second mount board. The third major surface is positioned closer to the second mount board than the fourth major surface. The third electronic component includes a fifth major surface and a sixth major surface, and is disposed on the second mount board. The fifth major surface is positioned closer to the second mount board than the sixth major surface. The second major surface directly contacts the fourth and sixth major surfaces, or indirectly contacts the fourth and sixth major surfaces with a bonding layer interposed therebetween.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: February 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masato Nomiya
  • Patent number: 11239822
    Abstract: Acoustic resonator devices, filters, and methods are disclosed. An acoustic resonator includes a substrate and a lithium niobate (LN) plate having front and back surfaces and a thickness ts. The back surface faces the substrate. A portion of the LN plate forms a diaphragm spanning a cavity in the substrate. An interdigital transducer (IDT) is on the front surface of the LN plate with interleaved fingers of the IDT on the diaphragm. The LN plate and the IDT are configured such that a radio frequency signal applied to the IDT excites a shear primary acoustic wave in the diaphragm. Euler angles of the LN plate are [0°, ?, 0°], where 0???60°. A thickness of the interleaved fingers of the IDT is greater than or equal to 0.8 ts and less than or equal to 2.0 ts.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: February 1, 2022
    Assignee: Resonant Inc.
    Inventor: Bryant Garcia
  • Patent number: 11239823
    Abstract: A RF antenna comprises a quartz resonator having electrodes disposed thereon with a magnetostrictive film disposed on the quartz resonator either on, partially under or adjacent at least one of the electrodes.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: February 1, 2022
    Assignee: HRL Laboratories, LLC
    Inventors: Randall L. Kubena, Walter S. Wall
  • Patent number: 11239824
    Abstract: A tuning fork-type vibration piece is provided, in which a cushioning portion is formed on the base of a package to make contact with abutting portions of arm portions which are any parts but their edges, and the abutting portions of the arm portions allowed to contact the cushioning portion are electrodeless regions including no electrode, which prevents the risk of frequency fluctuations that may occur in case an electrode is chipped off by possible contact with the cushioning portion.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: February 1, 2022
    Assignee: Daishinku Corporation
    Inventors: Tomo Fujii, Hiroaki Yamashita
  • Patent number: 11239825
    Abstract: A MEMS resonator is described.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: February 1, 2022
    Assignee: FemtoDx, Inc.
    Inventors: Pritiraj Mohanty, Shyamsunder Erramilli
  • Patent number: 11239826
    Abstract: A filter device includes series and parallel arm resonators provided at a filter chip and inductors electrically connected in series with respective ones of the parallel arm resonators. A first inductor having the highest inductance of the inductors is electrically connected in series with a first parallel arm resonator having the highest anti-resonant frequency of the parallel arm resonators. One end of the first parallel arm resonator and one end of a second parallel arm resonator in other ones of the parallel arm resonators are electrically connected to a same wiring line in wiring lines separated by the series arm resonators on a line electrically connecting an input terminal and an output terminal of the filter chip. The other ends of the first and second parallel arm resonators are respectively electrically connected to first and second ground terminals of the filter chip.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: February 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Seima Kondo
  • Patent number: 11239827
    Abstract: Disclosed is receiver for a noise limited system. A front-end circuit amplifies and band-limits an incoming signal. The amplification increases the signal swing but introduces both thermal and flicker noise. A low-pass band limitation reduces the thermal noise component present at frequencies above what is necessary for correctly receiving the transmitted symbols. This band limited signal is provided to the integrator circuit. The output of the integrator is equalized to reduce the effects of inter-symbol interference and then sampled. The samples are used to apply low frequency equalization (i.e., in response to long and/or unbalanced strings of symbols) to mitigate the effects of DC wander caused by mismatches between the number of symbols of each kind being received.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: February 1, 2022
    Assignee: Rambus Inc.
    Inventors: Masum Hossain, Carl W. Werner
  • Patent number: 11239828
    Abstract: Method for carrying out a morphing process, wherein an output parameter relating to the output of an audio signal outputted into an interior via an audio output device is changed.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: February 1, 2022
    Assignee: ASK INDUSTRIES GMBH
    Inventor: Victor Kalinichenko
  • Patent number: 11239829
    Abstract: A wireless communication system includes a plurality of wireless sensors. A wireless sensor includes a radio frequency (RF) receiving circuit, and a sensing element, where the sensing element affects the resonant frequency of the RF receiving circuit. The wireless sensor further includes a processing module operable to determine a first value for an adjustable element of a plurality of elements for a known environmental condition, a second value for the adjustable element for an unknown environmental condition, a difference between the first and second values that corresponds to a change, and to generate a coded value representative of the change. The wireless communication system further includes one or more sensor computing devices coupled to the plurality of wireless sensors via a network. A sensor computing device includes a second processing module operable to receive the coded value and determine a sensed environmental condition based on the coded value.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: February 1, 2022
    Assignee: RFMicron, Inc.
    Inventor: Shahriar Rokhsaz
  • Patent number: 11239830
    Abstract: A master-slave D flip-flop is disclosed having gates configured to supply two second intermediate signals as a function of first intermediate signals and a clock signal, and a slave circuit connected to a transfer circuit to form at least one output signal of the flip-flop from the second intermediate signals. The slave circuit is configured, when the second intermediate signals have, after a preceding pair of states, a predetermined pair of states, to maintain the at least one output signal as given by the preceding pair of states. The transfer circuit has a control input and is configured to generate the second intermediate signals to have the predetermined pair of states in response to a predetermined control signal state at the control input.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: February 1, 2022
    Assignee: Infineon Technologies AG
    Inventors: Thomas Kuenemund, Anton Huber
  • Patent number: 11239831
    Abstract: In an example, an apparatus includes a level-shifting circuit and a ramp detector. The level-shifting circuit has a current choke and a transistor coupled across the current choke, the level-shifting circuit adapted to be coupled to a first voltage source. The ramp detector has a ramp detector input adapted to be coupled to the first voltage source and a ramp detector output coupled to the transistor, the ramp detector adapted to be coupled to a second voltage source.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: February 1, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sundeep Lakshmana Javvaji, Vinod Joseph Menezes, Jayateerth Pandurang Mathad
  • Patent number: 11239832
    Abstract: A circuit to generate complementary signals comprises a first string of inverters with two inverters in series to produce a true signal in response to an input signal, and a second string of inverters with three inverters in series to produce a complement signal in response to the input signal. A compensation capacitance circuit is connected to a node in the first string of inverters. The compensation capacitance circuit can add capacitance to the node to increase a resistance-capacitance RC delay at the node in a manner which emulates the delay across PVT conditions an inverter in the second string of inverters.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: February 1, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Shang-Chi Yang, Jhen-Sheng Chih
  • Patent number: 11239833
    Abstract: A circuit includes a noise generator and a delay element. The output of the noise generator couples to the input of the delay element. The output of the delay element is coupled to a first input of a logic circuit, and the output of the noise generator is coupled to a second input of the logic circuit. The output of the logic circuit is coupled to a first control input of a waveform storage circuit. The waveform storage circuit is configured to produce a first digital waveform on its output responsive to a first logic state on the output of the logic circuit and to produce a second digital waveform on its output responsive to a second logic state on the output of the logic circuit. A sequencer has a sequencer output coupled to the second control input of the waveform storage circuit.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: February 1, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sriram Murali, Jaiganesh Balakrishnan, Ram Narayan Krishna Nama Mony, Pooja Sundar
  • Patent number: 11239834
    Abstract: An apparatus includes a clockless delay adaptation loop configured to adapt to random data. The apparatus also includes a circuit coupled to the clockless delay adaptation loop. The clockless delay adaptation loop includes a cascaded delay line and an autocorrelation control circuit coupled to the cascaded delay line, wherein an output of the autocorrelation control circuit is used to generate a control signal for the cascaded delay line.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: February 1, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Abishek Manian
  • Patent number: 11239835
    Abstract: An active power blocking circuit in series with a squib. The active power blocking circuit may include a logic circuit, a first switch, a second switch, and an amplifier. The first switch may have a first side connected to a positive connection and a second side connected to a negative connection. The second switch may have a first side connected to the positive connection and a second side connected to the negative connection through a diode. The amplifier may be connected the second side of the second switch and the output of the amplifier may be connected to the logic circuit.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: February 1, 2022
    Assignee: VEONEER US, INC.
    Inventors: David Eiswerth, Vincent Colarossi, Marco Liedtke, Wolfram Budde
  • Patent number: 11239836
    Abstract: A circuit and a method for providing a switchable current linkage between a first terminal and a second terminal is presented. The circuit has a transistor switch and a charge pump circuit. An output node of the charge pump circuit is coupled to a control terminal of the transistor device, and an input node of the charge pump circuit is coupled to a predetermined voltage. The charge pump generates a boosted voltage. A drive circuit provides feedback control for the current flowing through the transistor. The drive circuit also controls the voltage magnitude at the input node of the charge pump circuit in accordance with the feedback control or to control a magnitude of a voltage at the control terminal of the transistor device in accordance with the feedback control.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: February 1, 2022
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Jerome Sanchez, Fabio Rigoni, Jan Grabinski, Ali Zahabi