Abstract: A gear includes at least one gear tooth and an electrode mounted to the at least one gear tooth along a contact face of the at least one gear tooth. A flowable dielectric material is positioned on the contact face of the at least one gear tooth. The dielectric material is structured to be movable along the contact face of the at least one gear tooth responsive to a gravity force.

Abstract: An actuator assembly includes (i) a first actuator stack having a first primary electrode, a first secondary electrode overlapping at least a portion of the first primary electrode, and a first electroactive layer disposed between and abutting the first primary electrode and the first secondary electrode, (ii) a second actuator stack having a second primary electrode, a second secondary electrode overlapping at least a portion of the second primary electrode, and a second electroactive layer disposed between and abutting the second primary electrode and the second secondary electrode; and (iii) a bonding layer disposed between the first actuator stack and the second actuator stack.

Abstract: A contact member that makes it possible to reduce variations in characteristics of individual vibration actuators. The contact member is in contact with a vibration member. The contact member has a sintered body of metal powder as a base material. A contact surface of the sintered body, which is in contact with the vibration member, is formed by impregnated resin portions as pore portions of the sintered body in which resin has been impregnated, and non-impregnated as pore portions of the sintered body in which the resin has been impregnated. A ratio of the impregnated resin portions with respect to an entirety of the contact surface is 2% or more and 15% or less, and a ratio of the non-impregnated pore portions with respect to the entirety of the contact surface is 3% or more.

Abstract: A method for providing grid-forming control of an inverter-based resource includes monitoring the electrical grid for one or more grid events. The method also includes controlling, via a power regulator of a controller, an active power of the inverter-based resource based on whether the one or more grid events is indicative of a severe grid event. In particular, when the one or more grid events are below a severe grid event threshold, thereby indicating the one or more grid events is not a severe grid event, the method includes controlling, via the power regulator, the active power according to a normal operating mode. Further, when the one or more grid events exceed the severe grid event threshold, thereby indicating the one or more grid events is a severe grid event, the method includes controlling, via the power regulator, the active power according to a modified operating mode.

Abstract: Disclosed herein is a power tool that includes a direct current power source, motor, and motor controller. In some embodiments, the power source comprises a battery pack configured to supply current at a nominal voltage in excess of 100 VDC. Embodiments of the tool are configured to operate at a high power at least comparable to tools operating at lower voltages, and to produce noise levels in operation that are less than 65 decibels.

Abstract: A speed estimating device for an AC motor includes: a model deviation computing unit computing a model deviation based on a voltage, a current, and an estimated angular velocity of the AC motor; a first angular velocity estimating unit computing a first estimated angular velocity based on the model deviation; a second angular velocity estimating unit computing a second estimated angular velocity differing from the first estimated angular velocity in frequency, based on the model deviation; a compensation phase computing unit computing a compensation phase based on a disturbance frequency; and an estimated angular velocity calculator computing an estimated angular velocity of the AC motor based on the first estimated angular velocity and the second estimated angular velocity. Either one of the first estimated angular velocity and the second estimated angular velocity is computed based on the compensation phase.

Abstract: A motor driving device includes: a connection switcher that has an electromagnetic contactor connected to a winding of a motor and switches connection condition of the winding by switching condition of the electromagnetic contactor; an inverter to apply an output voltage as an AC voltage to the winding via the connection switcher; a short-circuiting circuit having a rectification circuit and a switch; and a controller to control the electromagnetic contactor, the inverter and the switch, wherein a circulating circuit is formed by the short-circuiting circuit and the winding when the switch is set at ON, and the connection switcher switches the connection condition of the winding in a period in which the output voltage of the inverter is set at zero in a rotating operation of the motor and a current caused by the rotating operation circulates in the circulating circuit.

Abstract: A system for providing power to one or more loads includes a plurality of power converters where each power converter is configured to be arranged in a parallel configuration with one or more additional power converters so as to provide power to the one or more loads. The system also includes a central controller configured to receive a plurality of local voltage reference values from each of the power converters, output a global voltage reference value based on the local voltage reference values, and transmit the global voltage reference value to each of the power converters.

Abstract: A drive system includes: first and second inverters; a high-potential-side connection line; a low-potential-side connection line; a first changeover switch provided to at least one of the high-potential-side and low-potential side connection lines; a second changeover switch connected in parallel to the first changeover switch; a mode control section changing between a first mode in which to perform switching driving of upper and lower arm switches in one of the inverters and perform neutral point driving of at least one of the upper and lower arm switches in the other inverter to maintain in an on state and a second mode in which to perform switching driving of the upper and lower arm switches in both the inverters; and a changeover control section that, at the time of a changeover between the first and second modes, changes the first and second changeover switches between the on and off states.

Abstract: A motor drive device that drives motors with one inverter includes a step-out control unit that detects step-out in which the operating frequency of at least one of the motors does not match the inverter output frequency, or the operating frequency of at least one of the motors does not match the operating frequency of another one of the motors, and stops the motors by switching an energization state of the inverter when at least one of the motors is out of step.

Abstract: The invention relates to a method for controlling a three-phase inverter (3) using a 120° control arrangement associated with a PWM-type control, the inverter (3) being driven by a controller and configured to power a permanent-magnet synchronous motor (5) of a device on board an aircraft. The motor (5) comprises a stator and a rotor that can be rotated relative to the stator when the motor (5) is powered. The inverter (3) comprises three branches (31, 32, 33), each branch comprising two switches (310, 311, 320, 321 and 330, 331) associated with a motor winding sing a 120° control arrangement of a three-phase inverter. The method is characterised in that when one switch on one branch is controlled such as to switch front the on-state to the off-state, the other switch on said branch is controlled such as to be in the on-state for a sufficient amount of time to allow the magnetic discharge of the motor winding associated with said branch.

Abstract: A rotating machine drive system includes a power supply, an electric motor, a rotating machine, a belt drive transmission unit, an electrical information detection sensor, and a diagnostic unit. The electrical information detection sensor detects a current or a voltage. The diagnostic unit calculates estimated rotational speed information of the rotating machine based on the current or the voltage, calculates a reference rotational frequency from a rotational speed of the electric motor and a ratio between a diameter of the electric motor side pulley and a diameter of the rotating machine side pulley. The diagnostic unit uses a difference or a ratio between the estimated rotational speed information and the reference rotational frequency to determine whether or not there is the transmission abnormality.

Abstract: A solar tracker system includes a torque tube, a solar panel assembly attached to the torque tube, a housing defining a chamber and a fluid passageway extending from the chamber, and an active lock connected to a seal configured to prevent a flow path of fluid while in a sealed state and allow the flow path of fluid in an unsealed state. The system further includes a controller in communication with the torque tube and the active lock. The controller is programmed to receive a command to place the solar panel assembly in a stowed position, instruct the torque tube to rotate the panel assembly to a stowed angle corresponding to the stowed position, monitor a current angle of the panel assembly, compare the current angle to the stowed angle, and instruct the seal to transition to the sealed state when the current angle is equal to the stowed angle.

Abstract: A method for rectifying degradation of a photovoltaic module in a photovoltaic power system, includes: controlling a to-be-rectified photovoltaic module in a photovoltaic power system to stop outputting; and then injecting a rectification current into a positive or negative electrode of the to-be-rectified photovoltaic module.

Abstract: A test method for testing a solar power generation system is provided. The solar power generation system includes a DC to AC converter and a control unit. The DC to AC converter is electrically coupled between an external power grid and a solar panel. The control unit is configured to control the DC to AC converter to switch between a power generation mode and a test mode. When in the power generation mode, a photoelectric energy generated by the solar panel is provided to the external power grid via the DC to AC converter. When in the test mode, the control unit controls the DC to AC converter to generate a testing electrical energy by obtaining from the external power grid, to effect a test result of the solar panel when the testing electrical energy passes through the solar panel.

Abstract: Embodiments of this application disclose a fault point position determining method and apparatus and a photovoltaic system, to correctly and efficiently determine a fault point position when a disconnection fault occurs in a photovoltaic system. The method is applied to a photovoltaic system, the photovoltaic system includes at least one inverter and at least one photovoltaic unit, each photovoltaic unit includes at least one photovoltaic module and one photovoltaic module controller, and the method includes: sending, by an inverter, a first test signal to the at least one photovoltaic unit; obtaining, by the inverter, first test signal characteristic information fed back by the at least one photovoltaic unit; and performing, by the inverter, absolute value or relative value sorting on the at least one piece of first test signal characteristic information, and determining a fault point in the photovoltaic system based on a sorting result.

Abstract: A cost-effective solar energy collection system, including: 1) new solar PV panel wiring and power conversion system designed to allow tracking panel-to-panel shading while maintaining maximized power output, 2) the companion new combined structural and electrical inter-panel connector system supporting the new wiring scheme, and 3) the new panel structural support for the new inter-panel connector system, 4) the robotic array assembly and installation system used to assemble the new inter-panel connector and new panel structural support system into solar array sections in the field with a robotic crawler to move the assembled solar array sections to their final positions, and 5) the post system and installer for supporting the solar array sections. It is a fully integrated solar energy system for rapid installation and higher energy output which together creates a transformative change for the solar energy field.

Abstract: An oscillating circuit comprises a constant voltage supply circuit, a constant current supply circuit and an oscillating circuit; the constant voltage supply circuit is configured to output constant voltage; the constant current supply circuit is configured to output constant current; and the oscillating circuit is connected to the constant voltage supply circuit and the constant current supply circuit, and is configured to generate an oscillating signal with a preset frequency according to the constant voltage and the constant current.

Abstract: A voltage controlled oscillator includes a resonator and an amplifier. The resonator includes a capacitive element and an inductive element. The inductive element has a plurality of conductive segments forming a physical loop. The inductive element has electrical connections on the physical loop to the plurality of conductive segments forming at least one electrical loop disposed within an interior space formed by the physical loop. The amplifier has an input and an output, the input coupled to a first conductive segment forming a first impedance and the output coupled to a second conductive segment forming a second impedance.

Abstract: Provided are a transmission line module for a rotary traveling wave oscillator (RTWO) and a design method thereof. The transmission line module includes a substrate. The upper surface of the substrate is provided with a grounding metal layer, that is, a metal ground. The metal ground is provided with a rectangular groove. The rectangular groove penetrates front and rear sides of the metal ground along a length direction of the rectangular groove. The thickness of the rectangular groove is the same as the thickness of the metal ground. The rectangular groove is filled with a silicon dielectric plate that has the same shape and size as the rectangular groove. The upper surface of the silicon dielectric plate is provided with two parallel transmission lines along the length direction of the rectangular groove.

Abstract: According to one embodiment, a semiconductor integrated circuit includes first and second power supply lines, first and second nodes, and first and second circuits. The first circuit is configured to supply a first current to the second power supply line, from the first node or the second node. The second circuit is configured to supply a second current from the first power supply line to the first node based on a magnitude of the first current, and to supply a third current from the first power supply line to the second node based on the magnitude of the first current.

Abstract: Methods, systems, and devices for operating an amplifier with a controllable pull-down capability are described. A memory device may include a memory array and a power circuit that generates an internal signal for components in the memory array. The power circuit may include an amplifier and a power transistor that is coupled with the amplifier. A pull-down capability of the amplifier may be controllable using an external signal that is based on a difference between a reference signal and the internal signal. The power circuit may also include a comparator that is coupled with the amplifier and configured to compare the reference signal and the internal signal. Components of the comparator may be integrated with components of the amplifier, may share a bias circuit, and may use nodes within the amplifier to control the comparator. A signal output by the comparator may control the pull-down capability of the amplifier.

Abstract: A distortion compensation device includes: a first predistorter configured to compensate for a distortion in an amplifier; and a second predistorter configured to compensate for the distortion in the amplifier, and update distortion compensation characteristics at a higher frequency than that of the first predistorter.

Abstract: Example embodiments provide a process that includes one or more of receiving an audio signal at a feedback compressor circuit, receiving an auxiliary attenuation signal from an auxiliary attenuation source, determining a threshold power level based on a value of the auxiliary attenuation signal, determining an output power level of the audio signal exceeds the threshold power level, combining the audio signal with the auxiliary attenuation signal from the auxiliary attenuation source and a compressed attenuation signal from the feedback compressor circuit to create a combination signal, and generating an audio output signal of the feedback compressor circuit based on the combination signal.

Abstract: A high-linearity amplifier including a main operational amplifier, a feedback circuit, and a compensation circuit is shown. The feedback circuit couples an output signal of the main operational amplifier to an input port of the main operational amplifier. The compensation circuit couples a former-stage circuit of the amplifier to the input port of the main operational amplifier to compensate for the non-linearity of the feedback circuit. The compensation circuit and the feedback circuit form an inverse paralleling linearization architecture. In the inverse paralleling linearization architecture, a resistor in the feedback circuit corresponds to a resistor in the compensation circuit which is biased in an inversed way in comparison with the corresponding resistor in the feedback circuit.

Abstract: A voltage converter comprising: a bootstrap circuit, comprising an output capacitor, an error amplifier, a charging control circuit and a charging circuit. The charging control circuit comprises: a detection circuit, configured to detect an output voltage of the output capacitor to generate a detection signal; and a power limiting circuit, configured to clamp an output voltage of the error amplifier to a specific range based on the detection signal. The charging circuit is configured to generate a charging signal according the output voltage of the error amplifier to the bootstrap circuit, to charge the output capacitor.

Abstract: A notch circuit and a power amplifier module capable of reducing self-interference in a transceiver are provided. The transceiver includes a transmitter and a receiver, and the transmitter causes self-interference to the receiver. The transmitter includes a power amplifier module and the power amplifier module includes a notch circuit and a power amplifier. The notch circuit includes an inductor and a capacitor. The power amplifier amplifies an input transmission signal to generate an output transmission signal. The inductor receives a supply voltage. An amplitude of the supply voltage varies with the first input transmission signal. The capacitor is electrically connected to the inductor. The first output transmission signal (Tx_out1) is attenuated when a modulated frequency of the supply voltage is corresponding to a stopband.

Abstract: A push-push frequency doubler based on complementary transistors is provided. The first differential amplifier circuit receives a differential input signal having an initial frequency, and amplifies the amplitude of the second harmonic of the differential input signal to obtain a first signal. The second differential amplifier circuit receives the differential input signal with the initial frequency and amplifies the amplitude of the second harmonic of the differential input signal to obtain the second signal. Where, the first signal and the second signal are a set of differential signals with the same amplitude and a phase difference of 180°. The output load circuit extracts the second harmonic signal in the first and second signal respectively to obtain and output a pair of differential output signal with first output frequency whose value is twice of the initial frequency. As a result, the frequency doubler with differential output signal is realized.

Abstract: A differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor.

Abstract: An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.

Abstract: An acoustic wave device includes a piezoelectric material substrate, an intermediate layer on the piezoelectric material substrate and composed of one or more materials selected from the group consisting of silicon oxide, aluminum nitride and sialon. A bonding layer is on the intermediate layer and is composed of one or more materials selected from the group consisting of tantalum pentoxide, niobium pentoxide, titanium oxide, mullite, alumina, and a high resistance silicon and hafnium oxide. A supporting body is composed of a polycrystalline ceramic and is bonded to the bonding layer by direct bonding, and an electrode is on the piezoelectric material substrate.

Abstract: A radio-frequency (RF) splitter is provided. The RF splitter includes a common branch node configured to transfer an RF signal, input from an input port, to at least one of first and second output ports, first and second branch nodes electrically connected between the common branch node and the first and second output ports, first and second series switches configured to control switching operations to electrically connect the common branch node and the first and second branch nodes to each other, first and second inductors electrically connected between the common branch node and the first and second branch nodes, a resistor electrically connected between the first and second branch nodes, and first and second shunt switches configured to control switching operations to electrically connect the first and second branch nodes and the resistor to each other.

Abstract: Embodiments of the present application provide a wafer level surface acoustic wave filter and a package method, the surface acoustic wave filter includes a wafer, an electrode layer, a supporting wall and a cover plate; wherein, the wafer includes a substrate layer and a piezoelectric thin film layer combined together by wafer bonding, the electrode layer is arranged on a surface of the piezoelectric thin film layer, the supporting wall surrounds between the piezoelectric thin film layer and the cover plate to form a sealed cavity; and the cover plate includes at least a first material layer, which uses the same material as the substrate layer.

Abstract: Acoustic resonator devices are disclosed. An acoustic resonator device includes a plurality of cells electrically connected in parallel. Each cell includes an interdigital transducer (IDT) on a piezoelectric plate, the IDT having at least 15 and not more than 35 interleaved fingers.

Abstract: A coupled resonator filter device is disclosed. The coupled resonator filter device includes a substrate with one or more acoustic reflector layers disposed over the substrate, a first lower electrode disposed over the one or more acoustic reflector layers, a first piezoelectric layer disposed over the first lower electrode, and a first upper electrode disposed over the first piezoelectric layer. The coupled resonator filter device further includes one or more acoustic coupling layers disposed over the first upper electrode, a second lower electrode disposed over the one or more acoustic coupling layers, a second piezoelectric layer disposed over the second lower electrode, a second upper electrode disposed over the second piezoelectric layer, and a first tuning capacitor having a first upper plate coupled to the first upper electrode and a first lower plate coupled to the first lower electrode.

Abstract: An example apparatus includes a polyphase transconductance-capacitor filter. The polyphase filter includes a DC bias voltage node, a plus in-phase filter unit, a minus in-phase filter unit, a plus quadrature-phase filter unit, and a minus quadrature-phase filter unit. Each filter unit respectively includes an input node, an output node, and a control node. The polyphase filter also includes a plus in-phase switch and a minus in-phase switch. The plus in-phase switch is coupled to the control node of the plus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit. The minus in-phase switch is coupled to the control node of the minus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit.

Abstract: A system includes a sensor circuit configured to sense a parameter of a power system having an operating voltage greater than a voltage rating of the sensor circuit, an optical communications circuit configured to receive a sensor signal from the sensor circuit and to generate an optical communications signal therefrom, and an optical power supply circuit configured to receive an optical input, to generate electrical power from the received optical input and to supply the generated electrical power to the sensor circuit and the optical communications circuit. A driver circuit may be configured to generate a first control signal applied to a control terminal of the power semiconductor switch, and the optical power supply circuit may be configured to supply the generated electrical power to the sensor circuit, the optical communications circuit and the driver circuit.

Abstract: Embodiments provide a method for data storage and comparison, a storage comparison circuit device, and a semiconductor memory. The storage comparison circuit device includes a latch and a comparator. The latch is configured to latch inputted first input data and output first output data and second output data. The first output data are the same as the first input data, whereas the second output data are different from the first input data, wherein the first output data and the second output data are respectively inputted into the comparator. The comparator is configured to receive second input data, the first output data and the second output data, and to output a comparison result. By using modular structures of the latch and the comparator, device data can be simplified for the latch and the comparator, chip area can be reduced, calculation amount can be reduced, and efficiency of data comparison can be improved.

Abstract: Some embodiments provide a voltage-level shifter circuit comprising a cross-coupled transistor pull-up network that includes a plurality of diode-connected transistors configured to cause the state of the cross-coupled transistor network to switch at a low current through a pull-down network coupled thereto, such as a current corresponding to near-threshold voltage or sub-threshold voltage operation of the pull-down network.

Abstract: A semiconductor device and a method of operating a semiconductor device are provided. The semiconductor device includes a first latching circuit and a second latching circuit coupled to the first latching circuit. The second latching circuit includes a first feedback circuit and a first transmission circuit, the first feedback circuit configured to receive a first clock signal of a first phase and a second clock signal of a second phase, and the first transmission circuit configured to receive the second clock signal and a third clock signal of a third phase. The first feedback circuit is configured to be turned off by the first clock signal and the second clock signal before the first transmission circuit is turned on by the second clock signal and the third clock signal.

Abstract: A high-speed voltage clamping circuit includes p-type field effect transistor (PFET) biasing circuit, an n-type field effect transistor (NFET) biasing circuit, and a field effect transistor (FET) clamp circuit. The PFET biasing circuit is configured to generate a PFET biasing voltage. The NFET biasing circuit is configured to generate a NFET biasing voltage. The FET clamp circuit is in signal communication with the PFET biasing circuit and the NFET biasing circuit. The PFET biasing circuit controls operation of the clamping circuit in response to a voltage overshoot event and the NFET biasing circuit controls operation of the clamping circuit in response to a voltage undershoot event.

Abstract: According to one embodiment, a semiconductor device includes a first switch element including a first end to which a first voltage is applied, and a second end and a gate electrically coupled to a first node, a second switch element including a first end to which a second voltage is applied, and a second end and a gate electrically coupled to the first node, a third switch element including a first end to which the second voltage is applied, a second end electrically coupled to a second node, and a gate coupled to the first node, a fourth switch element including a gate coupled to the second node, and a first terminal electrically coupled to a first end of the fourth switch element and outputting a signal based on a voltage of the second node.

Abstract: Improved overcurrent detection and mitigation systems, methods, and techniques for a BMS are described herein. A BMS monitor may detect an overcurrent using two different techniques. The first technique may detect an overcurrent based on average power over different, overlapping time periods. The second technique may detect an overcurrent based on determining a modeled junction temperature of a switching device.

Abstract: A switch device includes a first node, a switch unit, an adjustment switch, an impedance element, a second node and a detection unit. A first terminal of the switch unit is coupled to the first node. A first terminal and a second terminal of the adjustment switch are respectively coupled to a second terminal of the switch unit and a reference voltage terminal. A first terminal and a second terminal of the impedance element are respectively coupled to the first terminal and the second terminal of the adjustment switch. The detection unit is coupled to the second node, and a control terminal of the switch unit and a control terminal of the adjustment switch. The detection unit detects a node signal at the second node to accordingly control the switch unit and the adjustment switch.

Abstract: A FET switch stack has a stacked arrangement of FET switches, a gate resistor network with ladder resistors and common gate resistors, and a gate resistor bypass arrangement. The bypass arrangement has a first set of bypass switches connected across the gate resistors and a second set of bypass switches connected across the ladder resistors. Bypass occurs during at least a portion of the transition state of the stacked arrangement of FET switches.

Abstract: Techniques are provided for fanning out a signal from a balun. In various aspects, the system can include a balun configured to receive a signal for transmission at an input and to provide a representation of the signal at an output, a plurality of pass gate circuits, each pass gate circuit configured to receive the representation of the signal at a first node, to receive a control signal at a second node to pass the representation of the signal to a third node when the control signal is in a first state, and to isolate the representation of the signal from the third node when the control signal is in a second state. The first state of the control signal can include a non-zero voltage, and the second state of the control signal can include the non-zero voltage with a polarity opposite the non-zero voltage of the first state.

Abstract: A strong and weak hybrid PUF circuit comprises N switch units and an arbiter. Each switch unit consists of two delay modules and two 2:1 multiplexers. The N switch units constitute two completely symmetrical delay paths. Each delay module consists of six stages of delay cells. During the operating process, a transmission signal selects a turn-on path of the corresponding 2:1 multiplexers according to activation signals; the switch units in the PUF circuit are in a valid state (if the delay modules are turned on) or in an invalid state (if the delay modules are not turned on) according to whether the delay modules are turned during the operating process; and the strong and weak hybrid PUF circuit can be flexibly configured to be of two different types (a strong PUF circuit and a weak PUF circuit) according to changes of the Hamming weight of input activation signals.

Abstract: A high-speed circuit with a high-voltage (HV) driver circuit. The high-speed circuit has a driver circuit and a level shifter. The driver circuit includes HV components which are operated in an HV domain. The level shifter includes low-voltage (LV) components which are operated in an LV domain. The level shifter translates signals from the LV domain to the HV domain to generate control signals for the driver circuit. The high-speed circuit may include a protection voltage generator converting a power supply voltage and a power ground voltage to generate a first direct-current bias voltage (VBP) and a second direct-current bias voltage (VBN) to bias the LV components of the level shifter. The LV components of the level shifter include input transistors and protection transistors. Gate voltages of the protection transistors may be tied to VBP or VBN.

Abstract: A control system is provides that includes a logic gate generating an output state signal, and first and second redundant controllers, wherein the first controller is configured to output a first state signal to a first input of the logic gate, and the second controller is configured to output a second state signal to a second input of the logic gate, and wherein the first controller is configured to receive an impedance isolated feedback signal corresponding to the second state signal from the second controller, and the second controller is configured to receive an impedance isolated feedback signal corresponding to the first state signal from the first controller, so that each controller can determine whether both inputs to the logic gate match one another.

Abstract: An integrated circuit device having separate dies for programmable logic fabric and circuitry to operate the programmable logic fabric are provided. A first integrated circuit die may include field programmable gate array fabric. A second integrated circuit die may be coupled to the first integrated circuit die. The second integrated circuit die may include fabric support circuitry that operates the field programmable gate array fabric of the first integrated circuit die.