Abstract: Disclosed are a method for activating an audio device, a terminal device and a computer-readable storage medium. The method may include: acquiring an attribute of an audio application; acquiring an audio device identification (ID) mapped to the attribute from a preset audio device switching routing table according to the attribute, wherein the audio device ID mapped to the attribute may include: an audio device ID of an audio device codec corresponding to the attribute; and activating the audio device corresponding to the audio device ID.

Abstract: A method for controlling a connected object deployed in a geographical area. A corresponding computer program, storage medium, and processing circuit. The method includes displaying, via a visual interface, a symbolic representation of the geographical area in the form of juxtaposed interactive buttons. Each interactive button is associated with a respective sub-area of the geographical area. The method includes obtaining a sub-area selection command generated by an interaction, via a user interface, with a displayed particular interactive button, selecting the sub-area associated with the particular interactive button, and, on the basis of feedback obtained via the user interface, issuing a control signal intended for the connected object.

Abstract: An electronic device and a control method therefor are disclosed. An electronic device of the present disclosure includes a processor, which quantizes weight data with a combination of sign data and scaling factor data to obtain quantized data, and may input the first input data into a first module to obtain second input data in which exponents of input values included in the first input data are converted to the same value; input the second input data and the sign data into a second module to determine the signs of input values and perform calculations between the input values of which signs are determined to obtain first output data; input the first output data into a third module to normalize output values included in the first output data; and perform a multiplication operation on data including the normalized output values and the scaling factor data to obtain second output data.

Abstract: A normalizer includes a “0” search circuit configured to search for a position of a most significant “0” bit of first mantissa data included in input data to output first search data, a “1” search circuit configured to search for a position of a most significant “1” bit of the first mantissa data included in the input data to output second search data, a selector configured to output one selected by a bit value of first sign data of the input data between the first search data and the second search data, as selected data, an exponent adder configured to add first exponent data included in the input data and the selected data to output second exponent data included in output data, and a mantissa shifter configured to perform a shifting operation on the first mantissa data, based on the selected data to output second mantissa data included in the output data.

Abstract: Disclosed is a MIMO FIFO buffer circuit that reads out data flits at once as many as an internal pointer increment value. The MIMO FIFO buffer circuit includes a MIMO FIFO storage array including ‘Y’ storage blocks, and an internal pointer generator that generates an internal pointer based on an internal pointer increment value indicating the number of data flits to read out at once from among ‘K×X’ data flits stored in K storage blocks out of the ‘Y’ storage blocks. Each of the ‘Y’ and the ‘K’ is a natural number, and the ‘K’ is equal to or less than the ‘Y’, and each of the ‘K’ storage blocks stores ‘X’ data flits.

Abstract: Methods of nonlinear differentiation and nonlinear differentiators are described. A log-sign nonlinear differentiator and an adaptive gain log-sign differentiator for signal tracking in a digital signal processor receive an input signal, u(t), estimates a filtered first state, x1(t) of the input signal, estimates second state signal, x2(t), and receive parameters which cause the filtered first state, x1(t), to converge asymptotically to the input signal, u(t), and the second state signal, x2(t), to converge asymptotically to the first derivative {dot over (u)}(t) of the input signal, u(t), such that a first output, y1(t), of the log-sign nonlinear differentiator, is an estimate of the input signal, u(t), and a second output, y2(t) equals the first derivative, {dot over (u)}(t) of the input signal, u(t), tracked by the log-sign nonlinear differentiator. The adaptive log-sign differentiator includes a signal path which includes calculating a deadzone function at the input of the first differentiator.

Abstract: Disclosed are apparatuses, systems, and techniques to perform and facilitate fast and efficient modular computational operations, such as Montgomery multiplication with reduced interdependencies, using optimized processing resources.

Abstract: A tile of an FPGA includes a multiple mode arithmetic circuit. The multiple mode arithmetic circuit is configured by control signals to operate in an integer mode, a floating-point mode, or both. In some example embodiments, multiple integer modes (e.g., unsigned, two's complement, and sign-magnitude) are selectable, multiple floating-point modes (e.g., 16-bit mantissa and 8-bit sign, 8-bit mantissa and 6-bit sign, and 6-bit mantissa and 6-bit sign) are supported, or any suitable combination thereof. The tile may also fuse a memory circuit with the arithmetic circuits. Connections directly between multiple instances of the tile are also available, allowing multiple tiles to be treated as larger memories or arithmetic circuits. By using these connections, referred to as cascade inputs and outputs, the input and output bandwidth of the arithmetic circuit is further increased.

Abstract: Processing cores with data associative adaptive rounding and associated methods are disclosed herein. One disclosed processing core comprises an arithmetic logic unit cluster configured to generate a value for a unit of directed graph data using input directed graph data, a comparator coupled to a threshold register and a data register, a core controller configured to load a threshold value into the threshold register when the value for the unit of directed graph data is loaded into the data register, and a rounding circuit. The rounding circuit is configured to receive the value for the unit of directed graph data from the arithmetic logic unit cluster and conditionally round the value for the unit of directed graph data based on a comparator output from the comparator.

Abstract: Embodiments of the present disclosure include a multiply-accumulator (MAC) array circuit comprising an activation cache and a plurality of multiply-accumulator (MA) groups. The activation cache comprises cache lines configured to store sub-slices of an input activation array. The cache lines are coupled to particular MA groups. Activations stored in the cache lines may be used and reused across multiple MA groups.

Abstract: A device for generating random numbers includes a circuit element having a high leakage current diode arranged to generate a leakage current of at least 2 pA ?m?2. The device also includes a processor connected to the circuit element. The processor is arranged to measure the leakage current and to generate random numbers based on the measured leakage current.

Abstract: According to one exemplary embodiment, an integrated circuit is described, comprising multiple noise sources, each noise source being configured to output a respective set of noise bits for a random vector, a combinational logic circuit configured to process a noise bit vector, corresponding to a concatenation of the bits of the sets of noise bits, in accordance with a multiplication by a matrix to produce a processed noise bit vector, with the result that the processed noise bit vector comprises more bits than each of the sets of noise bits and comprises fewer bits than the noise bit vector; and a post-processing logic circuit configured to generate the random vector from the processed noise bit vector.

Abstract: Embodiments of systems and methods for a multi-source true random number generator (TRNG) are disclosed. A set of values is generated from each of the sources of randomness and an extractor is applied each of the set of values to produce a set of random values from each source. At least one extractor for at least one of the sources is a multi-radix extractor.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating computer code using neural networks. One of the methods includes receiving description data describing a computer programming task; receiving a first set of inputs for the computer programming task; generating a plurality of candidate computer programs by sampling a plurality of output sequences from a set of one or more generative neural networks; for each candidate computer program in a subset of the candidate computer programs and for each input in the first set: executing the candidate computer program on the input to generate an output; and selecting, from the candidate computer programs, one or more computer programs as synthesized computer programs for performing the computer programming task based at least in part on the outputs generated by executing the candidate computer programs in the subset on the inputs in the first set of inputs.

Abstract: According to an aspect of the present disclosure, a method is provided including: receiving, at an API server, a natural language string and a context filter defined by automatically generated information about a terminal; selecting, at the API server, one or more domain knowledge files based on the natural language string and the context filter; transmitting, from the API server to a backend server having artificial intelligence capabilities, the one or more domain knowledge files, the natural language string, and the context filter; generating, at the backend server via AI processing, one or more of: one or more macros or one or more strings, based on the one or more domain knowledge files, the natural language string, and the context filter; and receiving, at the API server from the backend server, the one or more of: one or more macros or one or more strings.

Abstract: Concepts and technologies are disclosed herein for providing and using a software defined network controller. A software defined network controller can be provided by a computing system that includes a processor. A service model that represents a service can be obtained. A network model that represents network resources that support the service can be obtained. Resources that support the service can be determined. Templates can be accessed to identify templates that relate to the resources. The templates identified can be assembled to obtain a template-based representation of the service. The template-based representation can be executed to determine if the service is ready for deployment.

Abstract: Methods and systems are described for removing branches from a computer program. The system receives code for a computer program, with the code including a number of branches. Each branch is part of a branching path and includes a jump instruction. The system executes the code, and upon encountering a branching path at runtime, the system proceeds with a number of steps. First, the system computes the result of the branch, then prefetches independent instructions outside of the branch to be executed. The system then executes one or more of the prefetched independent instructions and removes an if statement within the jump instruction of the branch at the computed result of the branching path. The system then executes the jump instruction of the branch at the computed result of the branching path.

Abstract: Examples provide an apparatus, device, method, computer program and non-transitory machine-readable storage medium including program code for processing memory spill code during compilation of a computer program. The non-transitory machine-readable storage medium includes program code for processing memory spill code during compilation of a computer program, when executed, to cause a machine to perform identifying a plurality of instructions related to scalar memory spill code during compilation of a computer program, and transforming at least a subset of the plurality of instructions into vectorized code.

Abstract: A system for generating executable code of a software program that is matched with an intermediate representation (IR) of a source code of the software program. The system comprises a processor adapted for adding one or more annotation entries, each for a location in the IR, to program data in the IR. An internal annotation entry is generated for an internal location in the IR that is not referenced by an IR symbol in the global IR symbol table of the IR. The processor is further adapted for compiling the IR to produce a binary object comprising the annotation entries, and providing the binary object to a linker or to a dynamic loader to update in an executable object an executable internal annotation entry associated with an internal annotation entry to reference a run-time location in the executable object.

Abstract: A method for using profiling to obtain application-specific, preferred parameter values for an application is disclosed. First, a parameter for which to obtain an application-specific value is identified. Code is then augmented for application-specific profiling of the parameter. The parameter is profiled and profile data is collected. The profile data is then analyzed to determine the application's preferred parameter value for the profile parameter.

Abstract: Apparatus and method for compiling and executing hybrid classical-quantum programs. For example, one embodiment of a method comprises: reading source code specifying both non-quantum operations to be performed by a host processor and quantum operations to be performed by a quantum accelerator; compiling the source code to generate a target object file, wherein portions of the source code specifying the quantum operations are compiled into quantum basic blocks (QBBs) in the target object file, each QBB comprising one or more quantum instructions to be executed by the quantum accelerator and wherein portions of the source code specifying the non-quantum operations are compiled into native instructions to be executed by the host processor.

Abstract: A method and a system for programming one or more behavior of a field device connected to a network comprising an input programming language to define the one or more behaviors to create an input program, transmitting over the network the input program to a translator coupled to the field device, translating the input program to generate a field program comprising a plurality of tasks and executing said field program by an executor coupled to said field device.

Abstract: A data processing system is presented that includes a communication link, a runtime processor coupled to the communication link, and one or more reconfigurable processors. A reconfigurable processor of the one or more reconfigurable processors is adapted for generating an interrupt to the runtime processor in response to a predetermined event and includes arrays of coarse-grained reconfigurable (CGR) units and an interface to the communication link that couples the reconfigurable processor to the runtime processor via the communication link. The runtime processor is adapted for configuring the interface to the communication link to provide access to the arrays of CGR units through the communication link from a physical function driver and from a virtual function driver.

Abstract: A system is presented that includes a communication link, a runtime processor coupled to the communication link, and a reconfigurable processor. The reconfigurable processor is adapted for generating an interrupt to the runtime processor in response to a predetermined event and includes multiple arrays of coarse-grained reconfigurable (CGR) units and an interface to the communication link that couples the reconfigurable processor to the runtime processor via the communication link. The runtime processor is adapted for configuring the interface to the communication link to provide access to the multiple arrays of coarse-grained reconfigurable units from a physical function driver and from at least one virtual function driver, and the reconfigurable processor is adapted for sending the interrupt to the physical function driver and to a virtual function driver of the at least one virtual function driver within the runtime processor.

Abstract: Computing systems, for example, multi-tenant systems deploy software artifacts in data centers created in a cloud platform using a cloud platform infrastructure language that is cloud platform independent. The system receives a declarative specification for creating a datacenter on a cloud platform. The system generates an aggregate pipeline comprising a hierarchy of pipelines. The system generates an aggregate deployment version map associating data center entities of the data center with versions of software artifacts targeted for deployment on the datacenter entities. The system collects a set of software artifacts according to the aggregate deployment version map. The system executes the aggregate pipeline in conjunction with the aggregate deployment version map to create the datacenter in accordance with the cloud platform independent declarative specification.

Abstract: In some examples, a system receives, from a requesting entity, input information relating to a program to be deployed on a server system. The system establishes, based on the input information, an environment in the server system, where the environment is based on interaction with a subsystem of the server system, the subsystem of the server system to support one or more of fault tolerance for the program or scalability of the program in the server system. After establishing the environment of the subsystem of the server system, the system sends response information to the requesting entity, the response information useable by the requesting entity to manage the program when executed in the server system.

Abstract: The present application is directed towards systems and methods for automatic retrofitting of customized code objects during transformation of a system from a source installation to a target installation. In many instances, new objects may be created or objects modified on an online or production system while a development system is being upgraded. Simply copying the upgraded development system to the production system when complete would delete these new objects or modifications. Accordingly, the modifications or new objects may need to be retrofitted, or propagated to the development system and upgraded or transformed for compatibility with the new software, prior to placing the system online.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for enhanced cloud computing deployment. In some implementations, a computer system provides a repository comprising (i) deployment tools configured to provide a deployment application programming interface (API), (ii) a set of container files configured to operate together to provide a server environment, and (iii) configuration data for the container images. The computer system can provide a deployment workflow package that, when invoked for a cloud computing account of the customer, is configured to retrieve the container files, configuration data, and deployment tools from the repository over a communication network and store the retrieved items in the cloud computing account. The deployment workflow package is also configured to run the deployment tools and create deployment infrastructure in the cloud computing account.

Abstract: The sizes of image files for deploying software in a computing environment can be reduced according to some examples described herein. In one example, a system can identify base image files that each include at least a predefined amount of dependencies relied upon by target software. The system can then select a particular base image file, from the base image files, having a smallest size as compared to a remainder of the base image files. The system can then build a customized image file from the base image file, where the customized image file is configured for deploying the target software to a computing environment.

Abstract: A method for managing information handling resource versions includes maintaining one or more snapshots of one or more validated release versions for a group of components. Each validated release version indicates a component version for each component in the group. Each component version in a higher validated release version is required to be greater than or equal to a corresponding component version in a lower validated release version. Responsive to identifying an instance of the component group in an non-validated state, disclosed methods identify a lowest validated release version that “covers” the non-validated state, wherein a validated release version covers any state in which no component version is greater than its corresponding component version in the validated release version. The instance of the component group is updated to a validated release version that equals or exceeds the lowest validated version.

Abstract: Systems and methods relating generally to firmware updating with an image are disclosed. In an example method thereof, an image graphically representing a binary file is obtained. The image is input via an optical-to-electric converter into an electronic device. The image input is processed by the electronic device to recreate the binary file in a binary form. Firmware of the electronic device is updated with the binary file in the binary form.

Abstract: According to the subject matter disclosed herein, an application miming on a network communication subsystem is assigned with at least one respective database, where data inputs received by the application induce a database update in the respective database. A database update automatically induces packaging of the updated data in a network message followed by transmission of the message to one or more other network communication subsystems connected to the same network. Likewise, in the other direction, an incoming network data-update message, received by the network communication subsystem, initiates a chain of events that cause a database update, which may ultimately affect the data provided to an application miming at the application layer.

Abstract: The present disclosure relates to an information processing apparatus, an information processing method, an information processing system, and a program that enable update of an SW to be quickly and safely implemented. The software program (SW) is updated from the vehicle group in which the safety is confirmed, the operation state of the SW after the update is confirmed, and if there is no abnormality, the SW of the vehicle groups other than the vehicle group in which the safety is confirmed is also updated. The present disclosure can be applied to an automated driving technology.

Abstract: Various embodiments of the teachings herein include a configuration device for determining an update configuration for a software update for a technical installation. The device may include: a module to acquire operating parameters of a production process of a technical installation, including configuration parameters of the technical installation; a module to load software updates for one or more elements of the technical installation; a module to use the operating parameters and the software updates as a basis for determining an update configuration for the software updates; and a module to transfer the update configuration and/or the software updates to an update server. The update server controls and/or monitors and/or records the software update of the one or more elements of the technical installation on the basis of the update configuration.

Abstract: Disclosed embodiments relate to performing updates to Electronic Control Unit (ECU) software while an ECU of a vehicle is operating. Operations may include receiving, at the vehicle while the ECU of the vehicle is operating, a software update file for the ECU software; writing, while the ECU is operating, the software update file into a first memory location in a memory of the ECU while simultaneously executing a code segment of existing code in a second memory location in the memory of the ECU; and updating a plurality of memory addresses associated with the memory of the ECU based on the software update file and without interrupting the execution of the code segment currently being executed in the second memory location in the memory of the ECU.

Abstract: A method includes receiving event strings from source code repositories, creating, for the source code repositories, digests of keywords, receiving log strings, and aggregating the log strings into a log group. The method further includes comparing the digests to the log group to generate scores, whereby the scores correlate the digests to the log group. The method further includes selecting a source code repository from the source code repositories according to the scores, and associating the log group to a service corresponding to the source code repository, where the source code repository corresponds to the digest with a highest score.

Abstract: A software development accelerator tool having an automatic extract, transform and load accelerator is described that can be employed for building, testing, deploying and managing software applications and services. Employ the accelerator can include selecting software development operations from a multiplicity of preconfigured existing operations; ordering operations as part of a configuration; determining whether dependencies are met for operations before processing the configuration; generating a batch ID to track the processing; and performing operations in the order specified in the configuration.

Abstract: The present application is directed towards systems and methods for providing a heat map interface for analyzing and reporting transformation capabilities of a source installation to a target installation of an application. Characteristics of the source installation are displayed in an easy, intuitive interface, providing improved efficiency in analysis and planning. Furthermore, the interface is interactive, allowing an administrator or user to select and apply transformation dispositions to code objects grouped into regions and sub-regions, providing versatility and accuracy of configuration.

Abstract: Disclosed are a method, a device, a system, and/or a manufacture of software and/or computing hardware development security through permission profile assessment of a retrieval request for a design dependency tree based on a unique identifier such as an IP address. In one embodiment, a method includes receiving a request for retrieval of a dependency tree, the request including an IP address associated with the client device and a unique identifier of a root version of the dependency tree. An asserted identity of the client device is validated and a permission profile extracted. A version of a first sub-component of the dependency tree is determined to have a positive authorization status through a database association with the IP address. A restricted tree data is returned, and one or more workfiles associated with the restricted tree data retrieved from a file repository for assembly of a restricted design workspace.

Abstract: A computer system for analyzing source code is disclosed. The computer system includes a processor and electronic memory storage. The electronic memory storage includes source code and executable instructions. The processor runs the executable instructions to: access the source code from the electronic memory storage; analyze code elements of the accessed source code to extract node data, edge data, and bindings data; and store the node data, edge data, and bindings data, in a graph database structure in the electronic memory storage.

Abstract: According to an aspect of the present disclosure, there is provided a method comprising: transmitting, from an API server to a backend server, one or more domain knowledge files; receiving, at the API server, a natural language input; transmitting the natural language input from the API server to the backend server; receiving, at the API server, a one or more snippets of executable code, one or more comments, or one or more values.

Abstract: A method and system according to which an online application platform for a client financial institution may be built. The online application platform may include a default configuration, which includes a default theme and a default application framework. A management interface is accessible by the client financial institution. The management interface includes a framework tool for converting the default application framework into a customized application framework. The management interface includes a theme tool for converting the default theme into a customized theme. A customized configuration of the online application platform is provided to applicants of the client financial institution.

Abstract: A blockchain microprocessor core for a blockchain having a primary memory with instructions stored therein. A control processor and/or an arithmetic-logic processor executes at least one of the instructions. The core may also have one or more registers, a blockchain general ledger; a blockchain memory; and at least one input/output (IO) port. An initiation protocol may establish a data stream over the at least one IO port; verify the data stream over the at least one IO port; and establish at least one data transfer protocol between the control processor and a receiving device via the at least one IO port.

Abstract: Disclosed are apparatuses, systems, and techniques to perform and facilitate fast and efficient modular computational operations, such as modular division and modular inversion, using shared platforms, including hardware accelerator engines.

Abstract: Principle and implementation of a new decimal electronic computer are provided in this disclosure, which belongs to field of electronic computers. A traditional computer was invented by Americans in 1946, which is binary, and data in the computer has only two states of 0 and 1. The binary states 0 and 1 are combined to represent various symbols and numbers, and various registers for binary algorithm are used to complete computation. Core of this disclosure is to use unit decimal data, a 10-bit hardware computation register group directly uses decimal numbers for computation, and one number has 10 states, so that operation and output of the decimal data can be directly completed. In the decimal computer, a CPU is composed of decimal computing register hardware at the bottom, which together with an auxiliary crossbar control circuit, a decimal memory and a decimal operating system, forms a complete decimal computer system.

Abstract: Methods, apparatus and systems that relate to hardware accelerators of artificial neural network (ANN) performance that significantly reduce the energy and area costs associated with performing vector dot-product operations in the ANN training and inference tasks. Specifically, the methods, apparatus and systems reduce the cost of bit-level flexibility stemming from aggregation logic by amortizing related costs across vector elements and reducing complexity of the cooperating narrower bitwidth units.

Abstract: An integrated circuit device may include programmable logic circuitry on a first integrated circuit die and memory that includes compute-in-memory circuitry on a second die. The programmable logic circuitry may be programmed with a circuit design that operates on a first set of data. The compute-in-memory circuitry of the memory may perform an arithmetic operation using the first set of data from the programmable logic circuitry and a second set of data stored in the memory.

Abstract: Systems and methods are provided for generating an event type and extending event message streaming. The generating an event type includes receiving event definition data. The disclosed technology includes an event type generator that generates scripts in a variety of languages for processing an event of the event type and event dictionary data including event schema associated with the event type. The event dictionary data represents a lightweight library package for merging into a micro service. The event type generator further registers the event type in an event message streamer thereby extending the event message streaming with the event type. The event message streamer provides an event bus that receives an event of the registered event type from a micro service for publishing. The event message streamer delivers the event in an event message to one or more micro services that subscribes to the event type for consuming.

Abstract: An instruction transmission method is performed by an instruction decode unit of a processor, which obtains transmission states of two transmission channels in a transmission period; according to a combination of the transmission states of the two transmission channels, generates a transmission control signal for the two transmission channels; and controls, according to the transmission control signal, the two transmission channels to transmit instructions to an execution unit.

Abstract: By providing a mode indication, an execution unit is operable to operate in two separate modes, each of which cause the execution unit to perform calculations by interpreting the same bit string (the first of the bit strings) as representing one of two different values. When operating in the first mode, the first of the bit string represents an undefined value, in other words a NaN. When operating in the second mode, the first of the bit strings represents a negative zero. Hence, the same string of bits can represent either a NaN or a negative zero depending upon the mode of operation of the processor. Since it is not necessary to reserve more than one bit string to represent these two special values, the remaining combinations of bits are available to represent other values.