Patents Issued in January 9, 2024
  • Patent number: 11868632
    Abstract: Methods, systems, and devices for power control for boot-up of memory systems are described. A memory system may be configured to boot-up using two different power modes: a lower-power mode, and a higher-power mode. The memory system may perform a series of evaluations to determine whether the memory system is to switch to the lower-power mode during boot-up operations, or stay in the higher-power mode. For example, the memory system may check one or more of: a history of previous boot-up failures, a voltage of an associated power management integrated circuit, a history of asynchronous power loss at the device, a power-mode configuration of the host device, or a history of host-initiated power-down commands. In some examples, by switching to the lower-power mode, the memory system may avoid repeatedly failing multiple boot-up cycles and may instead successfully boot-up the memory system.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: David Aaron Palmer, Jonathan S. Parry
  • Patent number: 11868633
    Abstract: A processing device in a memory system identifies a first set of bits associated with a translation unit of a memory device, wherein the first set of bits correspond to a page field. The processing device identifies a second set of bits associated with the translation unit of the memory device, wherein the second set of bits corresponds to a block field. The processing device determines that a value representing a page number stored in the page field satisfies a threshold criterion. Responsive to determining that the value representing the page number satisfies the threshold criterion, the processing device determines a difference between the value representing the page number and a threshold value associated with the threshold criterion plurality of block stripes on a memory device. The processing device stores a value representing the difference as a plurality of bits of the second set of bits.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Meng Wei
  • Patent number: 11868634
    Abstract: Systems and methods for file management by mobile computing devices. An example method, performed by a computer system, may comprise: storing, by a computer system, a first file having a first size, in a memory; storing, in the memory, a second file derived from the first file, the second file having the second size, the second size being less than the first size; determining that the memory is not sufficient to perform a memory write operation; selecting a third file having a fourth file associated with it, the fourth file derived from the third file; and removing the third file from the memory.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: January 9, 2024
    Inventor: Ruslan Shigabutdinov
  • Patent number: 11868635
    Abstract: A storage system with privacy-centric multi-partitions and method for use therewith are provided. In one embodiment, a storage system comprises a memory configured to be partitioned into a plurality of partitions, wherein each partition is associated with its own boot block, and wherein each boot block is configured to boot any of the plurality of partitions. The storage system also comprises a controller configured to communicate with the memory and to: in response to a failure to boot one of the plurality of partitions with that partition's boot block, use a boot block of another one of the plurality of partitions to boot the one of the plurality of partitions; and restrict access to each of the plurality of partitions only to authenticated entities. Other embodiments are provided.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: January 9, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Muralitharan Jayaraman, Mayur Jain, Balakumar Rajendran, Narendhiran Cr, Garvita Chauhan, Prashantha Krishna
  • Patent number: 11868636
    Abstract: Prioritizing garbage collection based on the extent to which data is deduplicated, including: determining, for one or more data elements, a number of deduplicated references to each data element; storing, for each of the data elements, the data element in an area of the storage device that contains other data elements with a similar number of deduplicated references; and adjusting a garbage collection schedule for the storage device, wherein garbage collection operations are performed more frequently on areas of the storage device that contain data elements with a relatively low number of deduplicated references.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: January 9, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Ethan Miller, John Colgrove
  • Patent number: 11868637
    Abstract: In a storage system that implements RAID (D+P) protection groups a drive subset initially has (D+P) drives plus a spare drive with (D+P) splits. Spare splits are distributed with drive index and split index adjacency such that no single drive or split index contains multiple spare splits. When the drive subset is incremented by one drive a group of selected splits are relocated to the new drive based on drive index and split index adjacency such that no single drive or split index contains multiple members of a new protection group. If one of the drives is failing or fails, then an adjusted spare split index value is calculated for each protection group member on that drive so that the protection group members are rebuilt or relocated without placing more than one member of any protection group on a single drive. Adjusted spare split index values may be calculated in steps using the data split indices in ascending order and the largest drive indices in descending order.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: January 9, 2024
    Assignee: Dell Products L.P.
    Inventors: Kunxiu Gao, Kuolin Hua, Evgeny Malkevich
  • Patent number: 11868638
    Abstract: Methods, systems, and devices for improved inter-memory movement in a multi-memory system are described. A memory device may receive from a host device a command to move data from a first memory controlled by a first controller to a second memory controller by a second controller. The memory device may use the first and second controllers to facilitate the movement of the data from the first memory to the second memory via a path external to the host device. The memory device may indicate to the host device when to suspend activity to the first memory or the second memory and when to resume activity to the first memory or second memory.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Sourabh Dhir, Kang-Yong Kim
  • Patent number: 11868639
    Abstract: At least one data of a set of data stored at a memory cell of a memory component is determined to be associated with an unsuccessful error correction operation. A determination is made as to whether a programming operation associated with the set of data stored at the memory cell has completed. The at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation is recovered in response to determining that the programming operation has completed. Another memory cell of the memory component is identified in response to recovering the at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation. The set of data including the recovered at least one data is provided to the other memory cell of the memory component.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: January 9, 2024
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Kishore Kumar Muchherla, Shane Nowell, Peter Feeley, Qisong Lin
  • Patent number: 11868640
    Abstract: One example method includes intercepting an IO issued by an application, writing the IO and IO metadata to a splitter journal in NVM, forwarding the IO to storage, and asynchronous with operations occurring along an IO path between the application and storage, evacuating the splitter journal by sending the IO and IO metadata from the splitter journal to a replication site. In this example, sending the IO and IO metadata from the journal to the replication site does not increase a latency associated with the operations on the IO path.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: January 9, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Itay Azaria, Kfir Wolfson, Jehuda Shemer, Saar Cohen
  • Patent number: 11868641
    Abstract: One example method includes intercepting an IO issued by an application, writing the IO and IO metadata to a splitter journal in NVM, forwarding the IO to storage, and asynchronous with operations occurring along an IO path between the application and storage, evacuating the splitter journal by sending the IO and IO metadata from the splitter journal to a replication site. In this example, sending the IO and IO metadata from the journal to the replication site does not increase a latency associated with the operations on the IO path.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: January 9, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Itay Azaria, Kfir Wolfson, Jehuda Shemer, Saar Cohen
  • Patent number: 11868642
    Abstract: Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include receiving, by the processing device, a trim command on the memory device, wherein the trim command references a range of logical block addresses (LBAs). The operations performed by the processing device further include identifying a group of memory cells corresponding to the range of LBAs, wherein the group of memory cells comprises one or more management units (MUs). The operations performed by the processing device further include updating a data structure associated with the group of memory cells to reference the request; receiving a memory access command with respect to the group of memory cells.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Yueh-Hung Chen, Fangfang Zhu, Horia Simionescu, Chih-Kuo Kao, Jiangli Zhu
  • Patent number: 11868643
    Abstract: The memory sub-systems of the present disclosure selects, for memory scans, a memory block which has a highest page fill ratio. In one embodiment, the memory sub-system identifies a number of block stripes located on a logical unit (LU) identified by a logical unit number (LUN), where the LU is one of a plurality of LUs of a memory device. The sub-system determines a fill ratio for each of the plurality of block stripes. The sub-system selects, among the block stripes, a block stripe with a highest fill ratio. The sub-system identifies, from the selected block stripe, a memory block of the LU. The sub-system performs a memory scan operation on the memory block of the memory device.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Alex J. Wesenberg, Johnny A. Lam, Michael Winterfeld
  • Patent number: 11868644
    Abstract: In one set of embodiments, a hardware module of a computer system can receive a stream of addresses corresponding to memory units being accessed by a central processing unit (CPU) of the computer system. The hardware module can further generate a frequency estimate for each address in the stream of addresses, the frequency estimate being indicative of a number of times a memory unit identified by the address has been accessed by the CPU, and can determine, based on the generated frequency estimates, a set of n most frequently accessed memory units.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: January 9, 2024
    Assignee: VMWARE, INC.
    Inventors: Andreas Georg Nowatzyk, Isam Wadih Akkawi, Pratap Subrahmanyam, Adarsh Seethanadi Nayak, Nishchay Dua
  • Patent number: 11868645
    Abstract: A method of operating a controller for controlling a memory device that comprises a plurality of memory cell blocks including outputting block address information based on reliability information for each of the memory cell blocks, providing a patrol read command to the memory device, and controlling the memory device to perform the patrol read operation in response to the patrol read command wherein the block address information comprises an order of the patrol read operation for the memory cell blocks based on the reliability information may be provided.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: January 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hosung Ahn, Younsoo Cheon
  • Patent number: 11868646
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to determine a read threshold on a wordline, adjust a read threshold voltage level associated with the read threshold, determine an adjusted read threshold at the adjusted read threshold voltage level, where the adjusted read threshold is different from the read threshold, compare the adjusted read threshold to the read threshold, and calibrate the read threshold based on the comparing. The controller is further configured to analyze a bit error rate (BER) difference based on the calibrating and/or a previous read threshold voltage level movement, choose a next target read threshold for next calibration, and read a second page at the next target read threshold.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: January 9, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Tomer Eliash, Alexander Bazarsky, Eran Sharon
  • Patent number: 11868647
    Abstract: A nonvolatile memory device includes a memory block including a memory area, an on-chip valley search (OVS) circuit performing an OVS sensing operation on the memory block, and a buffer memory storing at least one variation table including variation information of a threshold voltage of memory cells, obtained from the OVS sensing operation. A reading operation including an OVS sensing operation and a main sensing operation on the memory area is performed in response to a read command applied by a memory controller, the OVS sensing operation is performed at an OVS sensing level, and the main sensing operation is performed at a main sensing level reflecting the variation information. In the nonvolatile memory device, correction accuracy for deterioration of a word line threshold voltage may be improved, and a burden on a memory controller may be reduced.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: January 9, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngdeok Seo, Jinyoung Kim, Sehwan Park, Ilhan Park
  • Patent number: 11868648
    Abstract: A memory system outputs read enable signals RE and /RE during a period of a standby time tWHR2 necessary for a process of output to a controller, and causes an output, circuit to output dummy data preset in signals DQS and /DQS.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: January 9, 2024
    Assignee: Kioxia Corporation
    Inventor: Kensuke Yamamoto
  • Patent number: 11868649
    Abstract: Methods, systems, and devices for memory systems for secure sequential storage devices are described. The system may identify a request for a first portion of a memory system to operate in a first configuration and a second portion of the memory system to operate in a second configuration. The system may enter, a first power mode having a lower power consumption than a second power mode based on receiving the request and store a first address associated with a last information to be stored in the first portion of the memory system before the first portion entered the first power mode. In some cases, the memory system may enter the second power mode based on storing the first address, read the first address, and store data in a second address consecutively indexed after the first address based on reading the first address.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Zoltan Szubbocsev
  • Patent number: 11868650
    Abstract: Methods, apparatuses, and systems related to combining and utilizing multiple memory circuits having complementary characteristics are described. An apparatus may include a first memory circuit having a first emphasized characteristic and a second memory circuit having a second emphasized characteristic. The first and second memory circuits may be connected in parallel and to a common interface configured to communicate data between the apparatus and an external device.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim
  • Patent number: 11868651
    Abstract: A key-value (KV) storage method and apparatus, the method including receiving a write request, where the write request is associated with writing a first key and a first value, storing the first key in a first memory chip of a solid state drive (SSD), and storing the first value in a second memory chip of the SSD, where an erase count of the first memory chip is less than an erase count of the second memory chip, and creating a mapping relationship between the first key, a physical address of the first key, and a physical address of the first value, where the physical address of the first key indicates that the first key is stored in storage space of the first memory chip, and where the physical address of the first value indicates that the first value is stored in storage space of the second memory chip.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: January 9, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Tao Huang, Siwei Luo, Zhong Qin
  • Patent number: 11868652
    Abstract: Disclosed is a method of allocating a buffer memory to a plurality of data storage zones. In some implementations, the method may include comparing a free buffer space size to a reallocation threshold size that is re-allocable at a reallocation cycle, deallocating, upon a determination that the free buffer space size is smaller than the reallocation threshold size, at least a portion of an occupied buffer space size to create a new free buffer space based on a history of buffer memory utilization of the occupied buffer space, and allocating the existing free buffer space and the new free buffer space to targeted data storage zones based on history of buffer memory utilizations corresponding to the targeted data storage zones.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: January 9, 2024
    Assignee: SK HYNIX INC.
    Inventor: Seong Won Shin
  • Patent number: 11868653
    Abstract: According to one embodiment, a memory system stores write data received from a host to a shared write buffer for write destination blocks, acquires first write data for plural pages from the shared write buffer, and writes the first write data to a first write destination block by a first-step write operation. When receiving write data from the host in a state in which an empty region does not exist in the shared write buffer, the memory system discards write data in the shared write buffer in which the first-step write operation has been finished. In a case where the first write data do not exist in the shared write buffer when a second-step write operation of the first write data is to be executed, the memory system transmits a request to acquire the first write data to the host.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: January 9, 2024
    Assignee: Kioxia Corporation
    Inventor: Shinichi Kanno
  • Patent number: 11868654
    Abstract: A semiconductor device includes: a nonvolatile memory cell including first memory cells and second memory cells; a bit latch; and a saved register. In a first writing operation, first writing data are stored in the bit latch and the saved register, and writing to the first memory cells is executed based on the first writing data. During the first writing operation, the first writing operation is interrupted based on a suspension command, and a second writing operation is executed. In the second writing operation, second writing data are stored in the bit latch, and writing to the second memory cells is executed based on the second writing data. After the second writing operation is ended, the first writing data is reset to the bit latch based on a resume command, and the interrupted first writing operation is restarted based on the first writing data reset to the bit latch.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: January 9, 2024
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takanori Moriyasu, Kazuo Yoshihara, Takayuki Nishiyama
  • Patent number: 11868655
    Abstract: Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device perform operations comprising receiving a memory access command; determining a physical address associated with the memory access command; determining a plane of a die on the memory device that is referenced by the physical address; inserting the memory access command into a queue associated with the plane; and processing the memory access command from the queue.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Sundararajan N. Sankaranarayanan
  • Patent number: 11868656
    Abstract: A method for managing data storage using a distributed file system. A file system volume associated with a write request received at a data management subsystem is identified. A logical block device associated with the file system volume is identified. A plurality of data blocks is formed based on the write request. The plurality of data blocks is distributed across a plurality of node block stores in a distributed block layer of a storage management subsystem of the distributed file system. Each of the plurality of node block stores corresponds to a different node of a plurality of nodes in the distributed storage system. The storage management subsystem operates separately from but in communication with the data management subsystem.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: January 9, 2024
    Assignee: NetApp, Inc.
    Inventors: Ravikanth Dronamraju, Arindam Banerjee
  • Patent number: 11868657
    Abstract: A memory controller, a method of operating the memory controller, and an electronic device including the memory controller are disclosed. The method of operating a memory controller, comprising receiving, from a host core, a plurality of commands for a memory, identifying, from among the plurality of commands, processing in memory (PIM) commands to execute one or more operations in the memory, verifying ordering information from a data field in each of the PIM commands, and reordering the PIM commands based on the ordering information and transmitting the reordered PIM commands to the memory.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: January 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyunsoo Kim, Seungwon Lee, Seungwoo Seo, Hosang Yoon
  • Patent number: 11868658
    Abstract: A memory controller is configured with a plurality of processors to be operated in parallel so that overhead of firmware may be reduced. The memory controller includes a first processor and a second processor. The first processor is configured to generate a command corresponding to a request received from a host and to translate a logical address included in the request into a physical address of a memory device. The second processor is configured to operate on data to be output to the memory device or on data received from the memory device. If the request is received from the host when the second processor is in an idle state, the first processor may control the second processor to release the idle state of the second processor and to perform an operation of logging command information corresponding to the request.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: January 9, 2024
    Assignee: SK hynix Inc.
    Inventor: Dong Hwan Kim
  • Patent number: 11868660
    Abstract: A set of submission queues associated with a host system is identified. A first set of internal queues and a second set of internal queues is generated based on the set of submission queues. Responsive to fetching a first memory access command pending in a submission queue of the set of submission queues, a first internal queue of the first set of internal queues is populated. Responsive to processing the first memory access command from the first internal queue of the first set of internal queues, a second internal queue of the second set of internal queues is populated. Responsive to completion of the first memory access command from the second internal queue of the second set of internal queues, an indication of the completion of the first memory access command is returned to the host system.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: January 9, 2024
    Assignee: Micron Technology Inc.
    Inventors: Muthazhagan Balasubramani, Woei Chen Peh
  • Patent number: 11868661
    Abstract: An apparatus having counters for sub-addresses in segments of row address to count activation commands applied to row addresses including the sub-addresses. The counters are configured to count activation commands applied to row addresses containing the sub-addresses in accessing rows of memory cells in a memory device; For example, in response to an activation command applied to a row address having first sub-addresses, counts stored in a portion of the counters corresponding to the first sub-addresses are increased for the count of the activation command. For each respective segment, counts stored in counters for sub-addresses in the respective segment are used to determine whether at least one of the sub-addresses has seen more activation commands than a threshold. An alert is generated for risk mitigation operations in response to each segment having at least one sub-address that has seen more activation commands than the threshold.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Kai Wang
  • Patent number: 11868662
    Abstract: A storage system supports several memory mappings that translate data bits into different physical voltage levels in its non-volatile memory. The storage system receives a selection of one of the memory mappings from a host, which makes the selection based on an application or expected workload of the host. The storage system uses the selected memory mapping for a memory access operation, such as a read operation or a write operation.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: January 9, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ran Zamir, Alexander Bazarsky, David Avraham
  • Patent number: 11868663
    Abstract: A system comprising a memory component including blocks, and a processing device, operatively coupled with the memory component. The processing device determines endurance values for the memory component. For each selected block of the plurality of blocks, the processing device determines an endurance estimation of the selected block based on at least one of a time to erase the selected block or an error statistic for the selected block, and updates an endurance value associated with the selected block based on the endurance estimation for the selected block. The processing device receives a write instruction to the memory component and distributes the write instruction to one or more of the blocks based on the endurance values. Other embodiments are described.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Zoltan Szubbocsev
  • Patent number: 11868664
    Abstract: The present technology relates to an electronic system including a host and a memory system. The host includes a request merge manager configured to generate one or more operation request sets, a first request set queue configured to store one or more of transmission request sets and operation request sets, a first scheduler configured to control the priorities of the operation request sets and the transmission request sets, a second request set queue configured to store the operation request sets sequentially output from the first request set queue, a second scheduler configured to generate a transmission request set, and a request set detector configured to transmit, to the first scheduler, request information on a request set having a highest priority.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: January 9, 2024
    Assignee: SK hynix Inc.
    Inventor: Jae Hoon Kim
  • Patent number: 11868665
    Abstract: Examples herein relate to a solid state drive that includes a media, first circuitry, and second circuitry. In some examples, the first circuitry is to execute one or more commands. In some examples, the second circuitry is to receive a configuration of at one type of command, where the configuration is to define an amount of media bandwidth allocated for the at one type of command; receive a command; and assign the received command to the first circuitry for execution.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: January 9, 2024
    Assignee: Intel Corporation
    Inventors: Nilesh N. Shah, Chetan Chauhan, Shigeki Tomishima, Nahid Hassan, Andrew Chaang Ling
  • Patent number: 11868666
    Abstract: Systems and methods for securely and remotely storing data in a remote, distributed redundant array of independent drives (RAID) is provided. RAID storage is accomplished through a series of mapped drives, non-routable Internet protocol (IP) addresses, and routable IP addresses. In addition, authorization to access a RAID controller, network address translation (NAT) system, and domain name system (DNS) system may all be separated, increasing security and allowing storage to be securely distributed among a variety of dispersed storage locations.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: January 9, 2024
    Assignee: CenturyLink Intellectual Property LLC
    Inventor: Steven A. Spitzer
  • Patent number: 11868667
    Abstract: An image forming apparatus includes a memory and a controller. The memory stores first mode information indicating whether the apparatus is set to a contract mode or a normal mode, and second mode information indicating whether a print permission mode is active or inactive. The controller sets the second mode information to active information indicating that the print permission mode is active in a state in which the first mode information indicates the normal mode, sets the second mode information to inactive information indicating that the print permission mode is inactive in a state in which the first mode information indicates the contract mode, and rewrites the second mode information to the active information when an instruction to activate the print permission mode is received in a state in which the first mode information indicates the contract mode and the second mode information is set to the inactive information.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: January 9, 2024
    Assignee: BROTHER KOGYO KABUSHIKI KAISHA
    Inventor: Takashi Suzuki
  • Patent number: 11868668
    Abstract: A device endpoint is accessed through an off-premise communications network relative to the device endpoint. The device endpoint is registered to a virtual device object in data storage of a device service, the device service and the device endpoint communicating across the off-premise communications network, the virtual device object storing a secure device endpoint identifier of the device endpoint. A virtual device identifier associated with the secure device endpoint identifier of the device endpoint is stored in the virtual device object. A request to access the device endpoint using the virtual device identifier is received. The secure device endpoint identifier associated with the virtual device identifier in the virtual device object is read. The device endpoint is notified of a pending job associated with the secure device endpoint identifier. The pending job is communicated to the device endpoint identified by the secure device endpoint identifier.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: January 9, 2024
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Soemin Tjong, Jimmy Yu Wu, Kristofer N. Iverson, Jorge I. Raastroem
  • Patent number: 11868669
    Abstract: An image processing apparatus includes: a setting history storage that stores a setting history being a history of a setting value when a job is executed; a list displayer that displays a list of the setting history; a setting screen displayer that displays, in a case where the setting history is selected, a setting screen on which the setting value included in the selected setting history is input; and a job executer that executes a job, based on the setting value input on the setting screen. The list displayer displays a list including the setting history for which authentication information is required, in a case where a job based on the setting value is executed.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: January 9, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kazuhiko Ido
  • Patent number: 11868670
    Abstract: An information processing system includes a management device configured to manage print data including print data elements. The management device includes a first processor configured to manage the print data and the print data elements in association with each other, and in response to specification of a possibility of reprinting of the print data, output the print data element to the processing device while associating information indicating the possibility of reprinting with the print data element. Each of the processing devices includes a second processor configured to process the print data element output from the management device, cause a memory to store the print data element associated with the information indicating the possibility of reprinting, and in response to a reprinting instruction from the management device, process the print data element associated with the information indicating the possibility of reprinting by reading the print data element from the memory.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: January 9, 2024
    Assignee: FUJIFILM Business Innovation Corp.
    Inventor: Takuhiro Togashi
  • Patent number: 11868671
    Abstract: A mobile communication device is provided. The mobile communication includes a first touch display forming a portion of a first surface of the mobile communication device, a second touch display forming a portion of a second surface of the mobile communication device, and a processor configured to display in the first touch display a first screen corresponding to an application executed in a first folding state while a state of the device is the first folding state, identify the state of the mobile communication device changing to a second folding state, and display in the second touch display, based on the identification, a second screen corresponding to the application and an image partially overlapping the second screen, a touch input on the second touch display while the second screen and the image are displayed in the second touch display as overlapping is configured to not be processed as an input.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: January 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yongjin Kwon, Hyoyeon Kim, Wooyoung Park, Sukjae Lee, Byungseok Jung, Seonghoon Choi, Jongwu Baek
  • Patent number: 11868672
    Abstract: Systems and methods are described for improving the utilization of an extended display system. Some aspects relate to an extended display generator having an input stream module to generate or receive input streams. Input streams may be generated locally (e.g., by a game engine) or remotely (e.g., from the internet). A function module of the generator provides functions that modify or extract information from the input streams. Then extended display generator applies a template to the input streams and function outputs, defining how such display content is presented to a user. A graphical user interface is used to specify which input streams, functions, and visual template should be used. The extended display shows the selected input stream(s) and the functional output(s) in a format defined by the visual template.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: January 9, 2024
    Assignee: Brelyon, Inc.
    Inventors: Barmak Heshmat Dehkordi, Christopher Barsi, Albert Redo Sanchez
  • Patent number: 11868673
    Abstract: A wireless device according to an embodiment of the present disclosure may receive a mirroring request for a screen sharing service from an external device, may determine whether a transmission condition of a content image is satisfied according to the received mirroring request, and, when the transmission condition is satisfied, to transmit content image data corresponding to the content image and OSD image data corresponding to an OSD image to the external device through a wireless communication interface.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: January 9, 2024
    Assignee: LG ELECTRONICS, INC
    Inventors: Eunjung Lee, Taejin Park, Jinseong Kim, Kyungnam Bae, Byounghyun Shin, Jeonghwan Kwon
  • Patent number: 11868674
    Abstract: A method performed by user equipment for video synchronous display includes playing a first video, receiving an indication of starting synchronous display with a target device, in response to the synchronous display indication, obtaining status information of the first video, where the video status information is used by the target device and the user equipment to synchronously play an image of the first video, and sending the video status information to the target device. The video status information may include video identification information and video playing progress information, or the video status information may include user posture data.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: January 9, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Pingping Zhao
  • Patent number: 11868675
    Abstract: Systems and methods are described for capturing, using a forward-facing camera associated with a head-mounted augmented reality (AR) head-mounted display (HMD), images of portions of first and second display devices in an environment, the first and second display devices displaying first and second portions of content related to an AR presentation, and displaying a third portion of content related to the AR presentation on the AR HMD, the third portion determined based upon the images of portions of the first and second display devices captured using the forward-facing camera. Moreover, the first and second display devices may be active stereo display, and the AR HMD may simultaneously function as shutter glasses.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: January 9, 2024
    Assignee: InterDigital VC Holdings, Inc.
    Inventor: Tatu V. J. Harviainen
  • Patent number: 11868676
    Abstract: Aspects of the present disclosure involve a system and a method for performing operations comprising: receiving, by a messaging application implemented on a client device, input that selects a sound option to add sound to one or more images; in response to receiving the input, presenting a sound editing user interface element that visually indicates a played portion of the sound and separately visually indicates an un-played portion of the sound; receiving an interaction with the sound editing user interface element to modify a start point of the sound; embedding a graphical element representing the sound in the one or more images; playing, by the messaging application, the sound associated with the graphical element starting from the start point together with displaying the one or more images.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: January 9, 2024
    Assignee: Snap Inc.
    Inventors: Nathan Kenneth Boyd, Jonathan Dale Brody, Andrew Grosvenor Cooper, Brandon Francis, Christie Marie Heikkinen, Ranidu Lankage
  • Patent number: 11868677
    Abstract: A remote test infrastructure can enable a developer to use a local browser to run and test an application on a remote device. The remote device is coupled to a host machine and connected via a communication network to the browser. The infrastructure can stream a video feed of the display of the remote device to the browser, enabling the developer to examine the result of testing and development of the application running on the remote device. For applications that have features requiring audio input, the infrastructure can pair an external component, such as the host machine, as a virtual audio input device, mimicking an external microphone. The virtual audio input device can capture an audio file or an audio stream and provide the audio as input to the application running on the remote device thereby simulating the application receiving an input from an external microphone.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: January 9, 2024
    Assignee: BrowserStack Limited
    Inventor: Harshit Biren Shah
  • Patent number: 11868678
    Abstract: Methods, computer program products, and systems are presented. The method computer program products, and systems can include, for instance: obtaining an audio input, the audio input representing sound emanating from a key press based user interface; generating a context pattern based on the audio input; performing classification of the context pattern to classify the context pattern as belonging to a signature pattern classification, wherein the signature pattern classification specifies a user activity; and providing an output based on the performing classification.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: January 9, 2024
    Assignee: Kyndryl, Inc.
    Inventors: Tamer E. Abuelsaad, Gregory J. Boss, John E. Moore, Jr., Randy A. Rendahl
  • Patent number: 11868680
    Abstract: An electronic device and method are disclosed. The electronic device includes a display, a microphone, a communication circuit, a processor, and a memory. The memory stores instructions that, when executed by the processor, implement the method. The method includes determining whether the electronic device is communicatively coupled to an external display device, when the electronic device is not communicatively coupled to the external display, receiving a first user utterance, executing a task corresponding to at least one of a word, phrase or sentence included in the first user utterance as indicated by the mapping, the task preconfigured by a user, and when the electronic device is communicatively coupled to the external display device, displaying at least one of a text and a graphical user interface (GUI) indicating the at least one word, phrase, and sentence on the external display.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: January 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoonju Lee, Jeongpyo Lee
  • Patent number: 11868681
    Abstract: A system and method for pre-operatively optimizing a fit of an orthopaedic implant relative to a particular individuals anatomy is provided.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: January 9, 2024
    Assignee: SMITH & NEPHEW, INC.
    Inventors: Brian W. McKinnon, Ruxandra C. Marinescu Tanasoca, Randy C. Winebarger, William L. Bowers, Jr., James B. Wiebe, III, Nathaniel M. Lenz, Zachary C. Wilkinson, Sean M. Haddock, Ryan L. Landon
  • Patent number: 11868682
    Abstract: A method includes accessing a three-dimensional architectural file of a building. The method further includes extracting architectural data from the three-dimensional architectural file and rendering, from the architectural data, a two-dimensional construction floorplan. Additionally, the method includes filtering the architectural data to generate a set of filtered data and storing the set of filtered data in high-availability storage. Further, the method includes overlaying a set of shapes corresponding to a set of assemblies on the two-dimensional drawing. Furthermore, the method includes assigning a set of measurements identified in the set of filtered data to the set of assemblies, where assigning a measurement to an assembly includes modifying a color of a shape corresponding to the assembly to identify the assembly being assigned the measurement. The method also includes compiling values associated with the measurements of the set of assemblies to generate a bid value.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: January 9, 2024
    Assignee: The Estimating Edge LLC
    Inventors: Adam P. Oaks, Bassam Saidi, Nathan M. Good
  • Patent number: 11868683
    Abstract: A platform for design of a lighting installation generally includes an automated search engine for retrieving and storing a plurality of lighting objects in a lighting object library and a lighting design environment providing a visual representation of a lighting space containing lighting space objects and lighting objects. The visual representation is based on properties of the lighting space objects and lighting objects obtained from the lighting object library. A plurality of aesthetic filters is configured to permit a designer in a design environment to adjust parameters of the plurality of lighting objects handled in the design environment to provide a desired collective lighting effect using the plurality of lighting objects.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: January 9, 2024
    Assignee: Korrus, Inc.
    Inventors: Benjamin James Harrison, Shruti Koparkar, Mark Reynoso, Paul Pickard, Raghuram L. V. Petluri, Gary Vick, Andrew Villegas