Abstract: A computer system and a method implementing a remote access array are provided. A first drawer includes a first processor chip. A first main memory region is operatively connected to the first processor chip. A first non-addressable memory region is operatively connected to the first processor chip and includes the first remote access array. The first remote access array is configured to track data portions that are stored in the first main memory region and for which copies were created and sent to an external node. The first remote access array is backed up in the first main memory region. The first remote access array includes one or more entries and is configured to update all of the entries in response to a multi-drawer working partition being reduced to fit within the first drawer.

Abstract: An operation method of a storage device includes: receiving a write request including an object identifier and data from an external device; performing a hash operation on the data to generate a hash value; determining whether an entry associated with the hash value is empty in a table; storing the data in an area of the storage device corresponding to a physical address and updating the entry to include the physical address and a reference count, when it is determined that the entry is empty; and increasing the reference count included in the entry without performing a store operation associated with the data, when it is determined that the entry is not empty, and an error message is returned to the external device when the entry associated with the hash value is not present in the table.

Abstract: Systems and methods that enable hardware memory error tolerant software systems. For instance, the system may comprise a host device that instantiates a kernel agent in response to one or more requests to access hardware memory, determines, by the kernel agent based on the received information, whether the request to access memory will cause access to a corrupt memory location, and skip an operation associated with the corrupt memory location in response to determining that the request will access a corrupt memory location. The systems may also include a system that detects software vulnerabilities to hardware memory errors.

Abstract: An error associated with a read operation corresponding to a memory die of a memory sub-system is detected. In response to detecting the error, a first read throughput level of the memory sub-system is identified. A quantity of queues receiving operation requests is decreased, the decreased quantity of queues corresponding to a second read throughput level. A read retry operation associated with the memory die is initiated at the second read throughput level.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device is connectable to a controller. The nonvolatile semiconductor memory device includes a cell array and a control circuit. The cell array includes a plurality of blocks. The control circuit executes program operations for a plurality of pages included in a write destination block of the blocks, in a certain program order. The write destination block is selected by the controller from the blocks. The control circuit is configured to notify a page address corresponding to a next program operation with respect to the write destination block to the controller.

Abstract: A method of operating a distributed storage system, the method includes identifying missing chunks of a file. The file is divided into stripes that include data chunks and non-data chunks. The method also includes identifying non-missing chunks available for reconstructing the missing chunks and reconstructing missing data chunks before reconstructing missing non-data chunks using the available non-missing chunks.

Abstract: Embodiments of the invention relate to generating backups of applications. The user or administrator that monitors the backup is notified of those files and/or folders that have not been backed up in the most recent backup. Further, embodiments of the invention enable alerts to be initiated when a particular file or folder has not been backed up over multiple backups or over a predetermined period. As a result, the user or administrator can have a better understanding of the protection and lack of protection that the present backups are providing.

Abstract: Systems and methods for durable storage of storage volume “snapshots” are provided. Snapshots are stored as collections of snapshot data objects. To improve the durability of snapshot storage, physical deletion of snapshot data objects may be delayed for a period of time after the snapshot data objects are marked for deletion. Lists of the stored snapshot data objects and the snapshot data objects that make up active snapshots may be periodically analyzed. If there are any snapshot data objects that are part of active snapshots and are not present in the list of stored snapshot data objects, the snapshot data objects may be recovered before they are physically deleted.

Abstract: Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for recommending a protection strategy. The method includes obtaining contents of attributes of a plurality of data assets adjusted. The method further includes generating a plurality of vector representations for the plurality of data assets based on the contents of the attributes. The method further includes dividing the plurality of data assets into at least one category based on the plurality of vector representations. The method further includes if it is determined that a protection strategy for one data asset in the at least one category exists, determining the protection strategy as a recommended strategy for another data asset in the at least one category.

Abstract: A method, an electronic device, and a computer program product for storage management are provided. The method includes: acquiring a lock attribute record in a lock attribute record chain from a data protection network for backing up data, data protection servers of the data protection network reaching a consensus on the lock attribute record chain, the lock attribute record including a first attribute value of an attribute of a lock operation, the lock operation being used for preventing a backup of the data stored in a storage server from being tampered with; acquiring, based on the lock attribute record, a second attribute value of the attribute of the lock operation from the storage server; and generating, based on determining that the first attribute value does not match the second attribute value, an alarm indicating that the backup is tampered with. This solution can better prevent data from being tampered with.

Abstract: Techniques are disclosed relating to archive operations for database systems. In some embodiments, a database system initiates one or more archive operations to archive one or more data extents for a database maintained by the database system. The system may halt archive activity for the database, in response to determining that archive operations for a threshold amount of data extents are initiated but not completed. The system may cancel at least one of the one or more archive operations. The system may determine to resume activity for the database based on determining that a threshold timer interval has elapsed and determining that a threshold amount of storage space is available for the database system. Disclosed embodiments may improve database availability, relative to traditional techniques.

Abstract: A data disaster recovery method performed by a disaster recovery site includes: selecting a first backup copy when taking over a service of a production site; receiving service data through a virtual machine; obtaining changed block tracking CBT) information based on a CBT technology and the received service data, where the CBT information includes incremental information generated after the disaster recovery site receives the first backup copy; and sending, by the disaster recovery site, a first message to the production site, where the first message includes the CBT information.

Abstract: Techniques are provided for maintaining and recomputing reference counts in a persistent memory file system of a node. Primary reference counts are maintained for pages within persistent memory of the node. In response to receiving a first operation to link a page into a persistent memory file system of the persistent memory, a primary reference count of the page is incremented before linking the page into the persistent memory file system. In response to receiving a second operation to unlink the page from the persistent memory file system, the page is unlinked from the persistent memory file system before the primary reference count is decremented. Upon the node recovering from a crash, the persistent memory file system is traversed in order to update shadow reference counts for the pages with correct reference count values, which are used to overwrite the primary reference counts with the correct reference count values.

Abstract: An autonomous system for detecting primary site failure on a Replication Data Facility (RDF) and automating failover to a destination site includes a replication data facility health monitor on a destination site that monitors a plurality of health indicators of the primary site. Example health indicators include RDF session state of RDF sessions on the replication data facility, and reachability of a set of IP addresses. Example IP addresses include an IP address of a cluster master node on the primary site, IP addresses of all of the cluster nodes on the primary site, and IP addresses of Network Attached Storage (NAS) servers executing on the cluster nodes. The replication data facility health monitor generates a replication configuration and, upon detection of a failure of the replication data facility at the primary site, uses the replication configuration to automate failover of all of the NAS servers to the destination site.

Abstract: A bus system for a process system, having a first bus subscriber which transmits bus messages and having at least one first bus subscriber which receives bus messages, wherein the transmitting first bus subscriber and the receiving first bus subscriber are connected to one another via a first data bus, wherein the transmitting first bus subscriber is designed such that it transmits control commands to the receiving first bus subscriber, wherein the receiving first bus subscriber is designed such that it executes the control commands of the transmitting first bus subscriber and achieves the object of providing a bus system that is designed to be fail-safe in a special way.

Abstract: Methods, systems, and devices for providing for providing computer implemented services using managed systems are disclosed. To improve the likelihood of the computer implemented services being provided, a subscription based model may be used to manage the managed systems. The subscription model may utilize a highly accessible service to obtain information regarding capabilities of managed systems to present information regarding all potential solutions that the managed systems may provide. By presenting users with such information, the users may not need to be well versed in the underlying hardware and software components necessary for the solutions to be provided. As the hardware components of a managed system are changed over time, the compatible solutions may be continuously updated so that users may be continuously appraised of possible solutions that may be provided using the managed systems.

Abstract: An analysis system includes a control module generates data gathering parameters and data analysis parameters based on one or more inputs regarding an evaluation of a system aspect under test of a system, a data input module receives system gathered data regarding the system aspect under test to produce gathered data, and a data analysis module configured to generate the evaluation of the system aspect under test based on the data analysis parameters and the gathered data One or more databases store one or more of the gathered data, the data analysis parameters, and the evaluation of the system aspect under test and one or more data extraction modules interact with the system aspect under test to extract data from the system aspect under test in accordance with a respective portion of the data gathering parameters to produce the system gathered data and provide the system gathered data.

Abstract: A computer-implemented method for testing a functionality of a computing platform, the computing platform comprising a first microservice, the method comprising: receiving, by an injector microservice, a test configuration file; determining from the test configuration file: a test input message; a test input communication mechanism; and a test output communication mechanism. The method further comprises: generating a test identifier for identifying that a message is being used for testing purposes; transmitting, by the injector microservice, the test input message to the first microservice using the test input communication mechanism, wherein the test input message comprises the test identifier; identifying, by the injector microservice, an output message transmitted via the test output communication mechanism that comprises the test identifier; and recording, by the injector microservice, the output message comprising the test identifier.

Abstract: A set of virtual machines is deployed on a hypervisor. At each virtual machine, one or more local scans is performed to generate a set of computing resource consumption data. In response to receiving a set of hypervisor resource consumption data, a stability factor is generated. Based on the set of resource consumption data, the set of hypervisor resource consumption data, and the stability factor, a determination is made that a default consumption metric exceeds a threshold. In response to the determination, a custom consumption metric is generated, based on at least the set of computing resource consumption data. A user is notified of the custom consumption metric.

Abstract: Provided is a method, computer program product, and system for automatically assigning robotic devices to users based on need using predictive analytics. A processor may monitor activities performed by one or more users. The processor may determine, based on the monitoring, a set of activities that require assistance from a robotic device when being performed by the one or more users. The processor may match the set of activities to a set of capabilities related to a plurality of robotic devices. The processor may identify, based on the matching, a first robotic device that is capable of assisting the one or more users in performing a first activity of the set of activities. The processor may deploy the first robotic device to assist the one or more users in performing the first activity.

Abstract: Embodiments of the present disclosure provide an operation and maintenance system and method. The operation and maintenance system comprises a plurality of interconnected modules including: a data acquisition module, a data storage module, an exception and fault labeling module, an automatic model training and assessment module, an operation and maintenance management and task execution module, and a result checking module.

Abstract: Techniques facilitating anomaly detection and root cause analysis using distributed trace data. In one example, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components comprise: a preprocessing component; and a monitor component. The preprocessing component can generate a trace frame comprising a vectorized representation of textual trace data produced by microservices of a microservice application. The monitor component can identify a state of the microservice application using the trace frame.

Abstract: A method for managing features for a search system using declarative metadata. The method includes receiving search metadata including declarative statements identifying at least one search feature to be enabled across a plurality of components of the search system, performing functional verification of the at least one search feature, testing the at least one search feature, and enabling the at least one search feature in at least one of the plurality of components of the search system in response to positive functional verification and positive testing.

Abstract: An automated system for implementing visual testing of a Graphical User Interface (GUI) of an implemented product is provided. A codified user experience design is used to automatically create precompiled code. The precompiled code is executed to generate a GUI based on the intended codified user experience design. The implemented product code is executed to generate a GUI of the implemented product code. Screenshots of the GUIs are compared to perform automatic visual testing of the implemented product code from the codified user experience design.

Abstract: The subject technology receives, from a first client device, a set of requests for recording user activity detected on a mobile application. The subject technology sends a first request for storing, at a cloud storage system, information related to the set of requests. The subject technology sends a second request for storing, at a local storage system, a set of metadata associated with the information related to the set of requests. The subject technology receives, from a session player application, a third request for playing a session replay corresponding to a user session at the mobile application. The subject technology sends, to the cloud storage system, a fourth request for information related to the set of events for playing the session replay. The subject technology receives, from the cloud storage system, information related to the set of events that occurred at the mobile application.

Abstract: In some embodiments, a robotic process automation (RPA) robot is configured to identify a runtime target of an automation activity (e.g., a button to click, a form field to fill in, etc.) by searching a user interface for a UI element matching a set of characteristics of the target defined at design-time. When the target identification fails, some embodiments display an error message indicating which target characteristic could not be matched. Some embodiments further display for selection by the user a set of alternative target elements of the runtime interface.

Abstract: Embodiments may provide techniques that may provide more accurate and actionable alerts by cloud workload security systems so as to improve overall cloud workload security. For example, in an embodiment, a method may be implemented in a computer system comprising a processor, memory accessible by the processor, and computer program instructions stored in the memory and executable by the processor, and the method may comprise generating performance and security information relating to a software system during development of the software system, generating performance and security information relating to the software system during deployed operation of the software system, matching the performance and security information generated during development of the software system with the performance and security information generated during deployed operation of the software system to determine performance and security alerts to escalate, and reporting the escalated performance and security alerts.

Abstract: Systems and methods for adjusting operating parameters of at least one pipelined software asset. Within a pipelined environment, an agent software asset is inserted immediately preceding a software asset whose operating parameters are to be adjusted. The agent software asset receives data and/or data sets from a user and such data and data sets are inserted/used by the software asset. The agent software asset also allows for a reporting of the output of other software assets to thereby provide users with intermediate outputs from the pipelined environment.

Abstract: Systems and methods for customer journey orchestration are described. One or more aspects of the systems and methods include identifying, by a customer journey orchestration application, a customer journey having a previously unidentified fault; initiating, by a mode selection component, a debug mode of the customer journey orchestration application for the customer journey; receiving, by a graphical user interface of the customer journey orchestration application, a user input corresponding to an event of a plurality of events of the customer journey; simulating, by an event simulation component, the event based on the user input and the debug mode; determining, by a status component, a status of the event based on the simulation; and identifying, by a fault identification component, the previously unidentified fault based on the status of the event.

Abstract: An electronic system includes a first data retriever to communicate with a first database associated with an analytic tool, and a second data retriever to communicate with a second database associated with an electronic testing device; wherein the analytic tool is configured to store information regarding actual usage of a product in the first database; wherein the electronic testing device is configured to store product testing data for the product in the second database; wherein the first data retriever comprises a first communication interface to electronically receive the information; wherein the second data retriever comprises a second communication interface to electronically receive the product testing data; and wherein the electronic system further comprises a processing unit configured to compute a score indicating a quality of product testing for the product based on the information regarding the actual usage of the product and/or the product testing data.

Abstract: In at least one embodiment, a system performs regression testing of software using selected test cases. In at least one embodiment, the system selects the test case for regression testing based on whether the test case correlates with modified code. In at least one embodiment, a test case correlates with the modified code if the test case tests all or a proper subset of the modified code. In at least one embodiment, if a test case does not test any of the modified code, then the test case is not used in the regression testing of the modified code.

Abstract: Embodiments of the present disclosure relate to a method, system and computer program product for semantic search based on a graph database. In some embodiments, a method is disclosed. According to the method, the user jobs of a user are obtained from a first software product. Based on the user jobs, target test cases are selected from a plurality of test cases associated with the first software product and a second software product. The target test cases are applied to the first software product and the second software product, and in accordance with a determination that a result of applying the target test cases satisfies a predetermined criterion, an instruction is provided to indicate migrating from the first software product to the second software product. In other embodiments, a system and a computer program product are disclosed.

Abstract: A system for detecting and mitigating application security threats comprises a processor associated with a server. The processor analyzes a group of code sets of an application and determines a number of the threat objects in each code set. The processor further executes a run-time security model to analyze a combined code sets to determine threat object measurements and false positive measurements of application product releases for the application. The processor determines threat threshold ratios and false positive ratios per application. The processor further generates an array of quartile weights corresponding to a set of quartile ranges of the threat threshold ratios and a set of quartile ranges of the false positive ratios associated with the application. The processor generates an adjusted object measurement for the application based on a corresponding quartile weight in the array. The processor determines whether to trigger a development security model for the application.

Abstract: Methods, systems, and devices for mapping descriptors for read operations are described. A memory device may include a first cache may include a mapping table between the logical addresses and the physical addresses, and a second cache may include one or more descriptors of one or more physical addresses of the memory array. A descriptor may include a starting logical address, a starting physical address, and a quantity of addresses in the descriptor, and may be configured to identify addresses or sets of address that are frequently accessed. When an access command (e.g., a read command) is received, the first cache may be queried and then the second cache may be queried (if there is a cache miss at the first cache). The physical address of the data of the memory array may be determined (and accessed) based on the descriptors stored in the second cache.

Abstract: A subset of blocks from a set of blocks of a memory device are identified based on a valid data count constraint. A first block from the subset of blocks is selected based on a valid data count of the first block. A second block from the subset of blocks is selected based on a data temperature of the second block. A comparison of the first block and the second block is performed in accordance with one or more comparison criterion. The first block or the second block is selected as a garbage collection source block based on the comparison. Garbage collection is performed at the garbage collection source block.

Abstract: An example memory sub-system includes: a plurality of bank groups, wherein each bank group comprises a plurality of memory banks; a plurality of row buffers, wherein two or more row buffers of the plurality of row buffers are associated with each memory bank; a cache comprising a plurality of cache lines; a processing logic communicatively coupled to the plurality of bank groups and the plurality of row buffers, the processing logic to perform operations comprising: receiving an activate command specifying a row of a memory bank of the plurality of memory banks; fetching data from the specified row to a row buffer of the plurality of row buffers; and copying the data to a cache line of the plurality of cache lines.

Abstract: Apparatuses, systems, and methods for controlling cache allocations in a configurable combined private and shared cache in a processor-based system. The processor-based system is configured to receive a cache allocation request to allocate a line in a share cache structure, which may further include a client identification (ID). The cache allocation request and the client ID can be compared to a sub-non-uniform memory access (NUMA) (sub-NUMA) bit mask and a client allocation bit mask to generate a cache allocation vector. The sub-NUMA bit mask may have been programmed to indicate that processing cores associated with a sub-NUMA region are available, whereas processing cores associated with other sub-NUMA regions are not available, and the client allocation bit mask may have been programmed to indicate that processing cores are available.

Abstract: Disclosed is a system and method for use in a cache for suppressing modification of cache line. The system and method includes a processor and a memory operating cooperatively with a cache controller. The memory includes a coherence directory stored within a cache created to track at least one cache line in the cache via the cache controller. The processor instructs a cache controller to store a first data in a cache line in the cache. The cache controller tags the cache line based on the first data. The processor instructs the cache controller to store a second data in the cache line in the cache causing eviction of the first data from the cache line. The processor compares based on the tagging the first data and the second data and suppresses modification of the cache line based on the comparing of the first data and the second data.

Abstract: Techniques for invalidating cache lines are provided. The techniques include issuing, to a first level of a memory hierarchy, a weak exclusive read request for a speculatively executing store instruction; determining whether to invalidate one or more cache lines associated with the store instruction in one or more memories; and issuing the weak invalidation request to additional levels of the memory hierarchy.

Abstract: A scalable cache coherency protocol for system including a plurality of coherent agents coupled to one or more memory controllers is described. The memory controller may implement a precise directory for cache blocks from the memory to which the memory controller is coupled. Multiple requests to a cache block may be outstanding, and snoops and completions for requests may include an expected cache state at the receiving agent, as indicated by a directory in the memory controller when the request was processed, to allow the receiving agent to detect race conditions. In an embodiment, the cache states may include a primary shared and a secondary shared state. The primary shared state may apply to a coherent agent that bears responsibility for transmitting a copy of the cache block to a requesting agent. In an embodiment, at least two types of snoops may be supported: snoop forward and snoop back.

Abstract: A device is connected via a coherence interconnect to a CPU with a cache. The device monitors cache coherence events via the coherence interconnect, where the cache coherence events relate to the cache of the CPU. The device also includes a buffer that can contain representations, such as addresses, of cache lines. If a coherence event occurs on the coherence interconnect indicating that a cache line in the CPU's cache is dirty, then the device is configured to add an entry to the buffer to record the dirty cache line.

Abstract: Embodiments herein describe memories in a processor system in an integrated circuit (IC) that can be assigned to either a cache coherent domain or an I/O domain, rather than being statically assigned by a designer of the IC. That is, the user or customer can assign the memories to domain that best suits their desires. Further, the memories can be reassigned to a different domain if the user later changes her mind.

Abstract: Apparatus, method and code for fabrication of the apparatus, the apparatus comprising a cache providing a plurality of cache lines, each cache line storing a block of data; cache access control circuitry, responsive to an access request, to determine whether a hit condition is present in the cache; and cache configuration control circuitry to set, in response to a merging trigger event, merge indication state identifying multiple cache lines to be treated as a merged cache line to store multiple blocks of data, wherein when the merge indication state indicates that the given cache line is part of the merged cache line, the cache access control circuitry is responsive to detecting the hit condition to allow access to any of the data blocks stored in the multiple cache lines forming the merged cache line.

Abstract: A method, programming product, processor, and/or system for prefetching data is disclosed that includes: receiving a request for data at a cache; identifying whether the request for data received at the cache is a demand request or a prefetch request; and determining, in response to identifying that the request for data received at the cache is a prefetch request, whether to terminate the prefetch request, wherein determining whether to terminate the prefetch request comprises: determining how many hits have occurred for a prefetch stream corresponding to the prefetch request received at the cache; and determining, based upon the number of hits that have occurred for the prefetch stream corresponding to the prefetch request received by the cache, whether to terminate the prefetch request.

Abstract: Techniques are disclosed relating to cache footprint management. In some embodiments, execution circuitry is configured to perform operations for instructions from multiple threads in parallel. Cache circuitry may store information operated on by threads executed by the execution circuitry. Scheduling circuitry may arbitrate among threads to schedule threads for execution by the execution circuitry. Tracking circuitry may determine one or more performance metrics for the cache circuitry. Control circuitry may, based on the one or more performance metrics meeting a threshold, reduce a limit on a number of threads considered for arbitration by the scheduling circuitry, to control a footprint of information stored by the cache circuitry. Disclosed techniques may advantageously reduce or avoid cache thrashing for certain processor workloads.

Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.

Abstract: A data management method causes a computer to execute processing including: creating, when a predetermined data processing program performs data processing, based on an access frequency to a data store, high-frequency state item list information obtained by listing high-frequency state items of which the access frequency is high; determining, when state information that includes a value of the high-frequency state item is written to the data store, whether or not the state information corresponds to the high-frequency state item with reference to the high-frequency state item list information; grouping and writing pieces of the state information of a plurality of the high-frequency state item.

Abstract: Aspects of the invention include receiving, at an operating system executing on a processor, a write request from a program to write data to a memory. The write request includes a virtual memory address and the data. It is determined that the virtual memory address is not assigned to a physical memory address. Based on the determining, the unassigned virtual memory address is assigned to a physical memory address in an overflow memory. The data is written to the physical memory address in the overflow memory and an indication that the write data was successfully written is returned to the program. Future requests by the program to access the virtual memory address are directed to the physical memory address in the overflow memory.

Abstract: A nonvolatile memory system is disclosed. The nonvolatile memory system includes a host device and a storage device connected to the host device through a physical cable including a power line and a data line. The storage device includes: a nonvolatile memory; a link controller configured to temporarily deactivate the data line while supplying power from the host device through the power line; and a memory controller including a user verification circuit configured to authenticate a user of the storage device and change a state of the memory controller according to a verification result, a relink trigger circuit configured to control the link controller based on the state change of the memory controller, and a data processing circuit configured to encrypt and decrypt data.

Abstract: An electronic device includes a first memory controller, a second memory controller, and a memory access controller. The first memory controller stores setting information of a predetermined memory, wherein the predetermined memory is defined as an execute-only-memory. The second memory controller provides and sets an enabling register according to the setting information of the predetermined memory, and generates an enabling signal. The memory access controller accesses the first memory controller and the second memory controller to move the data of the predetermined memory to a predetermined memory space corresponding to the enabling register according to the enabling signal and the setting information of the predetermined memory.