Abstract: Container images may be generated from a backup system that includes a backup of one or more applications from a computing system of an entity. During a backup process, an application can be identified and its storage location in a secondary storage can be tracked or saved in a backup index. Configuration information and data or files created by user interaction with the application can be backed up and the location of the backed up data or files may be stored in the backup index along with the location of the configuration information. Using the backup index, a container image can be created that includes a selected application, its configuration information, and data, if any, created by the application. The container image can be generated from the backup stored in the secondary storage.

Abstract: A backup entity and a method for backing up a disk volume of a production device are provided. The backup entity is configured to: create a first backup image of the disk volume, in a backup repository. Further, the backup entity is configured to obtain a first indication from the production device, wherein the first indication is indicative of a first operation to be performed by the production device on the disk volume. The backup entity is further configured to perform the first operation on the first backup image, to obtain a second backup image in the backup repository. According to the application, a solution to mimic an operation that changes data of a production storage, in a backup system, is provided, which can reduce the amount of data sent from the production storage to the backup system and thus reduce a backup window.

Abstract: An apparatus is provided for resolving an unintended transaction rollback in a system that includes an audited database, a non-audited application, and a facility for converting non-audited applications to use audited database transactions, wherein the unintended transaction rollback is the result of a failure of the facility to convert the unintended transaction rollback to a commit operation, The non-audited application is operated with the facility creating database transactions against the audited database. The database transactions include one or more transaction steps or operations. The created database transactions are monitored to detect transaction rollbacks. A determination is made when a detected transaction rollback for a database transaction is an unintended transaction rollback. The one or more transaction steps or operations of the database transaction that included the unintended transaction rollback are recovered in the audited database.

Abstract: Methods and systems for managing data processing systems are disclosed. A data processing system may include and depend on the operation of hardware and/or software components. To manage the operation of the data processing system, a data processing system manager may obtain logs for components of the data processing system. The logs may record information that describe and reflect the historical and/or current operation of these components. Inference models may be implemented to predict likely future component failures (e.g., a predicted mean time to first failure (MTFF) of the components) using information recorded in the logs and component specification information from component vendors. The likely future component failures may be analyzed to reduce the likelihood of the data processing system becoming impaired.

Abstract: Techniques described herein relate to methods and systems for managing backup operations. The method may include receiving a request to perform a first backup operation for a first virtual machine (VM); making a first determination, using a vProxy preference map, that a first vProxy is assigned to the first VM based on a backup capability associated with the first vProxy; making a second determination that the first vProxy is not available to perform the first backup operation; making a third determination, based on the second determination and using a vProxy information database, that a second vProxy is available to perform the first backup operation based on the second vProxy being associated with the same backup capability as the first vProxy; and performing the first backup operation using the second vProxy.

Abstract: A method for system recovery may be provided. The method may be implemented on a management server of a recovery system. The recovery system may further include at least one working server configured to perform one or more tasks and a global storage device configured to store a backup system or a system image file of each of the at least one working server. The management server may be connected to the at least one working server and the global storage device. The method may include, for each of the at least one working server, determining whether the working server is in an abnormal state. For each of the at least one working server, in response to determining that the working server is in an abnormal state, the method may further include assigning at least part of the global storage device to the working server and causing the working server to perform a first system recovery operation using the at least part of the global storage device.

Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to control access to a persistent storage media based on a block and sub-block access structure, store a data structure in the persistent storage media to track read fails at a sub-block granularity for a word-line for every block, and update the data structure in response to a read fail on a block to indicate a failed sub-block that corresponds to the read fail for a word-line for the block. Other embodiments are disclosed and claimed.

Abstract: Systems for distributed data storage. A method commences upon accessing a set of data items that describe computing nodes to be organized into a ring topology. The ring topology and distributed data storage policies are characterized by quantitative failure-resilient characteristics such as a replication factor. Various characteristics of the topology serve to bound two or more availability domains of the ring into which the computing nodes can be mapped. A set of quantitative values pertaining to respective quantitative failure-resilient characteristics are used for enumerating candidate ring topologies where the computing nodes are mapped into the availability domains. Using the quantitative failure-resilient characteristics, alternative candidate ring topologies are evaluated so as to determine a configuration score for candidate ring topologies. A candidate ring topology is configured based on a computed configuration score surpassing a threshold score.

Abstract: Techniques for storage testing involve: acquiring a first state of a storage system including first input/output (IO) load information; taking a first action based on the first state, the first action causing the first IO load information to be changed to second IO load information; updating the first action to be a reserved action for the first state if it is obtained based on the second IO load information that the storage system reaches a preset condition; and obtaining an action combination of a plurality of IO load information changes based on a plurality of reserved actions corresponding to a plurality of states, wherein the plurality of states include the first state. Accordingly, the most effective load combination change mode for the storage system can be found automatically and more accurately, so as to find more vulnerabilities of the storage system, thereby improving the efficiency of storage system testing.

Abstract: An electronic device is provided. The electronic device includes a connector including one or more signal terminals and a control circuit electrically connected with the one or more signal terminals. The control circuit may be configured to monitor attachment with an external device through an identification terminal among the one or more signal terminals, identify whether a designated number of, or more, monitoring signals related to attachment with the external device are detected during a designated time, and identify whether there is the attachment with the external device, based on a voltage of a power terminal among the one or more signal terminals, in response to the detection of the monitoring signals being identified.

Abstract: A memory testing device uses a master control unit to concurrently operate multiple, intelligent, slave control units (SCUs). SCUs have one or more processing unit(s) (i.e. Finite State Machines, micro controllers, processors) capable of processing one or more firmware with or without operating system (i.e. bare-metal, embedded OS, RTOS (real time operating system)) to perform a series of task defined by firmware(s) for testing volatile and/or non-volatile memory devices connected into one or more DUT devices plus SCU has capability of having operating system and install and run host applications locally within each SCU units to mimic host applications environments along with performing regular memory testing.

Abstract: A method of testing a digital key is described that provides, from a digital key test manager device, standard digital key instructions for a computing device to send messages to a device under test; communicates, from the digital key test manager device, with the device under test to determine operations of the device under test as a result of the messages; and evaluates, at the digital key test manager device, the operations of the device under test to assess functionality of the digital key.

Abstract: Techniques for filtering telemetry data to allocate system resources among system components are disclosed. A system filters a data set of telemetry data prior to allocating or re-allocating system resources to system components. A filtered data set includes data points that include the highest resource-utilization values for the system components. The system compares resource-usage for each component managed by a computing machine in one time period to the resource-usage for the component in another time period. The system omits from a filtered data set any time period in which the resource-usage value for each system component is subsumed by the resource-usage values of the same system components in another time period. The system generates resource-reallocation candidate models for the computing machines in the system based on the filtered data set. The system reallocates system resources among system components using a selected resource-reallocation candidate.

Abstract: A performance monitoring system includes a metric collector configured to receive, via metric exporters, telemetry data comprising metrics related to a network of computing devices. A metric time series database stores related metrics. An alert rule evaluator service is configured to evaluate rules using stored metrics. The performance monitoring system may include a machine learning module and is configured to determine optimized metric collection sampling intervals and rule evaluation intervals, and to automatically determine recommended alert rules.

Abstract: A method of persisting and querying Real User Monitoring (RUM) data comprises grouping together spans associated with a user-interaction with a webpage or application that are ingested during a given time duration. The method also comprises generating one or more data sets each associated with an analysis modality using the grouped spans, wherein each analysis modality extracts a different level of detail from the spans. Further, the method comprises selecting, based on a first user query, a first analysis modality for generating a response to the first user query and accessing a data set that is associated with the first analysis modality. The method also comprises generating the response to the first user query using the data set associated with the first analysis modality, wherein the first user query requests information pertaining to a performance of the application in response to the user-interaction.

Abstract: Systems, computer program products, and methods are described herein for identifying, logging and reporting application events in an electronic network. The present invention is configured to receive at least one user interaction associated with at least one application, wherein the user interaction comprises a user identifier associated with a user account and an interaction identifier associated with the at least one user interaction; determine at least one interaction keyword based on the at least one user interaction; generate a specific interaction log comprising the at least one user interaction and the at least one interaction keyword; and generate a query dashboard comprising at least a plurality of interaction logs, wherein the plurality of interaction logs comprises at least the specific interaction log and an associated application identifier based on the at least one application and at least a second interaction log associated with at least a second application.

Abstract: A log is received at a user space process of a host from a logical logging component of a virtual computing instance (VCI), the log generated by a container running on the VCI. The log is communicated from the user space process to a logical logging component of the host. The log is communicated from the logical logging component of the host to a logging process of the host. The log is configured and stored in host storage.

Abstract: The present invention relates to the technical field of processing software logs, in particular a software log processing method. the present invention has the advantages of following up the unique service code enables all log contents to be automatically concatenated into a log block, and the system to concurrently count execution time, warnings and errors generated in each process, enabling the O&M operators and developers to quickly locate the problems when dealing with them at a later stage, in the scenarios such as a distributed system and microservice system, making it possible to unify the logs scattered in each system to the log platform for storage by way of the unique service code, as well as concatenate the execution timing in each system, greatly raising the treatment efficiency for the problems in the microservices or the distributed system and improving the maintainability of the distributed system or the microservice system.

Abstract: In some embodiments, after receiving event data corresponding to an event-based workflow, the computer system attempts to cause execution of the first step corresponding to one or more events; and in response to receiving an indication that execution of the first step corresponding to the one or more events has failed, the computer system resolves failure the first step in a manner that is based one or more execution criteria (e.g., failure criteria) that is associated with the first step.

Abstract: Systems and methods provide for an integrated script development and script validation platform. The integrated script development and script validation platform archives data in a way such that the dependencies between contributions of code strings (e.g., script sets) are detected and recorded. That is, the systems and methods detect dependency branches in the script code of script sets. By doing so, the systems and methods may identify individual performance characteristics for a given script set as well as determine the overall impact on the application itself.

Abstract: A method for managing user stories in software development via artificial intelligence is disclosed. The method includes aggregating, via an application programming interface, raw data from a software development framework according to a predetermined schedule, the raw data corresponding to user stories from a plurality of users in a natural language format; ingesting the aggregated raw data to generate structured data sets; generating a language model by using a neural network and the structured data sets, the neural network including a transformer component; training, by using the structured data sets, the language model based on predetermined criterions; tuning the trained language model for tasks by adjusting parameters; and exposing, via a communication interface, the tuned language model.

Abstract: Bots are typically programmed to automate tasks and provide statistically expected results. However, a bot may malfunction and generate aberrant outputs. It is technically challenging to detect the aberrant outputs and determine whether the outputs are due to an error in how the bot processes inputs or because the bot has received unusual or unexpected input data. Apparatus and methods are provided for auto-determining why a bot has generated output outside expected results. An auto-correct bot will detect problems and auto-identify potential solutions, simulate those solutions and apply those solutions to remediate the malfunctioning bot.

Abstract: A computing device may access a target code for implementing an application. The device may identify addresses for one or more functions or one or more variables associated with the target code. The device may generate an interval tree comprising a root node and one or more function nodes. The device may in response to the target code invoking a function or variable: generate an intercept function configured to intercept communication between the target code and a call address for the at least one of the one or more functions or the one or more variables invoked by the target code. The device may intercept data communicated between the target code and the call address. The device may store the intercepted data as a function node in the interval tree. The device may transmit the interval tree to a user device.

Abstract: A computer-implemented method includes downloading respective instances of an enterprise mobile application to a plurality of mobile devices. The instances of the enterprise mobile applications, while executing on respective mobile devices, capture, for each session, a session log that includes indications of ordered user actions occurring during the session, and optionally time intervals between user actions and/or user attributes. Captured session logs stored at and are mined by one or more servers to discover a particular pattern or sequence of user actions that occurred across multiple, different user sessions. If the number and/or rate of occurrences of the particular pattern is greater than a threshold, a new test case corresponding to the pattern is automatically generated and added to a suite of test cases for the UI functionality of the enterprise mobile application. The updated test suite may be automatically executed on a test version of the enterprise mobile application.

Abstract: Techniques for monitoring operating statuses of an application and its dependencies are provided. A monitoring application may collect and report the operating status of the monitored application and each dependency. Through use of existing monitoring interfaces, the monitoring application can collect operating status without requiring modification of the underlying monitored application or dependencies. The monitoring application may determine a problem service that is a root cause of an unhealthy state of the monitored application. Dependency analyzer and discovery crawler techniques may automatically configure and update the monitoring application. Machine learning techniques may be used to determine patterns of performance based on system state information associated with performance events and provide health reports relative to a baseline status of the monitored application. Also provided are techniques for testing a response of the monitored application through modifications to API calls.

Abstract: In various examples, a VPU and associated components may be optimized to improve VPU performance and throughput. For example, the VPU may include a min/max collector, automatic store predication functionality, a SIMD data path organization that allows for inter-lane sharing, a transposed load/store with stride parameter functionality, a load with permute and zero insertion functionality, hardware, logic, and memory layout functionality to allow for two point and two by two point lookups, and per memory bank load caching capabilities. In addition, decoupled accelerators may be used to offload VPU processing tasks to increase throughput and performance, and a hardware sequencer may be included in a DMA system to reduce programming complexity of the VPU and the DMA system. The DMA and VPU may execute a VPU configuration mode that allows the VPU and DMA to operate without a processing controller for performing dynamic region based data movement operations.

Abstract: Various implementations described herein relate to systems and methods for placing data on a Solid State Drive (SSD), including writing data to a non-volatile memory storage of the SSD, determining one or more of read errors, a number of invalid pages per block, or a read disturb counter for the data, determining access frequency of the data based on the one or more of the read errors, the number of invalid pages per block, or the read disturb counter, and partitioning the non-volatile memory storage into a plurality of regions based on the access frequency.

Abstract: A storage array controller may receive a write request comprising data to be stored at one or more solid-state storage devices. A write granularity associated with the write request may be generated that is less than a logical block size associated with the storage array controller. The data associated with the write request may be segmented based on the generated write granularity. The write request may be executed to store the segmented data at the one or more solid-state storage devices.

Abstract: A method, apparatus, and system manages an object in a storage provider that provides a plurality of storage classes of storage. The method may include receiving a request for transfer of the object comprising segments from a first storage class to a second storage class of the storage provider; storing metadata associated with the object; determining that each of the segments satisfies a data storage policy based on the access characteristics of each of the segments within the object, wherein the determining includes: determining that none of the segments are referenced by the new segment for a predetermined time period; determining that none of the segments are accessed for the predetermined time period from the last accessed time instance; and in response to determining that each of the segments satisfies the data storage policy, transferring the object from the first storage class to the second storage class of the storage provider.

Abstract: Techniques are provided for implementing and managing a multi-modal write cache for a data storage system. For example, a storage control system is configured to perform a write caching method which comprises the storage control system receiving an input/output (I/O) write request from a client application to write data to a primary storage volume, comparing a current I/O workload associated with the client application to an I/O workload threshold, and writing the data of the I/O write request to one of (i) a persistent write cache in a persistent storage volume and (ii) a non-persistent write cache in a non-persistent storage volume, based at least in part on a result of comparing the current I/O workload to the I/O workload threshold.

Abstract: In one embodiment, a method of selectively reserving portions of a last level cache (LLC) for a multi-core processor, the method comprising: allocating, by an executive system, plural classes of service to the portions of the LLC, wherein the portions comprise ways, and wherein each of the plural classes of service are allocated to one or more of the ways; assigning, by the executive system, one of the plural classes of service to an application as a default class of service, wherein the assignment controls which of the ways the application can allocate into; and overriding, by the application, the default class of service to enable allocation by the application to the one or more of the ways associated with a non-default class of service.

Abstract: Data processing apparatuses and methods of data processing are disclosed wherein a processing element maintains a buffer in the memory in support of the data processing it performs. A write pointer indicates a current write location in the buffer. A cache holds copies of the data which are subject to the data processing operations and allocations into the cache from the memory and write-backs from the cache to the memory are performed in cache line units of data. When the processing element performs a data write to the buffer at a location determined by the write pointer, the processor updates the write pointer in an update direction corresponding to a progression direction of data writes in the buffer, and further locations in the progression direction in the buffer between the location indicated by the write pointer and a boundary location are signalled to be written with a predetermined value.

Abstract: Methods and systems for existing software applications to automatically take advantage of multicore computer systems outside of the conventional simultaneous processing of multiple applications and without performance problems from cache misses and mismatched task processing times are presented. Unlike other multicore optimization techniques, the present invention uses techniques that are applied to design graphs and work for scaled and standard speedup-based parallel processing. The methods and systems optimize software designs that are attached to code for maximum performance on multicore computer hardware by analyzing and modifying loop structures to produce a general parallel solution, not just simple loop unrolling.

Abstract: Prefetch circuitry generates, based on stream prefetch state information, prefetch requests for prefetching data to at least one cache. Cache control circuitry controls, based on cache policy information associated with cache entries in a given level of cache, at least one of cache entry replacement in the given level of cache, and allocation of data evicted from the given level of cache to a further level of cache. The stream prefetch state information specifies, for at least one stream of addresses, information representing an address access pattern for generating addresses to be specified by a corresponding series of prefetch requests. Cache policy information for at least one prefetched cache entry of the given level of cache (to which data is prefetched for a given stream of addresses) is set to a value dependent on at least one stream property associated with the given stream of addresses.

Abstract: A cache memory subsystem includes virtually-indexed L1 and PIPT L2 set-associative caches having an inclusive allocation policy such that: when a first copy of a memory line specified by a physical memory line address (PMLA) is allocated into an L1 entry, a second copy of the line is also allocated into an L2 entry; when the second copy is evicted, the first copy is also evicted. For each value of the PMLA, the second copy can be allocated into only one L2 set, and an associated physical address proxy (PAP) for the PMLA includes a set index and way number that uniquely identifies the entry. For each value of the PMLA there exist two or more different L1 sets into which the first copy can be allocated, and when the L2 evicts the second copy, the L1 uses the PAP of the PMLA to evict the first copy.

Abstract: Methods, systems, and devices for compressed logical-to-physical mapping for sequentially stored data are described. A memory device may use a hierarchical set of logical-to-physical mapping tables for mapping logical block address generated by a host device to physical addresses of the memory device. The memory device may determine whether all of the entries of a terminal logical-to-physical mapping table are consecutive physical addresses. In response to determining that all of the entries contain consecutive physical addresses, the memory device may store a starting physical address of the consecutive physical addresses as an entry in a higher-level table along with a flag indicating that the entry points directly to data in the memory device rather than pointing to a terminal logical-to-physical mapping table. The memory device may, for subsequent reads of data stored in one or more of the consecutive physical addresses, bypass the terminal table to read the data.

Abstract: Address translation circuitry is provided to perform address translation on receipt of a first address to generate a second address. The address translation circuitry comprises a page walk controller configured to perform sequential page table lookups in a plurality of page table levels of a page table hierarchy. Portions of the first address are used to index into sequential page table levels. Cache storage is provided to cache entries comprising translation information retrieved by the sequential page table lookups. An entry in the cache storage further comprises in association with the translation information a re-use indicator indicative of a re-use expectation for subsequent information which is subordinate to the translation information of the entry in the page table hierarchy. The address translation circuitry is configured to modify cache usage for the subsequent information in dependence on the re-use indicator.

Abstract: Systems and methods for cache replacement are disclosed. Techniques are described that determine a re-reference interval prediction (RRIP) value of respective data blocks in a cache, where an RRIP value represents a likelihood that a respective data block will be re-used within a time interval. Upon an access, by a processor, to a data segment in a memory, if the data segment is not stored in the cache, a data block in the cache to be replaced by the data segment is selected, utilizing a binary tree that tracks recency of data blocks in the cache.

Abstract: Example implementations include a system of secure decryption by virtualization and translation of physical encryption keys, the system having a key translation memory operable to store at least one physical mapping address corresponding to at least one virtual key address, a physical key memory operable to store at least one physical encryption key at a physical memory address thereof; and a key security engine operable generate at least one key address translation index, obtain, from the key translation memory, the physical mapping address based on the key address translation index and the virtual key address, and retrieve, from the physical key memory, the physical encryption key stored at the physical memory address.

Abstract: Embodiments of the present disclosure relate to application partitioning for locality in a stacked memory system. In an embodiment, one or more memory dies are stacked on the processor die. The processor die includes multiple processing tiles and each memory die includes multiple memory tiles. Vertically aligned memory tiles are directly coupled to and comprise the local memory block for a corresponding processing tile. An application program that operates on dense multi-dimensional arrays (matrices) may partition the dense arrays into sub-arrays associated with program tiles. Each program tile is executed by a processing tile using the processing tile's local memory block to process the associated sub-array. Data associated with each sub-array is stored in a local memory block and the processing tile corresponding to the local memory block executes the program tile to process the sub-array data.

Abstract: System and method for improved transferring of data involving memory device systems. A memory appliance (MA) comprising a plurality of memory modules is configured to store data within the plurality of memory modules and further configured to receive data commands from the first server and a second server coupled to the MA. The data commands may include direction memory access commands such that the MA can service the data commands while bypassing a host controller of the MA.

Abstract: A memory device includes a processor in memory (PIM) circuit including an internal processor configured to perform an internal processing operation, and an interface circuit connected to the PIM circuit, wherein the interface circuit includes a command address decoder configured to decode a command and an address received through first pins to generate an internal command, a second pin configured to receive a voltage signal relating to a control of a PIM operation mode, and a command mode decoder configured to generate at least one command mode bit (CMB) based on the internal command and the voltage signal, and the interface circuit outputs internal control signals to the PIM circuit based on the at least one CMB to control the internal processing operation of the PIM circuit.

Abstract: Circuitry comprises a memory to store data defining a set of one or more command queues each associated with a respective memory address space, each command queue defining successive commands for execution from a queue head to a queue tail, the commands being selected from a set of commands comprising synchronization commands and one or more other commands defining memory management operations for a given memory address space, in which completion of a synchronization command is dependent upon one or more completion criteria indicating that all commands from any of the command queues which are earlier than the synchronization command in an execution order have completed; and command processing circuitry to execute the commands; in which the command processing circuitry is configured to maintain a linked list of entries having a list order, each entry defining a respective one of the command queues, in which the command processing circuitry is configured to execute commands at the head of command queues, the co

Abstract: Systems, apparatuses, and methods related to a controller for managing multiple types of memory are described. A controller includes a front end portion, a central controller portion, a back end portion, and a management unit can manage a first type of memory device that operates according to a first set of timing characteristics and a second type of memory device that operates according to a second set of timing characteristics. The central controller portion is configured to cause performance of a memory operation and comprises a cache memory to buffer data associated performance of the memory operation, a security component configured to encrypt the data before storing the data in the first type of memory device or the second type of memory device, and error correction code (ECC) circuitry to ECC encode and ECC decode the data.

Abstract: A shared memory controller receives, from a computing node, a request associated with a memory transaction involving a particular line in a memory pool. The request includes a node address according to an address map of the computing node. An address translation structure is used to translate the first address into a corresponding second address according to a global address map for the memory pool, and the shared memory controller determines that a particular one of a plurality of shared memory controllers is associated with the second address in the global address map and causes the particular shared memory controller to handle the request.

Abstract: A link balance adjustment method includes the following steps. A connection port initiates a balance adjustment process through an interrupt signal. A microprocessor provides an adjustment parameter for an external device from a register and transmits the adjustment parameter to the connection port. A measurement signal is initiated by the microprocessor, and the measurement signal enables the connection port to measure the signal quality after the adjustment parameter has been applied by the external device. The microprocessor determines whether the connection port needs to perform a preprocessing. When the microprocessor determines that the connection port needs to perform a preprocessing, the connection port performs the preprocessing and generates preprocessing data. The connection port transmits the preprocessing data to the register. The microprocessor reads the preprocessing data or the signal quality in the register.

Abstract: A wheel information transfer apparatus, including: an information detection apparatus to detect and store wheel-related information; and an information transfer apparatus to transfer the wheel-related information over a transfer medium; in which the information transfer apparatus is configured to transfer at least a first portion of the wheel-related information parallel or quasi-parallel, and in which the information transfer apparatus is configured to transfer the at least first portion of the wheel-related information or a second portion of the wheel-related information serially within the parallel or quasi-parallel data transfer. Also described are a wheel information transfer method and a related vehicle.

Abstract: Methods and apparatus relating to techniques for multi-tile memory management. In an example, an apparatus comprises a cache memory, a high-bandwidth memory, a shader core communicatively coupled to the cache memory and comprising a processing element to decompress a first data element extracted from an in-memory database in the cache memory and having a first bit length to generate a second data element having a second bit length, greater than the first bit length, and an arithmetic logic unit (ALU) to compare the data element to a target value provided in a query of the in-memory database. Other embodiments are also disclosed and claimed.

Abstract: Methods, systems, and apparatus, including medium-encoded computer program products, for implementing a dynamic processor architectures include, in one or more aspects of the subject matter described in this specification, an apparatus including: switches coupled with computing elements in a hardware processor to enable selective formation of one or more cores from the computing elements in the hardware processor; and means for dynamically determining how many of the one or more cores to form in the hardware processor, by provision of control signals to the switches, to execute instructions of one or more computer programs based on (i) a current set of the instructions to be executed and (ii) a current set of the computing elements available for processing instructions.

Abstract: A symmetric multiprocessor includes with a hierarchical ring-based interconnection network is disclosed. The symmetric processor includes a plurality of buses comprised on the symmetric multiprocessor, wherein each of the buses are configured in a circular topology. The symmetric multiprocessor also includes a plurality of multi-processing nodes interconnected by the buses to make a hierarchical ring-based interconnection network for conveying commands between the multi-processing nodes. The interconnection network includes a command network configured to transport commands based on command tokens, wherein the tokens dictate a destination of the command, a partial response network configured to transport partial responses generated by the multi-processing nodes, and a combined response network configured to combine the partial responses generated by the multi-processing nodes using combined response tokens.