Graphoepitaxy Or Surface Modification To Enhance Epitaxy Patents (Class 117/913)
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Patent number: 11878354Abstract: A single-crystal diamond having a first facet plane is prepared. The single-crystal diamond is fixed to the support based on the first facet plane. An X-ray image of the single-crystal diamond is captured, the X-ray image being an X-ray image in which a crystal orientation of the single-crystal diamond is associated with an X-ray emission direction by associating the support to which the single-crystal diamond is fixed with the X-ray emission direction. A position of an inclusion of the single-crystal diamond in the single-crystal diamond is specified based on the X-ray image. It is determined whether or not a shape of the diamond tool intermediate is extractable from the single-crystal diamond with the inclusion being not included in an inclusion-excluded region. The shape of the diamond tool intermediate is extracted from the single-crystal diamond with the inclusion being not included in the inclusion-excluded region.Type: GrantFiled: December 24, 2020Date of Patent: January 23, 2024Assignee: SUMITOMO ELECTRIC HARDMETAL CORP.Inventors: Masayuki Nishizawa, Kiichi Meguro
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Patent number: 10756110Abstract: Memory pillar structures extending through an alternating stack of insulating layers and word-line-level electrically conductive layers are formed over a substrate. Each of the memory pillar structures includes a vertical semiconductor channel and a memory film. Each of the memory pillar structures protrudes above an insulating cap layer located above the alternating stack to provide an inter-pillar gap region that laterally extends between laterally-neighboring pairs of the memory pillar structures. A metal-nucleating material having a physically exposed metal-nucleating surface is formed at a bottom of the inter-pillar gap region without covering upper portions of sidewalls of the memory pillar structures. A metal may be selectively grown upward from the physically exposed metal-nucleating surface while suppressing growth of the metal from physically exposed vertical surfaces around the memory pillar structures.Type: GrantFiled: April 10, 2019Date of Patent: August 25, 2020Assignee: SANDISK TECHNOLOGIES LLCInventors: Rahul Sharangpani, Raghuveer S. Makala, Adarsh Rajashekhar, Fei Zhou
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Patent number: 10283595Abstract: A silicon carbide semiconductor substrate according to an aspect of the present disclosure has a first principal surface and a second principal surface opposite to the first principal surface. The silicon carbide semiconductor substrate includes a silicon carbide semiconductor crystal, and a first affected layer having crystal disturbances and disposed under the first principal surface. A thickness of the first affected layer in a first region including a center of the first principal surface is smaller than a thickness of the first affected layer in a second region surrounding the first region in a plane view.Type: GrantFiled: March 18, 2016Date of Patent: May 7, 2019Assignee: PANASONIC CORPORATIONInventor: Chiaki Kudou
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Patent number: 9780366Abstract: A method for forming a rough silicon wafer including the successive steps of: performing a plasma etching of a surface of the wafer in conditions suitable to obtain a rough structure, and performing two successive ion milling steps, one at an incidence in the range of 0 to 10°, the other at an incidence in the range of 40 to 60° relative to the normal to the wafer.Type: GrantFiled: August 27, 2014Date of Patent: October 3, 2017Assignee: STMICROELECTRONICS (TOURS) SASInventors: Mohamed Boufnichel, Jean-Christophe Houdbert
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Patent number: 8906487Abstract: In a base material with a single-crystal silicon carbide film according to an embodiment of the invention, a plurality of recessed portions is formed on the surface of a silicon substrate, an insulating film including silicon oxide is formed across the surface of the silicon substrate including the inner surfaces of the recessed portions, the top surfaces of side wall portions of recessed portions of the insulating film form flat surfaces, a single-crystal silicon carbide film is joined on the flat surfaces, and the recessed portions below the single-crystal silicon carbide film form holes.Type: GrantFiled: June 30, 2011Date of Patent: December 9, 2014Assignee: Seiko Epson CorporationInventor: Hiroyuki Shimada
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Patent number: 7594967Abstract: A semiconductor structure including a cap layer formed over a semiconductor substrate having a rough edge, which discourages formation of dislocation pile-up defects.Type: GrantFiled: October 10, 2002Date of Patent: September 29, 2009Assignee: AmberWave Systems CorporationInventors: Christopher J. Vineis, Richard Westhoff, Mayank Bulsara
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Patent number: 6958093Abstract: A method of forming a free-standing (Al, Ga, In)N article, by the steps including: providing an expitaxially compatible sacrificial template; depositing single crystal (Al, Ga, In)N material on the template to form a composite sacrificial template/(Al, Ga, In)N article including an interface between the sacrificial template and the (Al, Ga, In)N material; and interfacially modifying the composite sacrificial template/(Al, Ga, In)N article to part the sacrificial template from the (Al, Ga, In)N material and yield the free-standing (Al, Ga, In)N article. The free-standing (Al, Ga, In)N article produced by such method is of superior morphological character, and suitable for use as a substrate, e.g., for fabrication of microelectronic and/or optoelectronic devices and device precursor structures.Type: GrantFiled: September 5, 2001Date of Patent: October 25, 2005Assignee: Cree, Inc.Inventors: Robert P. Vaudo, George R. Brandes, Michael A. Tischler, Michael K. Kelly
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Patent number: 6752868Abstract: A three dimensional photonic crystal and layer-by-layer processes of fabricating the photonic crystal. A templated substrate is exposed to a plurality of first microspheres made of a first material, the first material being of a type that will bond to the templated substrate and form a self-passivated layer of first microspheres to produce a first layer. The first layer is exposed to a plurality of second microspheres made of a second material, the second material being of a type that will bond to the first layer and form a self-passivated layer of second microspheres. This layering of alternating first and second microspheres can be repeated as desired to build a three dimensional photonic crystal of desired geometry.Type: GrantFiled: July 31, 2002Date of Patent: June 22, 2004Assignee: MCNC Research & Development InstituteInventors: John South Lewis, III, Scott Halden Goodwin-Johansson, Brian Rhys Stoner, Sonia Grego, David Edward Dausch
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Patent number: 6656271Abstract: A process for manufacturing a semiconductor wafer which has superior suitability for mass production and reproducibility. The process comprises the steps of preparing a first member which has a monocrystalline semiconductor layer on a semiconductor substrate with a separation layer arranged therebetween with a semiconductor wafer as the raw material, transferring the monocrystalline semiconductor layer onto a second member which comprises a semiconductor wafer after separating the monocrystalline semiconductor layer through the separation layer, and smoothing the surface of the semiconductor substrate after the transferring step so as to be used as a semiconductor wafer for purposes other than forming the first and second members.Type: GrantFiled: December 3, 1999Date of Patent: December 2, 2003Assignee: Canon Kabushiki KaishaInventors: Takao Yonehara, Kunio Watanabe, Tetsuya Shimada, Kazuaki Ohmi, Kiyofumi Sakaguchi
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Patent number: 6270573Abstract: A silicon carbide thin film is epitaxially grown by an MBE or the like method with silicon atoms 2 being maintained to be in excess of carbon atoms on a growth surface 1a of a silicon carbide crystal in a substrate 1. A silicon carbide substrate with a good crystallinity is thereby achieved at a low temperature with a good reproducibility. This crystal growth is possible at a low temperature of 1300° C. or lower, and the productions of a high-concentration doped film, a selectively grown film, and a grown film of a cubic silicon carbide on a hexagonal crystal are achieved. In crystallizing a cubic silicon carbide on a hexagonal crystal, the use of an off-cut surface inclined towards a <1{overscore (1)}00> direction is effective to prevent an occurrence of twin.Type: GrantFiled: April 26, 1999Date of Patent: August 7, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Makoto Kitabatake, Masao Uchida, Kunimasa Takahashi
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Patent number: 6165265Abstract: The present invention relates to a method of deposition of a silicon layer on a single-crystal silicon substrate 11 , so that the silicon layer is a single-crystal layer, but of different orientation than the substrate, including the steps of defining a window 13 on the substrate; creating inside the window interstitial defects 14 with an atomic proportion lower than one for one hundred; and performing a silicon deposition 15 in conditions generally corresponding to those of an epitaxial deposition, but at a temperature lower than 750.degree. C.Type: GrantFiled: January 26, 1999Date of Patent: December 26, 2000Assignee: STMicroelectronics S.A.Inventors: Yvon Gris, Germaine Troillard, Jocelyne Mourier
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Patent number: 6146457Abstract: A method for producing thick, high quality GaN substrates uses an epitaxially deposited film is used as a substrate material for further device or epitaxial processing. The film is deposited using an epitaxial technique on a thin substrate called the disposable substrate. The deposited film is thick enough so that upon cooling the thermal mismatched strain is relieved through cracking of the lower disposable substrate and not the newly deposited epitaxy. The epitaxial film now becomes a platform for either further epitaxial deposition or device processing.Type: GrantFiled: July 2, 1998Date of Patent: November 14, 2000Assignee: CBL Technologies, Inc.Inventor: Glenn S. Solomon
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Patent number: 6110278Abstract: A template for seeding growth of a desired single-crystal material (e.g., Si, GaAs) is created by passing through a monocrystalline channelizing mask, in a channelizing direction thereof, at least one of a nucleation-friendly species (e.g., Si, Ga) and a knock-off species (e.g., Ar, F) for respective implant of a nucleation-friendly species within or removal of a nucleation-unfriendly material (e.g., SiO.sub.2) of a supplied substrate. The desired single-crystal material is then grown in epitaxial-like manner from the thus-formed seeding-template. In one embodiment, silicon ions are projected through a monocrystalline silicon mask of a selected crystal orientation ((100), or (111)) in its channelizing direction so as to implant the silicon ions in a silicon dioxide layer of a supplied substrate according to the selected crystal orientation of the channelizing mask. Monocrystalline silicon is then epitaxially grown on top of the silicon dioxide layer with the same crystal orientation.Type: GrantFiled: August 10, 1998Date of Patent: August 29, 2000Inventor: Arjun N. Saxena
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Patent number: 6103019Abstract: A method for producing a pattern of regularly spaced-apart nucleation sites and corresponding devices are disclosed. The method enables formation of a device having an amorphous or otherwise non-single crystal surface from which single crystal layers of a desired orientation may be grown using the regularly spaced nucleation sites as a growth template. The method can be used to produce a single crystal semiconductor layer of a desired orientation (e.g., <100> or <111>) on an amorphous insulating layer (e.g. of SiO.sub.2 or Si.sub.3 N.sub.4). For example, single crystal Si of a <100> orientation may be grown on an SiO.sub.2 layer. Monocrystalline semiconductor films may be similarly grown on amorphous glass substrates or the like for producing solar cells of high efficiency and low cost.Type: GrantFiled: February 18, 1998Date of Patent: August 15, 2000Inventor: Arjun Saxena
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Patent number: 6096129Abstract: An initial single-crystalline diamond base material is prepared from a flat plate having a major surface and side surfaces consisting of low-index planes. Then, single crystalline diamond is homoepitaxially vapor-deposited on the single-crystalline diamond base material, and a resulting diamond material is cut and polished in a particular manner to provide a successive base material on which single-crystalline diamond is again grown, thereby forming a single-crystalline diamond having a large area. A holder for the single-crystalline diamond base material consists of or is coated with a material hardly forming a compound with carbon. Single crystalline diamond can be stably formed on the surfaces of the base material. Consequently, single-crystalline diamond of high quality having a large area can be stably produced in a shorter time using either plasma CVD or a thermal filament method.Type: GrantFiled: April 15, 1998Date of Patent: August 1, 2000Assignee: Sumitomo Electric Industries, Ltd.Inventors: Hirohisa Saito, Takashi Tsuno, Takahiro Imai, Yoshiaki Kumazawa
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Patent number: 6036773Abstract: A Group III atomic layer required for fabrication of a semiconductor quantum nanostructure is grown to be properly restricted to a monolayer.A substrate is configured to have a fast-growth surface portion where growth of a Ga atomic layer proceeds at a relatively high rate and a slow-growth surface portion where the growth of the Ga atomic layer proceeds at a relatively low rate. Ga atoms are supplied to the fast-growth surface portion in an amount not less than that which grows one layer of the Group III atoms. Excess Ga atoms on the fast-growth surface portion are allowed to migrate to the slow-growth surface portion by surface migration, thereby growing only one layer of the Ga atoms on the fast-growth surface portion.Type: GrantFiled: March 27, 1997Date of Patent: March 14, 2000Assignee: Agency of Industrial Science & Technology, Ministry of International Trade & IndustryInventors: Xue-Lun Wang, Mutsuo Ogura
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Patent number: 5948162Abstract: An epitaxially grown layer having a large area and an uniform thickness is formed on an insulating layer. The surface of a silicon substrate (2) is oxidized to form a silicon dioxide layer (4) acting as insulating layer. The silicon dioxide layer (4) is then provided with an opening (10) by etching with the aid of resist (6). After removing the resist (6), a silicon seed crystal layer (11) is selectively grown in the opening (10). Next, the silicon dioxide layer (4) is subjected to etchback using hydrofluoric acid, so that the side face (14) of the seed crystal layer (11) is emerged. The following epitaxial growth on the basis of the seed crystal layer (11) is allowed sufficient growth in the lateral direction. As a result, an epitaxially grown layer having (16) a large area and an uniform thickness is realized.Type: GrantFiled: October 16, 1996Date of Patent: September 7, 1999Assignee: Rohm Co., Ltd.Inventor: Tomofumi Nakamura
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Patent number: 5919305Abstract: A concept and process is disclosed by which an epitaxially deposited film is removed from its substrate at elevated temperatures to inhibit thermal mismatch strain induced defect generation in the epitaxial layer. The process occurs by gas phase reactions of an intermediate layer purposely deposited to react with a component in the gas stream during or after epitaxial growth. While the concept of an intermediate layer has been used extensively to improve the crystal quality of the epitaxial layer this is not the purpose of this interlayer. Although this interlayer may aid in nucleation of the epitaxial layer, the objective is to separate the epitaxial material on top of the interlayer from the substrate below the interlayer at or near the growth temperature to reduce the effects of the thermal mismatch between the substrate and epitaxial layers. An application is an addition to the above invention. A thick epitaxially deposited film can now be removed from its substrate at elevated temperatures.Type: GrantFiled: July 2, 1998Date of Patent: July 6, 1999Assignee: CBL Technologies, Inc.Inventor: Glenn S. Solomon
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Patent number: 5865888Abstract: A semiconductor device epitaxial layer lateral growth rate control method using CBr.sub.4 gas involves regulating an epitaxial layer lateral growth rate in accordance with the CBr.sub.4 amount doped into the epitaxial layer during the epitaxial layer growth occurring on a patterned GaAs substrate by means of a metalorganic chemical vapor deposition (MOCVD) process. The lateral growth rate may be regulated by varying the growth temperature and the V/III doping ratio.Type: GrantFiled: July 22, 1996Date of Patent: February 2, 1999Assignee: Korea Institute of Science and TechnologyInventors: Suk-Ki Min, Moo sung Kim, Seong-Il Kim
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Patent number: 5861058Abstract: A composite structure for electronic components, having a base substrate with a flat side provided with a depression, and having a cover layer which is disposed on the flat side structured by the depression, and the depression being covered to form a hollow structure. The depression in the base substrate is created prior to the deposition of the cover layer and has a clear width measured parallel to the flat side that is less than one-half of its clear depth measured before the cover layer is applied. The vapor phase deposited cover layer is formed from a material which has a sufficiently high surface tension to promote three-dimensional growth of the vapor phase deposited layer.Type: GrantFiled: April 22, 1996Date of Patent: January 19, 1999Assignee: Daimler-Benz AktiengesellschaftInventors: Hans-Juergen Fuesser, Reinhard Zachai, Wolfram Muench, Tim Gutheit, Mona Ferguson, Reiner Schaub, Karl-Heinrich Greeb
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Patent number: 5817174Abstract: A method of treating a semiconductor substrate, which comprises the steps of subjecting a surface of the semiconductor substrate to an annealing treatment, performing an etching treatment of the surface of the semiconductor substrate under a condition where the semiconductor substrate is substantially prevented from being etched and a precipitate exposed from the surface of the semiconductor substrate is selectively etched away, and forming a monocrystalline film of a semiconductor material constituting the semiconductor substrate on the surface of the semiconductor substrate.Type: GrantFiled: December 13, 1996Date of Patent: October 6, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Tomita, Mami Takahashi
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Patent number: 5746826Abstract: Utilizing rugged pattern of atomic size present on a crystalline substrate of a semiconductor such as silicon or selenium or the like, a microstructure body is produced on the substrate by forming a layer of a first element of one monolayer or less by arranging at the position of the substrate most stable in energy formed by ruggedness the atoms of the first element such as gold, silver, copper, nickel, palladium, platinum or an element of group IV and then depositing successively atoms of at least one second element of group III, group IV and group V on only at a part of the surface of the substrate on which said layer of one monolayer or less by vapor deposition, sputtering or the like.Type: GrantFiled: December 2, 1994Date of Patent: May 5, 1998Assignee: Hitachi, Ltd.Inventors: Tsuyoshi Hasegawa, Shigeyuki Hosoki, Makiko Kohno, Masakazu Ichikawa, Hitoshi Nakahara, Toshiyuki Usagawa
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Patent number: 5741360Abstract: In a method of selectively growing a crystal of a compound semiconductor layer which is composed of gallium and arsenic, a selective growth is selectively carried out on a substrate by using a combination of metallic gallium and a reactive gas, such as trisdimethylminoarsine, which includes a metallic compound of arsenic specified by at least one amine. The combination may includes organometallic gallium, such as trimethylgallium, triethylgallium instead of the metallic gallium. Such a combination serves to selectively deposit the compound semiconductor layer only on an exposed portion uncovered with a mask. Any other compound semiconductor layer may be selectively deposited on the exposed portion. The exposed portion may be composed of GaAs, AlGaAs, or InGaAs.Type: GrantFiled: August 11, 1995Date of Patent: April 21, 1998Assignee: Optoelectronics Technology Research CorporationInventors: Shigeo Goto, Yasuhiko Nomura, Yoshitaka Morishita, Seikoh Yoshida, Masahiro Sasaki
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Patent number: 5738720Abstract: The present invention aims to provide a method of manufacturing a microstructure pattern of a high orientation aggregate of organic molecular material by forming a fine pattern made by single crystal growing ionic material of another property on an ionic substrate by lithography and epitaxial growth, and forming a pattern made by organic molecular material having functionability to light on the fine pattern by utilizing dependence of substrate material of crystal growth rate in epitaxial growth, and is applied to the formation of a microstructure pattern of organic molecular material which can be utilized for optical waveguide, optical integrated circuit, non-linear optical element and laser resonator.Type: GrantFiled: February 12, 1996Date of Patent: April 14, 1998Assignee: The University of TokyoInventors: Toshihiro Shimada, Atsushi Koma
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Patent number: 5718761Abstract: A method of forming a crystalline compound semiconductor film comprises introducing into a crystal forming space housing a substrate on which a non-nucleation surface (S.sub.NDS) having a smaller nucleation density and a nucleation surface (S.sub.NDL) having a fine surface area sufficient for crystal growth only from a single nucleus and having a larger nucleation density (ND.sub.L) than the nucleation density (NDs) of the non-nucleation surface (S.sub.NDS) are arranged adjacent to each other an organometallic compound (VI) for supplying an element belonging to the group VI of Periodic Table represented by the general formula R.sub.1 --X.sub.n --R.sub.2 wherein n is an integer of 2 or more; R.sub.1 and R.sub.Type: GrantFiled: April 17, 1996Date of Patent: February 17, 1998Assignee: Canon Kabushiki KaishaInventors: Hiroyuki Tokunaga, Jun-ichi Hanna, Isamu Shimizu
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Patent number: 5676752Abstract: A method of producing sheets of crystalline material is disclosed, as well as devices employing such sheets. In the method, a growth mask is formed upon a substrate and crystalline material is grown at areas of the substrate exposed through the mask and laterally over the surface of the mask to form a sheet of crystalline material. This sheet is optionally separated so that the substrate can be reused. The method has particular importance in forming sheets of crystalline semiconductor material for use in solid state devices.Type: GrantFiled: August 16, 1994Date of Patent: October 14, 1997Assignee: Massachusetts Institute of TechnologyInventors: Carl O. Bozler, John C. C. Fan, Robert W. McClelland
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Patent number: 5656539Abstract: A method of fabricating a semiconductor laser includes forming a mask having a stripe opening in a <011> direction on a {100} surface of a first conductivity type substrate, and growing a double-heterojunction structure including a first conductivity type cladding layer, an active layer, and a second conductivity type cladding layer on the {100} surface using the mask, thereby producing a stripe-shaped ridge in which the active layer and the first conductivity type lower cladding layer are covered with the second conductivity type upper cladding layer. The stripe-shaped ridge has an ordinary mesa-shaped cross-section in a direction perpendicular to the stripe direction and a symmetrical hexagonal cross-section in the stripe direction. In this method, since the conventional selective etching for forming the ridge is dispensed with, the processing precision of the ridge is improved.Type: GrantFiled: March 7, 1995Date of Patent: August 12, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takashi Motoda, Manabu Kato
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Patent number: 5632812Abstract: A diamond electronic device constituted of a diamond crystal formed on a substrate comprises a diamond crystal having the ratio (h/L) of length (h) of the diamond crystal in direction substantially perpendicular to the face of the substrate to length (L) of the diamond crystal in direction parallel to the face of the substrate ranging from 1/4 to 1/1000 and an upper face of the diamond crystal making an angle of from substantially 0.degree. to 10.degree. to the face of the substrate, and a semiconductor layer and an electrode layer provided on the diamond crystal, wherein the diamond crystal serves as a heat-radiating layer.Type: GrantFiled: June 6, 1995Date of Patent: May 27, 1997Assignee: Canon Kabushiki KaishaInventor: Keiji Hirabayashi
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Patent number: 5591666Abstract: A method of fabricating semiconductor devices including defining an area on the surface of a substrate, selectively growing, on the area, a crystalline material with at least one defined crystallographic facet, and selectively growing a semiconductor device on the crystallographic facet. In a second embodiment, an area is defined on the surface of a substrate and chemical beam epitaxy is used to selectively grow, on the area, a layer of indium arsenide with at least one defined crystallographic facet.Type: GrantFiled: August 7, 1995Date of Patent: January 7, 1997Assignee: MotorolaInventors: Kumar Shiralagi, Raymond K. Tsui, Herbert Goronkin
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Patent number: 5588994Abstract: A method of producing sheets of crystalline material is disclosed, as well as devices employing such sheets. In the method, a growth mask is formed upon a substrate and crystalline material is grown at areas of the substrate exposed through the mask and laterally over the surface of the mask to form a sheet of crystalline material. This sheet is optionally separated so that the substrate can be reused. The method has particular importance in forming sheets of crystalline semiconductor material for use in solid state devices.Type: GrantFiled: June 6, 1995Date of Patent: December 31, 1996Assignee: Massachusetts Institute of TechnologyInventors: Carl O. Bozler, John C. C. Fan, Robert W. McClelland
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Patent number: 5582641Abstract: A crystal article comprises a substrate and single crystals provided on said substrate, with the shape of the contacted surface of said single crystals with said substrate being n-gonal (provided that n.gtoreq.5) or circular.Type: GrantFiled: May 22, 1995Date of Patent: December 10, 1996Assignee: Canon Kabushiki KaishaInventor: Nobuhiko Sato
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Patent number: 5531182Abstract: Polycrystalline silicon thin-films having a large grain size are formed by preparing a substrate of amorphous surface comprising first regions containing tin atoms at a higher content and second regions containing tin atoms at a lower content or not substantially containing them, and then heat-treating the substrate to grow crystal grains from crystal nuclei formed only in the first regions.Type: GrantFiled: May 12, 1994Date of Patent: July 2, 1996Assignee: Canon Kabushiki KaishaInventor: Takao Yonehara
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Patent number: 5518953Abstract: A semiconductor device is manufactured by forming an epitaxial layer (22) insulated from a silicon substrate (2), and forming a device in the epitaxial layer (22). On the semiconductor substrate (2), a silicon dioxide layer (4) is formed (FIG. 2A). Then the silicon dioxide layer (4) is provided with openings (14) (FIG. 2D). Silicon carbide is grown until it protrudes from the openings (14) to thereby form a silicon carbide seed crystal layer (16) (FIG. 2E). Next, oxidation is carried out, allowing a field oxide layer (20) to be connected at the portion under the openings (14) and the silicon carbide seed crystal layer (16) to be insulated from the silicon substrate (2). Thereafter, epitaxial growth is effected from the silicon carbide seed crystal layer (16). The growth is stopped before silicon grown layers (22) connect to one another, thus obtaining epitaxially grown layers (22) having regions which are separate from one another. The MOS device is formed in this epitaxially grown layer (22).Type: GrantFiled: March 15, 1994Date of Patent: May 21, 1996Assignee: Rohm Co., Ltd.Inventor: Hidemi Takasu
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Patent number: 5482002Abstract: A microprobe is provided which comprises a single crystal provided on a part of one main surface of a substrate or a part of a thin film formed on one main surface of the substrate. The microprobe may have a single crystal having an apex portion surrounded by facets having a specific plane direction and comprising a specific crystal face. The method for preparing the microprobe and an electronic device employing the microprobe also provided which is useful for recording and reproducing.Type: GrantFiled: July 8, 1993Date of Patent: January 9, 1996Assignee: Canon Kabushiki KaishaInventors: Hisaaki Kawade, Haruki Kawada, Kunihiro Sakai, Hiroshi Matsuda, Yuko Morikawa, Yoshihiro Yanagisawa, Tetsuya Kaneko, Toshimitsu Kawase, Hideya Kumomi, Hiroyasu Nose, Eigo Kawakami
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Patent number: 5447117Abstract: A crystal article comprises a substrate having an insulating amorphous surface and monocrystal formed on the substrate. The monocrystal is formed by providing a primary seed in the form of a film with an area 100 .mu.m.sup.2 or less arranged in a desired pattern on the surface of the substrate acting as a non-nucleation surface with a small nucleation density, then subjecting the primary seed to thermal treatment to convert it to a monocrystalline seed, and subsequently subjecting the monocrystalline seed to crystal growth treatment to allow a monocrystal to grow beyond the monocrystalline seed and cover the non-nucleation surface.Type: GrantFiled: October 24, 1994Date of Patent: September 5, 1995Assignee: Canon Kabushiki KaishaInventors: Takao Yonehara, Kenji Yamagata, Yuji Nishigaki
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Patent number: 5445108Abstract: A melt is crystallized by introducing the melt into a gap formed between two belts. The gap-forming flights of the belts travel in opposite directions. An upper one of the flights is cooled so that an upper surface of the melt crystallizes thereon and is removed from the gap on the upper belt. The lower belt removes the residual melt from the gap and that residual melt is recycled to the gap.Type: GrantFiled: September 10, 1993Date of Patent: August 29, 1995Assignee: Santrade Ltd.Inventors: Konrad Schermutzki, Herbert Wurmseher
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Patent number: 5427055Abstract: A method for controlling roughness on a surface of a monocrystal comprises supplying atomes for deposition on the surface of the monocrystal having the roughness under irradiation with ions having controlled energy to carry out epitaxial growth, thereby reducing the roughness.Type: GrantFiled: January 27, 1993Date of Patent: June 27, 1995Assignee: Canon Kabushiki KaishaInventor: Takeshi Ichikawa
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Patent number: 5373803Abstract: A method of epitaxially growing semiconductor crystal by which a single crystal region which is superior in quality can be selectively formed at a high throughput without employing the lithography technique. A shield mask is formed on an upper face of an amorphous semiconductor layer formed on substrate, and excimer laser light is irradiated upon the amorphous semiconductor layer using the shield mask to produce, in the amorphous semiconductor layer, a core from which crystal is to be grown. After the shield mask is removed, low temperature solid phase annealing processing for the amorphous semiconductor layer is performed to grow crystal from the core to form a single crystal region in the amorphous semiconductor layer. Alternatively, the silicon core is formed by irradiating an energy beam, which is capable of being converged into a thin beam and being used to directly draw a picture, at a predetermined position of the amorphous silicon film.Type: GrantFiled: September 30, 1992Date of Patent: December 20, 1994Assignee: Sony CorporationInventors: Takashi Noguchi, Toshiharu Suzuki
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Patent number: 5363799Abstract: A method for growth of a crystal wherein a monocrystalline seed is arranged on a substrate and a monocrystal is permitted to grow with the seed as the originating point, comprises the step of:(1) providing a substrate having a surface of smaller nucleation density;(2) arranging on the surface of the substrate primary seeds having sufficiently fine surface area to be agglomerated;(3) applying heat treatment to the primary seeds to cause agglomeration to occur, thereby forming a monocrystalline seed with a controlled face orientation; and(4) applying crystal growth treatment to permit a monocrystal to grow with the monocrystalline seed as the originating point.Type: GrantFiled: November 19, 1992Date of Patent: November 15, 1994Assignee: Canon Kabushiki KaishaInventors: Takao Yonehara, Yuji Nishigaki, Kenji Yamagata
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Patent number: 5363800Abstract: This invention is a method for the controlled growth of single-crystal semiconductor-device-quality films of SiC polytypes on vicinal (0001) SiC wafers with low tilt angles. Both homoepitaxial and heteroepitaxial SiC films can be produced on the same wafer. In particular, 3C-SiC and 6H-SiC films can be produced within selected areas of the same 6H-SiC wafer.Type: GrantFiled: November 9, 1992Date of Patent: November 15, 1994Assignee: The United States of America as represented by the United States National Aeronautics and Space AdministrationInventors: David J. Larkin, Powell, J. Anthony
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Patent number: 5364815Abstract: A crystal article comprises;a substrate having i) a nonnucleation surface (S.sub.NDS) having a small nucleation density, ii) at least one single-nucleation surface (S.sub.NDL -S) provided adjacent to said nonnucleation surface (S.sub.NDS), having an area small enough for a crystal to grow from only a single nucleus and having a larger nucleation density (ND.sub.L) than the nucleation density (ND.sub.S) of said nonnucleation surface (S.sub.NDS), and iii) at least one multiple-nucleation surface (S.sub.NDL -M) having an area large enough for crystals to grow from plural nuclei and having a larger nucleation density (ND.sub.L) than the nucleation density (ND.sub.S) of said nonnucleation surface (S.sub.NDS);at least one monocrystal grown from said single nucleus and extending over said single-nucleation surface (S.sub.NDL -S) to cover part of said nonnucleation surface (S.sub.NDS); anda polycrystalline film grown from said plural nuclei to cover said multiple-nucleation surface.Type: GrantFiled: February 17, 1993Date of Patent: November 15, 1994Assignee: Canon Kabushiki KaishaInventor: Yoshiyuki Osada