Single-crystals Having A Hollow (e.g., Tube, Concavo-convex) {c30b 29/66} Patents (Class 117/920)
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Patent number: 8636843Abstract: Heterogeneous nanowires having a core-shell structure consisting of single-crystal apatite as the core and graphitic layers as the shell and a synthesis method thereof are provided. More specifically, provided is a method capable of producing large amounts of heterogeneous nanowires, composed of graphitic shells and apatite cores, in a reproducible manner, by preparing a substrate including an element corresponding to X of X6(YO4)3Z which is a chemical formula for apatite, adding to the substrate a gaseous source containing an element corresponding to Y of the chemical formula, adding thereto a gaseous carbon source, and allowing these reactants to react under optimized synthesis conditions using chemical vapor deposition (CVD), and to a method capable of freely controlling the structure and size of the heterogeneous nanowires and also to heterogeneous nanowires synthesized thereby.Type: GrantFiled: April 6, 2012Date of Patent: January 28, 2014Assignee: Korea Institute of Energy ResearchInventors: Nam Jo Jeong, Jung Hoon Lee
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Patent number: 8632633Abstract: Engineered defects are reproduced in-situ with graphene via a combination of surface manipulation and epitaxial reproduction. A substrate surface that is lattice-matched to graphene is manipulated to create one or more non-planar features in the hexagonal crystal lattice. These non-planar features strain and asymmetrically distort the hexagonal crystal lattice of epitaxially deposited graphene to reproduce “in-situ” engineered defects with the graphene. These defects may be defects in the classic sense such as Stone-Wales defect pairs or blisters, ridges, ribbons and metacrystals. Nano or micron-scale structures such as planar waveguides, resonant cavities or electronic devices may be constructed from linear or closed arrays of these defects. Substrate manipulation and epitaxial reproduction allows for precise control of the number, density, arrangement and type of defects. The graphene may be removed and template reused to replicate the graphene and engineered defects.Type: GrantFiled: August 25, 2010Date of Patent: January 21, 2014Assignee: Raytheon CompanyInventors: Delmar L. Barker, Brian J. Zelinski, William R. Owens
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Patent number: 8003192Abstract: A nanodevice including a nanorod and a method for manufacturing the same is provided. The nanodevice according to an embodiment of the present invention includes i) a substrate; ii) at least one crystal that is located on the substrate and includes a plurality of side surfaces forming an angle with each other; and iii) at least one nanorod that is located on the crystal and extends along a direction that is substantially perpendicular to a surface of the substrate.Type: GrantFiled: April 18, 2008Date of Patent: August 23, 2011Assignee: LG Display Co., Ltd.Inventors: Young-Joon Hong, Gyu-Chul Yi
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Patent number: 7763113Abstract: The present invention provides a photocatalyst material, which can comprise a photocatalyst with an excellent adherence to a substrate and a high photocatalytic activity, and a production method thereof. The photocatalyst material (20) obtained by reacting crystal nuclei with a sol solution containing an organic metallic compound or the like and then carrying out gelation, solidification and heat treatment has a structure where more than one basic structures (10) are fixed to the surface of the substrate (1). The basic structure consists of abase portion (2) comprising crystal nuclei fixed to the surface of the substrate (1) and a photocatalyst crystalline body (3), which connects to and is extended from the base portion (2) and has a columnar structure having a hollow portion (5) formed therein. A cylindrical substrate may be used for the substrate (1). The above photocatalytic activity is further enhanced by the formation of an interior-exposing structure (8) in a shell portion (4).Type: GrantFiled: June 14, 2002Date of Patent: July 27, 2010Assignee: Andre Andes Electric Co., Ltd.Inventors: Azuma Ruike, Takeshi Kudo, Yuko Nakamura, Kazuhito Kudo, Fumie Kawanami, Akira Ikegami
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Patent number: 7393410Abstract: There is provided a method of manufacturing a nano-wire using a crystal structure. In the method of manufacturing a nano-wire, a crystal grain having a plurality of crystal faces is used as a seed, and a crystal growing material having a lattice constant difference within a predetermined range is deposited on the crystal grain, thereby allowing the nano-wire to grow from at least one of the crystal faces. Therefore, it is possible to give the positional selectivity with a simple process using a principle of crystal growth and to generate a nano-structure such as a nano-wire, etc. having good crystallinity. Further, it is possible to generate a different-kind junction structure having various shapes by adjusting a feature of a crystal used as a seed.Type: GrantFiled: April 26, 2005Date of Patent: July 1, 2008Assignee: Samsung SDI Co., Ltd.Inventors: Sang-Hyun Lee, Tae-Won Jeong, Jeong-Na Huh
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Patent number: 7211143Abstract: Methods of fabricating uniform nanotubes are described in which nanotubes were synthesized as sheaths over nanowire templates, such as using a chemical vapor deposition process. For example, single-crystalline zinc oxide (ZnO) nanowires are utilized as templates over which gallium nitride (GaN) is epitaxially grown. The ZnO templates are then removed, such as by thermal reduction and evaporation. The completed single-crystalline GaN nanotubes preferably have inner diameters ranging from 30 nm to 200 nm, and wall thicknesses between 5 and 50 nm. Transmission electron microscopy studies show that the resultant nanotubes are single-crystalline with a wurtzite structure, and are oriented along the <001> direction. The present invention exemplifies single-crystalline nanotubes of materials with a non-layered crystal structure. Similar “epitaxial-casting” approaches could be used to produce arrays and single-crystalline nanotubes of other solid materials and semiconductors.Type: GrantFiled: December 8, 2003Date of Patent: May 1, 2007Assignee: The Regents of the University of CaliforniaInventors: Peidong Yang, Rongrui He, Joshua Goldberger, Rong Fan, Yi-Ying Wu, Deyu Li, Arun Majumdar
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Patent number: 6607593Abstract: When a crystalline nucleus generated from an under-cooled silicon droplet is grown up to a mono-crystalline silicon ball, a critical under-cooling &Dgr;Tcr is determined in response to a diameter d of the silicon droplet so as to satisfy the relationships of (d=5 mm, &Dgr;Tcr=100K), (d=3 mm, &Dgr;Tcr=120K) and (d=1 mm, &Dgr;Tcr=150K). A crystal grown up from the crystalline nucleus at an under-cooling &Dgr;T less than the critical under-cooling &Dgr;Tcr is a mono-crystalline silicon ball with high quality free from cracks or twins.Type: GrantFiled: July 27, 2001Date of Patent: August 19, 2003Assignee: Agency of Industrial Science and TechnologyInventors: Kazuhiko Kuribayashi, Tomotsugu Aoyama
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Patent number: 6106614Abstract: An apparatus and a method for producing single crystal semiconductor particulate in near spherical shape and the particulate product so formed is accomplished by producing uniform, monosized, near spherical droplets; identifying the position of an undercooled droplet in a nucleation zone; and seeding the identified droplet in the nucleation zone to initiate single crystal growth in the droplet.Type: GrantFiled: October 15, 1998Date of Patent: August 22, 2000Assignee: Starmet CorpInventors: Matthew D. Stephens, Steven A. Miller, Jessica Belcher
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Patent number: 5962915Abstract: Improved commercial single crystal wafers (250), as shipped to end users form a full circle, and comprise a "stress concentration notch" (172) which accurately defines a desired cleavage plane. The stress concentration notch is introduced into the wafers in bulk by means of a properly oriented cut along the length of a single crystal ingot, after machining the ingot to the desired end product diameter, and prior to sawing the ingot into slices. The stress concentration notch uniquely defines the first and second faces of the wafer.Type: GrantFiled: October 14, 1997Date of Patent: October 5, 1999Assignee: Anerkan Xtal Technology, IncInventors: Gary Shen-Cheng Young, Shan-Xiang Zhang
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Patent number: 5746826Abstract: Utilizing rugged pattern of atomic size present on a crystalline substrate of a semiconductor such as silicon or selenium or the like, a microstructure body is produced on the substrate by forming a layer of a first element of one monolayer or less by arranging at the position of the substrate most stable in energy formed by ruggedness the atoms of the first element such as gold, silver, copper, nickel, palladium, platinum or an element of group IV and then depositing successively atoms of at least one second element of group III, group IV and group V on only at a part of the surface of the substrate on which said layer of one monolayer or less by vapor deposition, sputtering or the like.Type: GrantFiled: December 2, 1994Date of Patent: May 5, 1998Assignee: Hitachi, Ltd.Inventors: Tsuyoshi Hasegawa, Shigeyuki Hosoki, Makiko Kohno, Masakazu Ichikawa, Hitoshi Nakahara, Toshiyuki Usagawa
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Patent number: 5575847Abstract: This invention relates to the apparatus and the process for producing single crystals with little OSF generation and excellent dielectric strength of gate oxide films by adjusting the temperature gradient of the silicon single crystal in the direction of pulling. The apparatus is provided with a crucible which contains the melt of the single crystal material, a heating element which heats the melt, a pulling shaft to grow the single crystal, a protective gas inlet pipe, and a chamber which contains all above mentioned components. In addition, the apparatus is provided with a circular cylinder or a cylindrical shaped heat resistant and heat insulating component below the protective gas inlet pipe noted above.Type: GrantFiled: November 8, 1994Date of Patent: November 19, 1996Assignee: Sumitomo Sitix CorporationInventors: Kaoru Kuramochi, Setsuo Okamoto
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Patent number: 5540182Abstract: A solid step process for convening a polycrystalline body to a single crystal body includes the steps of forming a selected surface topography on the body and then heating the body at a temperature below its melting temperature for a time sufficient to substantially convert the polycrystalline material to single crystal material. The surface topography includes depressions or protrusions from the body having sidewalls of the polycrystalline material that are disposed to intersect one another at junctions forming relatively sharp corners, and the dimensions of the sidewalls are greater than the average grain size of the polycrystalline material. Typically alumina is the polycrystalline material and surface features include grooves or the like. The patterned alumina body with the selected surface topography is heated to a temperature between 1800.degree. and 2000.degree. C. in one or more cycles to convert the polycrystalline alumina to sapphire.Type: GrantFiled: September 24, 1993Date of Patent: July 30, 1996Assignee: General Electric CompanyInventors: Lionel M. Levinson, Curtis E. Scott
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Patent number: 5523121Abstract: Chemical vapor deposition method for producing a fine grained smooth growth surfaced diamond film on a substrate employs a hydrogen/hydrocarbon gaseous atmosphere containing an amount of nitrogen effective to inhibit the growth of the diamond grains deposited on the substrate.Type: GrantFiled: March 31, 1994Date of Patent: June 4, 1996Assignee: General Electric CompanyInventors: Thomas R. Anthony, James F. Fleischer
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Patent number: 5478513Abstract: A method for producing CVD diamond film on a substrate comprised of a hydride-forming metal. The substrate provides for easy release of the CVD diamond coating formed thereon upon exposure to a hydrogen pressure. Self-supporting CVD diamond films of large dimension are easily obtained without dissolving the substrate. The substrate can be used in conventional CVD reactors.Type: GrantFiled: March 29, 1995Date of Patent: December 26, 1995Assignee: General Electric CompanyInventors: Philip G. Kosky, Thomas R. Anthony
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Patent number: 5477808Abstract: A process and an apparatus reduces the oxygen incorporation into a single crystal of silicon which is drawn by the Czochralski method. If a molding is immersed at least temporarily in the melt between the single crystal and the crucible wall during drawing of the single crystal, the oxygen content of the single crystal is reduced compared with the oxygen content of a single crystal which has been drawn without the use of the molding.Type: GrantFiled: February 28, 1994Date of Patent: December 26, 1995Assignee: Wacker-Chemitronic Gesellschaft fuer Elektronik-grundstoffe mbHInventors: Hans Oelkrug, Franz Segieth