Abstract: A method of manufacturing a light emitting diode, which includes the steps of bringing a semiconductor substrate of p-type or n-type into contact with a growth solution at a high temperature and thereafter, lowering the temperature so as to form a monocrystalline epitaxial layer of the same type as the semiconductor substrate on the semiconductor substrate, subsequently, further lowering the above temperature to form a first monocrystalline epitaxial layer of a reverse type to the epitaxial layer on the epitaxial layer and then, cutting off the growth solution to form an epitaxial wafer as a result, a growth solution to contact the first epitaxial layer of a epitaxial wafer at a high temperature, and thereafter, the temperature is lowered to form a second monocrystalline epitaxial layer of the same kind and type as the first epitaxial layer on the first epitaxial layer.

Abstract: An inventive process for producing a semiconductor device has the steps of: putting a compound semiconductor substrate, an element of the substrate elements having a higher vapor pressure in a quartz ampoule, evacuating the ampoule, introducing oxygen gas into the ampoule and then sealing the ampoule; heating the ampoule to produce an oxide layer on the surface of the compound semiconductor substrate; and forming an electrode metal layer on the oxide layer to produce a MOS diode with a low interface trap density or a Schottky diode with a high barrier height and small ideal factor. Thus, the process produces a Schottky diode of a good forward current/voltage characteristic, low reverse current and superior rectification performance and a MESFET of a low dispersion at threshold voltage.

Abstract: According to this invention, a first cladding layer of a first conductivity type, an active layer, a second cladding layer of a second conductivity type, and a cap layer much more susceptible to side etching than the second cladding layer susceptible to side etching than the second cladding layer are sequentially grown on a (100) crystal plane of a semiconductor substrate of the first conductivity type, and a stripe-like mask extending in a <011> direction is formed on the grown substrate with respect to each layer of the stacked substrate. This etching is performed in a crystal orientation for forming a reverse triangular mesa. However, since the cap layer is made of a material susceptible to side etching, a rounded mesa is formed. Thereafter, when a burying layer is formed on the etched portion by a vapor phase epitaxy method, the burying layer can be made to have a flat surface depending on crystal orientations.

Abstract: Disclosed are a distributed Bragg reflector type semiconductor laser and a method of manufacturing such a laser a high yields, in which the upper surface of an active waveguide is covered by an external waveguide, the external waveguide at side portions thereof, the external waveguide is coupled with the edge surfaces of the active waveguide without any gap remaining, and the coupling ratio of the active waveguide and external waveguide is high.

Abstract: A quaternary semiconductor diffraction grating, such as an InGaAsP grating suitable for a DFB laser, is embedded in a semiconductor substrate, such as InP. In one embodiment, the grating is fabricated by(1) forming on the top surface of an InP substrate body an epitaxial layer of InGaAsP coated with an epitaxial layer of InP;(2) forming a pattern of apertures penetrating through the layers of InP and InGaAsP; and(3) heating the body to a temperature sufficient to cause a mass transport of InP from the InP epitaxial layer, the thickness of the InP layer being sufficient to bury the entire surface of the InGaAsP layer with InP.

Abstract: In a monolithic OEIC in which an FET and a light-emitting device are integrated, the light-emitting device has a first clad layer, an active layer, and a second clad layer stacked on a substrate, the FET has a channel layer and source and drain layers with a high impurity concentration stacked on the substrate, etching mask layers on the source and drain layers, and a gate electrode formed on a channel layer between source and drain electrodes and the source and drain layers, the first clad layer of the light-emitting diode and the source and drain layers with a high impurity concentration of the FET are formed of the same semiconductor layer, and an active layer of the light-emitting device and the etching mask layers of the FET are formed of the same semiconductor layer.

Abstract: High resistivity In-based compound Group III-V epitaxial layers are used to prevent substantial current flow through a region of a semiconductor device, such as a CSBH, DCPBH, EMBH or CMBH laser, a LED, a photodiode, a HBT, or a FET. Also disclosed is a hydride VPE process for making the high resistivity material doped with Fe. The Fe is supplied by a volatile halogenated Fe compound, and the extend of pyrolysis of the hydride is limited to allow transport of sufficient dopant to the growth area.

Abstract: Present invention is to provide a process for producing an opto-electronic integrated circuit comprising a field effect transistor as an electronic device and a photo-diode as an optical device both formed on an InP substrate,the field effect transistor comprising a high electron mobility transistor having:a GaInAs layer epitaxially grown in the InP substrate in a preset region thereof, a n-AlInAs layer epitaxially grown on the GaInAs layer, a gate electrode formed on the AlInAs layer, and a source electrode and a drain electrode formed on the AlInAs layer with the gate electrode therebetween, andthe photo-diode comprising a PIN photo-diode having:the GaInAs layer epitaxially grown on the InP substrate near the region of the field effect transistor simultaneously with the growth of that of the field effect transistor, the n-AlInAs layer epitaxially grown on the GaInAs layer simultaneously with the growth of that of the field effect transistor, a n-InP layer epitaxially grown on the n-AlInAs layer, an undoped

Abstract: It has been found that layers which include arsenic and/or zinc can have an adverse effect upon optoelectronic semiconductor devices such as lasers. This is reduced by treatments in which arsenic and zinc are excluded. Preferably the substrate is cooled from reaction temperature in the presence of a mixture of hydrogen and PH.sub.3 (replacing AsH.sub.3 and/or Zn(CH.sub.3).sub.2 used to grow the final layer). Alternatively, devices have a contact layer of heavily p-type gallium indium arsenide are improved by the deposition of a protective layer of indium phosphide. This layer is removed immediately before metalization. Even though the protective layer is not present in the final product it has a beneficial effect.

Abstract: A method of manufacturing an epitaxial InP layer on a substrate surface by means of a MOVPE process at atmospheric pressure, cyclopentadienyl indium (I) or alkyl cyclopentadienyl indium (I) being used as the indium precursor, thereby precluding side reactions.

Abstract: This invention relates to ultra-thin semiconductor films which can be in the submicron range formed from semiconductor materials such as silicon, germanium and gallium arsenide. The films are formed by creating a thin slightly damaged surface on the polished reverse side of a film (e.g., a wafer) of the semiconductor by low dose ion implantation and then etching the semiconductor material on the front side of the film to remove the semiconductor material down to the ion implanted damaged layer. While the implanted ions can be chosen from functionally desirable ions which upon annealing remain in the film to alter the original electrical characteristics, the implanted ions can also be chosen so that upon annealing, the resultant ultra-thin semiconductor film has the same electrical characteristics as the original semiconductor material.The ion implantation changes the etching characteristics of the ion implanted layer.

Abstract: This invention relates to ultra-thin semiconductor films which can be in the submicron range formed from semiconductor materials such as silicon, germanium and gallium aresenide. The films are formed by creating a thin slightly damaged surface on the polished reverse side of a film (e.g., a wafer) of the semiconductor by low dose ion implantation and then etching the semiconductor material on the front side of the film to remove the semiconductor material down to the ion implanted damaged layer. While the implanted ions can be chosen from functionally desirable ions which upon annealing remain in the film to alter the original electrical characteristics, the implanted ions can also be chosen so that upon annealing, the resultant ultra-thin semiconductor film has the same electrical characteristics as the original semiconductor material.The ion implantation changes the etching characteristics of the ion implanted layer.

Abstract: A material for a light emitting element most suited for a light emitting diode or laser diode which emits visible light of 550 to 650 nm band wavelength. The material provides an at least two-layered structure composed of a GaAs substrate and a Sn doped InGaP layer developed on the substrate without forming a gradient layer therebetween. The mixed crystal composition of the Sn doped InGaP layer as expressed by the molar fraction of GaP is 0.50 to 0.75.According to the method for developing mixed crystals of InGaP, GaP and InP are dissolved in Sn to make a solution. The solution is allowed to come in contact with a GaAs substrate so that InGaP crystals are developed directly on the GaAs substrate without a gradient layer for coordinating the lattice constant formed on the GaAs substrate.

Abstract: A semiconductor apparatus is disclosed, in which the entire or part of an electron active region is formed by a superlattice structure semiconductor layer in which a plurality of different semiconductor layers, less than 8 monolayers, and containing a fraction or a binary compound semiconductor layers are alternately and epitaxially grown and a main current direction is selected to be in the direction perpendicular to the laminae of said superlattice layers.

Abstract: A method of passivating the surface of an indium gallium arsenide substrate by cleaning the indium gallium arsenide substrate in an etching solution and depositing a sodium hydroxide film on the substrate. The step of depositing the sodium hydroxide film is preferably performed by spin-on of a sodium hydroxide solution, followed by drying or annealing. The resulting passivated surface exhibits superior surface recombination velocity characteristics compared to prior art passivation techniques, thereby making possible superior solid state device operating characteristics.

Abstract: Chemical vapor deposition of III-V and II-VI binary, ternary and quaternary compounds is facilitated by maintaining a relatively high flow rate of reactants and modulating the rate of flow by alternately directing the flow at the high rate into a reactor for use and then directing the flow to a vent. Growth rates of the order of 25 Angstroms per minute were achieved in the epitaxial growth of indium phosphide by flow-rate modulation. This produced crystals of device quality having measured carrier mobilities of 2850-3600. In the case of epitaxial growth of ternary and quaternary compounds, improved control of deposition rates is achieved by applying flow-rate modulation to the compound carriers of each of the Group V and VI elements.

Abstract: A method of producing a heterostructure device comprises defining in a substrate 5 of group III-V semiconductor material a structure, such as a mesa 9, having first and second faces oriented substantially parallel to the (100) and (111)A crystallographic planes. The mesa 9 is exposed to group III-V chemical reagents thereby to deposit group III-V materials on the first and/or second faces in dependence upon the group V constituent in the chemical reagents.

Abstract: A method for producing a semiconductor laser comprising depositing a first semiconductor layer comprising n-type InP on an n-type InP substrate, depositing a diffraction grating of InGaAsP which includes or excludes doping impurities on the first semiconductor layer with irradiating interference fringes by a light excitation crystalline growth means, and burying a portion of the diffraction grating with InGaAsP including or excluding doping impurities with irradiating interference fringes reverse in light and darkness from said interference fringes used in depositing the diffraction grating.

Abstract: When a semiconductor device is produced by growing epitaxially a compound semiconductor layer on a Si or Ge substrate, lattice matching between the substrate crystal and the compound semiconductor layer to be formed on the substrate can be improved by ion-implanting an ion species element, which increases the lattice constant of Si or Ge as the substrate, into the Si or Ge substrate in order to increase its lattice constant. In comparison with conventional semiconductor devices using Si or Ge into which ion implantation is not made, the semiconductor device produced by the method described above can improve remarkably its characteristics. In the case of a semiconductor laser device, for example, its threshold value drops drastically and its service life can be prolonged remarkably.

Abstract: A mass transport process for use in the manufacture of semiconductor devices, particularly but not exclusively low threshold semiconductor lasers in the InP/InGaAsP system, involves the arrangement of a cover wafer (18) of the material to be grown adjacent to a semiconductor wafer (15) on which the material is to be grown, their disposition together with a crystalline alkali halide (20) in a crucible (16), and heating the crucible, which is almost but not completely sealed, in a hydrogen stream.For the manufacture of InP/InGaAsP lasers and the growth of InP, the alkali halide may comprise KI, RbI or CsI and a controlled amount of In metal (21) may be optionally contained in the crucible (16) to control the balance between growth of InP for defining the laser active region and erosion of InP from other areas of the wafer. Growth is achieved at temperatures comparable with liquid phase epitaxy processing temperatures.

Abstract: A method of making a semiconductor device including forming regions of first and second conductivity types with a semiconductor junction therebetween which extends to a surface of the device, and depositing a passivating layer over the surface to overlie the junction, further comprises a pretreatment of the surface to enhance the electrical properties of the device and the effectiveness of the passivating layer. The pretreatment, carried out prior to deposition of the passivating layer, includes treating the surface with an aqueous ammonium fluoride-hydrogen fluoride solution and thereafter subjecting the surface to a plasma in an oxygen-free, nitrogen-containing ambient.

Abstract: A semiconductor quantized layered structure comprising first and second different semiconductor materials comprising compound semiconductors from both the Group III and Group V elements and forming a plurality of alternate layers, each interfaced to its adjacent layer in a semiconductor homojunction or heterojunction. The bottom of the conduction bands of the first and second materials are at different energy levels and the tops of the valence bands of the first and second materials are at different energy levels. The bottoms of the conduction bands of the first and second materials form a plurality of serially arranged potential wells and barriers due to differences in the band structures of the different materials forming alternate layers and the interfacing of the layers forming heterojunctions so that the thinness of the layers will spatially localize electrons to obtain quantized electron states in one dimension transverse to the longitudinal extent of said layers.

Abstract: Vapor from liquid ethylene dibromide (EDB) functions in a manner superior anhydrous HCl for in situ gas phase etching of InP substrates in Metalorganic Vapor Phased Epitaxy (MOVPE). The etch rate and surface morphology behaviors have been determined for conditions useful as a substrate cleaning step prior to growth of InP and InGaAs epilayers. The thermally activated decomposition and etching are analogous to group III-V semiconductor growth processes; the behavior in different carrier gas mixtures demonstrates dependence on gas phase reactions in the heated vapor above the substrate.

Abstract: A process for forming low resistance ohmic contacts on indium phosphide (InP) avoids the usual problem of high temperature annealing. The method comprises passing a current between two contacts of a suitably chosen metallic conductor that is doped so as to be the same conductivity type as the underlining semiconductor. Passage of the current causes the contacts to combine with the semiconductor via field assisted thermal diffusion.

Abstract: A heterojunction bipolar transistor having an n- type epitaxial indium phosphide collector layer grown on a semi-insulating indium phosphide substrate with an n+ buried layer, a p- type indium phosphide base and an epitaxial, n- type boron phosphide wide gap emitter. The p- type base region is formed by ion implantation of magnesium ions into the collector layer. The transistor is applicable to millimeter wave applications due to the high electron mobility in the indium phosphide base. The wide gaps of both the boron phosphide (2.2 eV) and indium phosphide (1.34 eV) permit operation up to 350.degree. C. The transistor is easily processed using metal organic-chemical vapor deposition (MO-CVD) and standard microelectronic techniques.