Abstract: A method of manufacturing a semiconductor acceleration sensor comprises forming a strain sensing section on a surface of a semiconductor wafer, fixing the semiconductor wafer to a cooled fixing stage, cutting out a structural body having the strain sensing section from the semiconductor wafer, and connecting a support member to the structural body cut from the semiconductor wafer.

Abstract: A process for the formation of deep clear laser marks on silicon wafers is described. Tall ridges of material which is erupted from the wafer surface during the deep laser penetration form adjacent to the marks. These ridges are of the order of 3 to 15 microns in height and must be removed prior to subsequent wafer processing to avoid fragmentation causing scratches and particulate contamination. The process of the invention deposits a non-conformal layer of photoresist or other flowable material on the wafer. The peaks of the ridges protrude above the surface of the conformal layer be a significant amount and are then etched away using an aqueous silicon etch. The non-conformal layer protects the wafer surface from the silicon etch so that only the ridges are removed. After the ridges are etched, the non-conformal layer is removed leaving residual ridges of a height less than or equal to the thickness of the conformal layer.

Abstract: A method for locating dies (70) cut from a silicon wafer (54) on a wafer table (14) is provided. The method includes removing a first group of dies (70) with a robot assembly (16). Wafer location data (62) is then generated from the location (66, 68) of the first group of dies (70). Continuous wafer edge coordinates are then determined from the wafer location data (62).

Abstract: A wafer and a method of making a wafer containing a plurality of severable transducer chips includes a wafer; a plurality of transducer chips formed on the wafer; and a grid of longitudinal and latitudinal grooves in the wafer for separating the chips from each other and enabling them to be easily, individually severed from the wafer, as well as a transducer chip and a method of making it, having integral raised contacts adapted for a flip chip or beam lead interconnection, with a transducer formed on the chip; and a plurality of raised contacts integrally formed with the chip and electrically interconnected with the transducer.

Abstract: Integrated Circuit ("IC") chips are formed with precisely defined edges and sizing. At the wafer processing level, trenches are lithographically etched in the kerf regions to define the edges of the IC chips on the wafer. The trenches are filled with insulating material, and upper level wiring and metallization is completed for the IC chips on the wafer. Further trenches are defined down to the filled previously formed trenches. The wafer is thinned from its bottom up to the filled trenches, and the insulating material therein is removed to separate the individual IC chips from the wafer. The precision of IC chip edge definition facilitates forming the IC chips into stacks more easily because many stack level alignment processes become unnecessary.

Abstract: The invention relates to a method of manufacturing semiconductor devices in which a slice of semiconductor material is provided with a pn junction aligned parallel to the main surfaces of the slice. After the pn junctions is provided, depressions are provided in one main surface. These depressions cut through the pn junction, thereby dividing the main pn junction into mutually insulated pn junction portions. Before the slice is split up into separate semiconductor bodies, a layer of insulating material is provided. This method of manufacturing semiconductor devices allows for a simple application of the insulating layer to the walls of the depressions.

Abstract: A method of severing a thin film semiconductor device. The semiconductor device includes a substrate having a first electrode region formed thereon, a semiconductor body formed of layers of thin film semiconductor alloy material disposed upon the base electrode, a transparent, electrically conductive second electrode deposited atop the semiconductor body, and a containment layer of polymeric material associated with the first or second electrode in at least one region to permit subsequent severing of the device into a plurality of devices through said containment layer region.

Abstract: A processing fixture and method of fabricating micromechanical devices, such as digital micromirror devices, that allows fragile structures on wafer 22 to be protected from debris during the saw operation and subsequent cleaning operations. The wafer 22 is attached to a vacuum fixture 26 after partially sawing the wafer 22 to create saw kerfs. The backside of the wafer 22 is then ground down to the saw kerfs 24 to separate the devices 32. Each device 32 is held on the fixture by a vacuum in the headspace above the device 32. In an alternate embodiment the devices are separated by sawing completely through the wafer while in the fixture.

Abstract: Method for detaching chips in the silicon layer of a SOI substrate, wherein trenches are etched between the chips down to the insulating layer of the SOI substrate. Spacers for the passivation of SiO.sub.2 layers of the chips are produced. Finally, the chips are detached by etching the insulating layer off.

Abstract: A method of separating wafers, such as those used for semiconductor device manufacture, into die. A partly fabricated wafer is covered with a protective coating over its top surface (10). The wafer is then inscribed to define separation lines between die, with the separation lines being of a predetermined depth (12). The protective coating is then removed (14), and at least one processing step is performed at the wafer level (15, 22-24), before the inscribed wafer is separated into die. Then, the wafer is separated into die along the separation lines (17).

Abstract: In an IC chip having an interlevel insulation film constituted by a first level silicon oxide film, a spin-on-glass film, a second level silicon oxide film, the SOG film is partially removed in a buffer region of a closed loop shape inside of the chip periphery and surrounding the chip inner region. The second level silicon oxide film and a passivation insulation film are formed covering the SOG film and buffer region. Water contents are intercepted by the buffer region and will not reach the element region. It is therefore possible to prevent an inversion of the conductivity type at the surface of a well region in the element region or a corrosion of wiring layers, thereby improving the reliability of an IC device.

Abstract: A method of manufacturing a semiconductor device having a package including a base, and a chip mounted on the base, wherein the chip has a surface on which an element is formed, the method comprising the steps of (a) fixing the chip having a protective coat formed on the surface to the base; and (b) removing the protective coat from the chip without touching the chip.

Abstract: The present invention is a method for producing alignment marks on opposite faces of a generally flat substrate such as a semiconductor wafer. First, reference cuts are produced at the edges of the substrate at four points around the wafer. Next, the center line is determined on the first face of the substrate between two oppositely disposed reference cuts. First and second grooves are then cut in the first face of the substrate a first predetermined distance from the first center line. Third and fourth grooves are cut in the first face perpendicular to and through the first and second grooves at the first predetermined distance from the second reference cut forming crosshair alignment patterns. Next, the center line is determined on the second face of the substrate between the third and fourth reference cuts, and fifth and sixth grooves are cut in the second face of the substrate a second predetermined distance from the second center line.

Abstract: A channel is formed in a wafer to fore descrite die. A portion of the wafer is heated in the channel. A portion of the heated portion is cooled to eliminate the uniform structure. The cooled portion is scribed to separate the die.

Abstract: A process for partially sawing the streets on semiconductor wafers. After sawing the streets can be covered by a protective material, and then the wafer continues its processing as before. After the wafer is broken, the protective material may or may not be removed. Additionally, the wafer may be broken into individual chips using a wedge piece that has a number of individual wedges on it, where the individual wedges press against the partially sawn streets, causing the wafer to break.

Abstract: A method for producing a semiconductor device that is capable of solving problems related to dicing a metal thin film used for electrochemical etching. According to the method, an n type epitaxial thin layer is formed on a p type single-crystal silicon wafer. An n.sup.+ type diffusion layer is formed in a scribe line area on the epitaxial layer. An n.sup.+ type diffusion layer is formed in an area of the epitaxial layer which corresponds to a predetermined portion of the wafer. An aluminum film is formed over the diffusion layers. The aluminum film has a clearance for passing a dicing blade. Portions of the wafer are electrochemically etched by supplying electricity through the aluminum film and the diffusion layers, to leave portions of the epitaxial layer. The wafer is diced into chips along the scribe line area. Each of the chips forms a separate semiconductor device.

Abstract: A process for fabricating devices is disclosed. Numerous devices are formed on a substrate. The substrate is then placed on an adhesive tape mounted on a dicing ring. The devices are then separated into individual chips by dicing the substrate. Prior to dicing, the substrate is coated with a material that is relatively insoluble in water. After the substrate is diced, the coating is removed by rinsing the substrate with an organic solvent in which the material is substantially soluble. The organic solvent dissolves the coating but does not dissolve the adhesive on the tape or otherwise adversely effect the adhesion between the tape and the substrate.

Abstract: A method of manufacturing semiconductor elements with metal electrode films formed thereon in which the elements are spread on a metal screen having a mesh size small enough to prohibit the semiconductor elements from passing through it. The metal screen with the semiconductor elements on it is moved cyclically with a periodic motion substantially in a horizontal plane. As a result, burrs extending from the metal electrodes of the semiconductor elements are cut away or bent against the electrode surfaces of the semiconductor elements. The cyclic motion of the screen may be performed by tracing a figure-8 path.

Abstract: A method for creating scribe lines on a wafer having an electronic device constructed therein. A plurality of boundary segments is formed on the wafer to define a region on the wafer. This region encompasses the electronic device. An insulating layer is formed over the boundary segments, wherein the insulating layer covers the electronic device. A portion of the insulating layer is removed such that each of the segments is exposed. The boundary segments are then etched away to expose the wafer and form a plurality of scribe lines, wherein the wafer may be cut at the scribe lines to separate the electronic device from the wafer while minimizing damage to the electronic device.

Abstract: A semiconductor dicing method capable of preventing the silver plating from refusing by heat generated during cutting at thick portions without reducing a large production amount. One end of a semiconductor wafer starts to be cut at a blade feeding speed of 16 mm/sec and the speed is gradually increased. The wafer is cut from a predetermined position to another predetermined position at the constant feeding speed of 40 mm/sec. The speed is then gradually decreased and another end of the semiconductor wafer finishes being cut at the feeding speed of 16 mm/sec. That is, at the cutting start, SPEED UP and at the cutting end, SLOW DOWN. Hence, the thick silver plating are slowly cut and the cutting part is cooled with cooling water. Thus, the heat generated by cutting friction can completely be controlled to prevent the silver plating from refusing.

Abstract: FET devices according to the invention are made by etching separation grooves and the via-holes from the front surface of the substrate. Thereafter, the thickness of the substrate is reduced from the rear surface to expose the plating in the via-holes and separation grooves. A rear surface electrode and a plated heat sink are sequentially deposited on the rear surface of the thinned substrate. The devices are divided from a wafer by etching and/or severing along the separation grooves and at opposed locations along the plated heat sink.

Abstract: A method of fabricating an integrated pressure sensor, which is capable of decreasing adverse effects caused by the distortion occurring at the time when a silicon wafer and a seat are joined together. On a silicon wafer 1 are formed a thin diaphragm 2 for each of the chips, a piezo-resitance layer for each of the chips, and a signal processing circuit with an adjusting resistor for each of the chips. The silicon wafer 1 is joined onto a glass seat 6 that has pressure-adjusting passges 7 formed therein to adjust the pressure exerted on the diaphragms 2 of the silicon wafer 1. Half-dicing is effected that reaches a predetermined depth of the glass seat 6 penetrating through the silicon wafer 1 for each of the chips, and resistance of the adjusting resistor is adjusted for each of the chips while adjusting the pressure applied to the diaphragms 2 via pressure-adjusting passages 7 in the seat in a step of adjusting the pressure sensitivity by trimming the wafer and by applying a negative pressure.

Abstract: A process for partially sawing the streets on semiconductor wafers. After sawing the streets can be covered by a protective material, and then the wafer continues its processing as before. After the wafer is broken, the protective material may or may not be removed. Additionally, the wafer may be broken into individual chips using a wedge piece that has a number of individual wedges on it, where the individual wedges press against the partially sawn streets, causing the wafer to break.

Abstract: Cleavage of a semiconductor slice is initiated at a peck-mark formed in the upper surface at one edge of the slice by bending the slice over a cutting edge of a semiconductor slice dicing wheel. The cleave is propagated to the far edge of the slice by relative sliding movement of the wheel across the underside of the slice.

Abstract: A plurality of unsingulated dies on a wafer may be individually powered up using various "electronic mechanisms" on the wafer, and connecting the electronic mechanisms to the individual dies by conductive lines on the wafer. The electronic mechanisms are capable of powering-up a single die or groups of the dies, and electronically "walking through" the entire plurality of unsingulated dies. Redundant conductive lines may be provided. Diodes and/or fuses may be provided in conjunction with the conductive lines, to protect against various faults which may occur in the conductive lines. Redundant electronic selection mechanisms may also be provided to ensure the ability to selectively power up the dies.

Abstract: Similar semiconductor chips (12-15), which are produced together on a plate and subsequently dissociated, are provided with identifying markings (17-20) containing their earlier position on the plate. If defects occur later in the dissociated chips, analyses can be made to determine whether defects occur with particular frequency in certain regions of the plate, or whether a statistical distribution exists.

Abstract: In a method for dicing multi-layer composite wafers, proceeding from an upper side of the wafer, cuts are introduced into an upper layer of the wafer and, proceeding from a lower side of the wafer, cuts are introduced into a lower layer of the wafer.

Abstract: Certain non-square dies, such as triangular dies, greatly elongated rectangular dies, parallelogram dies, trapezoidal, and the like, are able to be laid out in the area of a circular semiconductor wafer more "efficiently" than square dies. Further, a peripheral area of these certain non-square dies is advantageously increased relative to the area contained within the peripheral area, to accommodate increased I/O connections to the active elements of the die.

Abstract: A method of dicing a wafer of III-V compound material without causing chipping and cracks. The method includes the steps of forming a scribe line on a surface of the wafer orthogonal to a crystal plane (011) by means of a scribing method, forming a groove in the semiconductor wafer in parallel to the crystal plane (011) by means of a grinding-cutting method, and breaking the semiconductor wafer along the scribe line and the groove.

Abstract: According to a method for producing semiconductor chips, grooves serving as dicing lines are formed in a front surface of a semiconductor wafer, the semiconductor wafer is ground from the rear surface to a prescribed thickness, leaving portions of the wafer opposite the grooves, a feeding layer is formed on the ground rear surface of the wafer, a metal layer for heat radiation is formed on the feeding layer, a dicing tape is applied to the metal layer, and the wafer and the feeding layer are diced along the dicing lines, resulting in a plurality of semiconductor chips. Therefore, the strength of the wafer is increased because portions of the wafer remain at the dicing lines, preventing curvature of the wafer.

Abstract: In a method for extending a wafer-supporting sheet of a wafer-supporting table for dicing, the wafer-supporting sheet can be extended by using a single tool, and a total height of a wafer-supporting device can be reduced while the sheet is extended. In this wafer-supporting sheet extending method, a substantially C-shaped extension spring is arranged on a lower surface of the wafer-supporting sheet, on which a wafer divided into chips is placed, so that the sheet is extended. Thus, since the wafer-supporting sheet can be extended by a single tool (the C-shaped extension spring) and the extension spring can be made thin, the total height of the wafer-supporting device can be reduced while the sheet is extended.

Abstract: A method for full-wafer processing of laser diodes with cleaved facets combining the advantages of full-wafer processing, to date known from processing lasers with etched facets, with the advantages of cleaved facets. The steps being: defining the position of the facets to be cleaved by scribing marks into the top surface of a laser structure comprising epitaxially grown layers, these scribed marks being perpendicular to the optical axis of the lasers to be made, the scribed marks being parallel, their distance (l.sub.c) defining the length of the laser cavities and the distance (l.sub.

Abstract: According to a method for producing semiconductor chips, first grooves are formed in a semiconductor wafer at a front surface, dividing the semiconductor water into a plurality of regions, each region including a single device or an integrated circuit; a first metallization layer is formed in the first grooves; the semiconductor wafer is thinned to a desired thickness from the rear surface of the wafer; second grooves are formed in the semiconductor wafer at the rear surface at positions opposite the first grooves, exposing the first metallization layer; a second metallization layer is formed in the second grooves; a metal layer for heat radiation is formed on the rear surface of the wafer but not on the second metallization layer; and the first and second metallization layers in the first grooves are cut with a dicing blade to produce a plurality of semiconductor chips.

Abstract: A method of dicing a semiconductor wafer for dividing a semiconductor wafer having a large number of devices formed thereon in a matrix into a large number of chips by the use of a diamond blade, includes the steps of first cutting by the use of the diamond blade in such a manner as to leave a partial residual portion or portions in a direction of thickness of the wafer and to define a plurality of grooves on the wafer in transverse and longitudinal directions, and then cutting the wafer along the grooves by the use of a resin blade having a width equal to or smaller than that of the diamond blade while a feed speed thereof is kept lower than that of the diamond blade.

Abstract: A method for cleaving semiconductor devices along planes accurately positioned. Resist is applied to a major surface of the semiconductor device and a mask is projected upon the resist covered major surface. The mask is opaque in those regions in which no cleave is desired. Following the exposure of the resist, the removal of the mask and the development of the resist, an ion beam is positioned incident upon the semiconductor surface such that ion beam etching occurs in the areas in which no resist covers the semiconductor structure. Once a sufficient depth is etched in the areas not covered with resist such that the strength of the semiconductor structure in those areas is significantly less than in those areas covered by resist, the ion beam etching process is ended and the resist is stripped from the semiconductor structure. Subsequently, force is applied within the area in which the ion beam etching occurred to cleave the semiconductor structure within that region.

Abstract: An improved process for forming individual dies having faces that allow the dies to be assembled against other like dies to form one and/or two dimensional scanning arrays with minimal chipping and fracturing wherein the active side of a wafer is etched to form separation grooves with the wall of the grooves adjoining the die presenting a relatively wide surface to facilitate sawing, wide grooves are cut in the inactive side of the wafer opposite each separation grooves, and the wafer cut by sawing along the separation grooves, the saw being located so that the side of the saw blade facing the die is aligned with the midpoint of the wide wall so that on sawing the bottom half of the wall and the remainder of the grooves are obliterated leaving the top half of the wall to prevent cracking and chipping during sawing.

Abstract: A method for semiconductor wafer scribing utilizing perforated metal areas in the scribe regions. In one form, a method for fabricating a semiconductor device includes forming a plurality of semiconductor die (12) on a semiconductor wafer (10) such that the die are separated from one another by scribe regions (13). A test structure (14) is formed within one of the scribe regions and includes a perforated probe pad (16). In one embodiment, the probe pad is perforated by a plurality of slots (18). The perforations in the probe pad aid in scribing the semiconductor wafer by preventing metal lift-off which often occurs when cutting metal areas.

Abstract: A manufacturing method of a photovoltaic device, whereby a photovoltaic device of a large area in the laminated structure of a first resin layer with light- transmitting property, a photo-electric converting element consisting of a transparent electrode layer, a thin-film semiconductor layer and a back electrode layer, and a second resin layer in this order is mechanically cut into an optional size, which is followed by a step wherein the first and second resin layers of the cut photovoltaic device of a smaller area are thermally treated or at least one of the transparent electrode layer and back electrode layer at the section is etched and removed. Because of the above treatment for the cut photovoltaic device of a smaller area, an electric short circuit between the transparent electrode layer and back electrode layer at the section is prevented.

Abstract: The invention relates to a method of scribing and separating dice from each other after fabrication in a semiconductor wafer in a manner such that active circuit regions in the dice reside as near to an edge of a die as possible. The wafer is anistropically etched through the active layer and into the substrate through an opening in the mask to form a generally V-shaped channel with the dice then being separated along a vertex of the channel. The dice are then positioned to abut each other in the form of a mosaic.

Abstract: A compound semiconductor pellet has a zincblende crystal structure and is formed of a III-V compound semiconductor, such as GaAs. The major surface of the pellet and side surfaces thereof are both {100} planes. To obtain this type of pellet, [010] and [001] directions are selected as dicing directions. In the case of a crystal having a zincblende crystal structure, a direction which forms 45.degree. with reference to a cleavage plane of the crystal is selected as a dicing direction.

Abstract: Large numbers of small sized, physically discrete, two-terminal non-linear devices, typically around 20 .mu.m across, are produced simultaneously, each exhibiting substantially identical physical and electrical properties by forming on the surface of a temporary support a multiple layer formation consisting of a series of thin film layers of selected materials and uniform thicknesses constituting a diode structure, for example a MIM type or p-n-p punch-through type structure; scribing the multiple layer formation in a regular pattern to define portions; and thereafter removing the support and separating the portions into physically discrete elements, each of which forms an individual non-linear device.

Abstract: A method for preventing contamination caused by residues of etched off patterns etched by photolithographic etching. A considerable amount of small contamination spots on a semiconductor chip are found to be caused by tiny residues of etched off patterns. These residues are formed primarily around the periphery of device areas and mark patterns when their outsides are etched off. The occurence of such residues of etching is increased by anisotropic etching. These residues are dislodged by succeeding steps of the pattern making process, and disperse over the substrate causing small contamination spots. To avoid the detrimental effects of the etching residues, the edges of the mark patterns and device areas are covered with an edge cover which is formed in a step to following the pattern etching process.

Abstract: A "smooth" fine classification of varactor diodes according to their electrical parameters is achieved in the manufacturing process to provide groups of matched varactor diodes. The diodes are matched within a predetermined tolerance limit. The dice are picked up from the silicon wafer along a meander path generally perpendicular to the temperature gradient of the diffusion process steps applied to the wafer when the diodes were formed, mounted on a lead frame, bonded, encapsulated, removed from the lead frame, and measured.

Abstract: A method (and semiconductor devices and wafers producers therefrom) is provided which method comprises providing a semiconductor wafer which comprises at least two physically interconnected semiconductor devices including at least one scribe lane formed at a peripheral edge between the semiconductor devices; covering at least a portion of the scribe lane with a continuous metal film, forming metal limiting means in the metal film of predetermined configuration and spacing so that no space between the metal limiting means exceeds 10 microns in any direction; and thereafter scribing the semiconductor wafer to produce a device containing bent metal portions within the range of 0 to 10 microns.

Abstract: A process including forming peaks and valleys in a bonding surface of a first wafer so that the peaks are at the scribe lines which define dice. The peaks and not the valleys of the first wafer is bonded to a bonding surface of a second wafer. The device forming steps are performed on one of the wafers. Finally, the wafer in which the devices are formed is cut through at the peaks to form the dice. The peaks may be substantially the size of the kerf produced by the cutting such that the dice are separated from the other wafer by the cutting step. Alternately, the peaks may have a width greater than the kerf produced by the cutting and remain attached to the other wafer by the remaining peak portions. The dice are then separated from the other wafer at the remaining peak portions by an additional step.

Abstract: An insulating strip layer is provided in the middle portion of an isolating zone which isolates electronic element regions from each other. A platinum layer is formed and sintered, whereby platinum silicide layers are obtained between the insulating strip layer and the electronic element regions. A silicon nitride film is formed and etched by plasma. The plasma etches the silicon nitride film and selectively etches the wafer through the gaps between the platinum silicide layers and layers adjacent thereto whereby grooves are obtained in the isolating zone. A crack which may be caused in the cutting or dicing process is stopped at the grooves.

Abstract: A high degree of wafer-scale integration of normally incompatible IC devices is achieved by providing a plurality of segments (10), each segment having thereon one or more circuits, circuit elements, sensors and/or I/O connections (14'). Each segment is provided with at least one edge (12) having an abutting portion (12a) capable of abutting against a similar edge of a neighboring segment. The segments are placed on the surface of a flotation liquid (20) and are allowed to be pulled together so as to mate abutting edges of neighboring segments, thereby forming superchips (10'). Microbridges (22) are formed between neighboring segments, such as by solidifying the flotation liquid, and interconnections (26) are formed between neighboring segments.

Abstract: Metallized via-holes and a wraparound metal plating are simultaneously formed on semiconductor chips by patterning a photoresist mask on the front surface of the wafer to open windows over metal pads as well as the grid areas where wraparound plating is desired; etching off the exposed metal if necessary and forming via-holes and grooves in the wafer by reactive ion etching to a depth which is less than the total thickness of the wafer; depositing a thin conductive film along the walls of the grooves and via-holes by electroless methods; plating the walls of the grooves and the via-holes with conductive metal by electrolytic methods; removing the back surface of the wafer ("backlapping") along with the floors of both the grooves and the via-holes, to expose the metal on the wall of the via-holes and separate the individual chips; and, depositing conductive metal on the back surface of the individual chips to complete the grounding path.

Abstract: Magnetosensitive semiconductor devices are produced by forming a magnetosensitive part on one surface of a semiconductor substrate, pasting the semiconductor substrate thus formed on a jig, wrapping or etching the opposite surface of the semiconductor substrate, pasting a magnetic substrate on it with the jig pasted thereon, dividing the pasted substrates into individual unistructural elements each with a semiconductor chip and a magnetic piece, and die bonding, wire bonding and resin molding these individual elements.

Abstract: A cost effective method of fabricating a large array or pagewidth silicon device having high resolution is disclosed. The pagewidth device is assembled by abutting silicon device sub-units such as image sensors or thermal ink jet printheads. For printheads, the sub-units are fully operational small printheads comprising an ink flow directing channel plate and a heating element plate which are bonded together. A plurality of individual printhead sub-units are obtained by dicing aligned and bonded channel wafers and heating element wafers. The abutting edges of the printhead sub-units are diced in such a manner that the resulting kerfs have vertical to inwardly directed sides which enable high tolerance linear abutment of adjacent sub-units. Alternatively, the wafer surface containing the heating elements is first anisotropically etched to form small V-grooves, one wall of which protects against microcracking during the dicing operation. The other wall of the V-groove is obliterated by the slanted dicing blade.