Energy Beam Assisted Epi Growth Patents (Class 148/DIG48)
  • Patent number: 5409867
    Abstract: After partially crystallizing an amorphous semiconductor deposited on a substrate, the irradition of infrared ray is conducted to grow a polycrystalline semiconductor layer on the crystallized region and the amorphous region by thermal decomposition while the temperature of the crystallized region is kept higher than that of the amorphous region. Since the polycystalline layer is formed of polycystalline grains grown from nuclei of the cystallized region, the crystal grain thereof is large.
    Type: Grant
    Filed: June 15, 1994
    Date of Patent: April 25, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Akihiko Asano
  • Patent number: 5296386
    Abstract: Germanium is used to significantly enhance the drift mobilities of minority carriers in the channels of N-channel and P-channel metal-oxide-semiconductor (MOS) transistors with silicon substrates. Germanium processing is also used to enhance the source/drain contact conductance for MOS devices. Methods are disclosed for forming the germanium-rich interfacial layer utilizing a germanium implant and wet oxidation or growing a silicon-germanium alloy by molecular beam epitaxy.
    Type: Grant
    Filed: March 6, 1991
    Date of Patent: March 22, 1994
    Assignee: National Semiconductor Corporation
    Inventors: Sheldon Aronowitz, Courtney Hart, Court Skinner
  • Patent number: 5273932
    Abstract: The growth rate of a compound semiconductor thin film is freely enhanced or suppressed by establishing a proper temperature of a substrate 10, and by irradiating by an MOMBE technique, portions corresponding to a desired pattern on the substrate 10 with laser rays having an energy lower than that of photon which can directly decompose an organometal during film growth. A compound semiconductor thin film having a fine pattern with complicated unevenness can be formed on the substrate 10. The relative positions of the source 11 of laser rays, the optical systems 12 and 31 for irradiating the substrate with the laser rays, and the substrate 10 in the vacuum chamber 1 are maintained constant by mounting the body 1 of the MOMBE system, the source 11 of the laser rays, and the optical systems 12 and 31 for guiding the laser rays to the body 1 of the MOMBE system on a vibration proof base 30, whereby the formation of a fine pattern becomes possible.
    Type: Grant
    Filed: August 25, 1992
    Date of Patent: December 28, 1993
    Assignee: Nippon Telegraph & Telephone Corp.
    Inventors: Hideo Sugiura, Takeshi Yamada, Ryuzo Iga
  • Patent number: 5270247
    Abstract: A heterojunction between In-containing compound semiconductors in which the interface thereof is controlled at an atom level is provided by a process of atomic layer epitaxy (ALE) in which hydrogen gas is utilized as a carrier gas and as a purge gas for a separation of source gases. The time for which the purge gas is supplied can be utilized for controlling the ALE.
    Type: Grant
    Filed: July 8, 1992
    Date of Patent: December 14, 1993
    Assignee: Fujitsu Limited
    Inventors: Yoshiki Sakuma, Masashi Ozeki, Nobuyuki Ohtuka, Kunihiko Kodama
  • Patent number: 5120393
    Abstract: Flatness of atomic-accuracy is achieved in an MBE epitaxial growth process by imparting kinetic energy to atoms absorbed on a substrate by means of irradiation by ion-beam for surface bombardment. Ion-beam surface bombardment may also be used for evaluation. The molecular-beam for epitaxial growth and the ion bombardment for surface energization and surface evaluation may all be operated in a pulse mode and synchronized so that evaluation and growth are conducted alternately while growth and energization are conducted simultaneously.
    Type: Grant
    Filed: January 10, 1991
    Date of Patent: June 9, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Minoru Kubo, Tadashi Narusawa
  • Patent number: 5100832
    Abstract: A process for preparing a doped epitaxial compound semiconductor on a substrate by molecular beam epitaxy, the molecular beam epitaxy being effected under the irradiation of the substrate surface with a specific electromagnetic radiation.
    Type: Grant
    Filed: March 31, 1990
    Date of Patent: March 31, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiko Kitagawa, Yoshitaka Tomomura, Kenji Nakanishi
  • Patent number: 5075243
    Abstract: Amorphous Co:Si (1:2 ratio) films (12) are electron gun-evaporated on clean Si(111) substrates (10), such as in a molecular beam epitaxy system. These layers are then crystallized selectively with a focused electron beam (14) to form very small crystalline CoSi.sub.2 regions (12') in an amorphous matrix. Finally, the amorphous regions are etched away selectively using plasma or chemical techniques.
    Type: Grant
    Filed: March 27, 1991
    Date of Patent: December 24, 1991
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Kai-Wei Nieh, True-Lon Lin, Robert W. Fathauer
  • Patent number: 5024967
    Abstract: A process is described for making semiconductor devices with highly controlled doping profiles. The process involves minimizing or eliminating segregation effects caused by surface electric fields created by Fermi-level pinning. These electric fields act on dopant ions and cause migration from the original deposition site of the doplant ions. Dopant ions are effectively shielded from the surface electric fields by illumination of the growth surfaces and by background doping. Also, certain crystallographic directions in certain semiconductors do not show Fermi-level pinning and lower growth temperatures retard or eliminate segregation effects. Devices are described which exhibit enhanced characteristics with highly accurate and other very narrow doping profiles.
    Type: Grant
    Filed: June 30, 1989
    Date of Patent: June 18, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: Rose F. Kopf, J. M. Kuo, Henry S. Luftman, Erdmann F. Schubert
  • Patent number: 4997780
    Abstract: The structure of a pair of concentrically disposed field effect transistors responsive to a common gate electrode, and a process for the fabrication thereof. In one form, a dielectric region is surrounded by an active region of monocrystalline silicon and has situated upon the dielectric region a layer of recrystallized silicon as a second active region. A gate electrode overlies both active regions and serves as a mask to form in such respective regions self-aligned channels. The concentric placement of the active substrate monocrystalline silicon region, and inner perimeter of dielectric, and a further inner active region of recrystallized silicon situated over a dielectric region, facilitates recrystallization from seed of monocrystalline silicon irrespective of the direction of translation taken by the energy beam, and associated melt, in scanning across the structure.
    Type: Grant
    Filed: September 21, 1988
    Date of Patent: March 5, 1991
    Assignee: NCR Corporation
    Inventors: Nicholas J. Szluk, Jay T. Fukumoto
  • Patent number: 4975387
    Abstract: Epitaxial Si-Ge heterostructures are formed by depositing a layer of amorphous Si-Ge on a silicon wafer. The amorphous Si-Ge on the silicon wafer is then subjected to a wet oxidation in order to form an epitaxial Si-Ge heterostructure. Any size wafer may be used and no special precaustions need be taken to ensure a clean amorphous Si-Ge/Si interface.
    Type: Grant
    Filed: December 15, 1989
    Date of Patent: December 4, 1990
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Sharka M. Prokes, Wen F. Tseng, Aristos Christou
  • Patent number: 4962057
    Abstract: In situ evaporation of selected surface regions or layers of compound semiconductors is accomplished without breaking the growth system environment employing photo induced evaporation enhancement in chemical vapor deposition epitaxy. Intense radiation from an energy source desorbs or causes evaporation of consecutive monolayers of atoms or combined atoms from the surface crystal by thermal evaporation. The desorbed atoms from the growth surface are removed atomic layer by atomic layer in a fairly uniform and systematic manner and may be characterized as "monolayer peeling" resulting in a morphology that is sculpturally smooth and molecularly continuous. In this sense, the method of this invention is analogous to erasing or the etching of crystal material and is the antithesis to laser deposition patterning wherein erasure after growth or reduced rate of growth during growth provide "negative growth patterning".
    Type: Grant
    Filed: October 13, 1988
    Date of Patent: October 9, 1990
    Assignee: Xerox Corporation
    Inventors: John E. Epler, David W. Treat, Thomas L. Paoli
  • Patent number: 4960720
    Abstract: In molecular beam epitaxial growth of GaAs substrate, a compound semiconductor thin film having Ga and As is grown by Ga beam and As beam in MBE chamber and then the substrate is transferred to an annealing chamber where the substrate is annealed under As vapor pressure. The above process is repeated to a predetermined layer level whereby it eliminates divergence from stoichiometric.
    Type: Grant
    Filed: August 24, 1987
    Date of Patent: October 2, 1990
    Inventor: Masafumi Shimbo
  • Patent number: 4950621
    Abstract: A method of growing an epitaxial crystalline layer on a substrate which comprises the steps of(a) providing in the reaction zone of a reaction vessel a heated substrate(b) establishing a gas stream, provided by a carrier gas which gas stream comprises at least 50% by volume of a gas which suppresses the homogeneous nucleation of particles in the vapor phase which contains, in the vapor phase, at least one alkyl of an element selected from Group 15 and Group 16 of the Periodic Table,(c) passing the gas stream through the reaction zone into contact with the heated substrate, and(d) irradiating at least a major part of the surface of the substrate with electromagnetic radiation to provide photolytic decomposition of the at least one alkyl and consequential epitaxial deposition of the layer containing the said element across at least a major part of the surface of the substrate.
    Type: Grant
    Filed: November 6, 1985
    Date of Patent: August 21, 1990
    Assignee: Secretary of the State for Defence in Her Majesty's Government of the United Kingdom of Great Britain and Northern Ireland
    Inventors: Stuart J. Irvine, John B. Mullin, Jean Giess
  • Patent number: 4940505
    Abstract: A method is provided for epitaxially growing single crystalline silicon on a silicon substrate (10) from a silicon-bearing gas (26) at a temperature below the pyrolytic threshold of the gas and at temperatures below those normally required for epitaxial growth. An oxidized silicon substrate (10) is fluorinated (equation 2, FIG. 2) to replace the silicon-oxide layer with an adsorbed fluorinated layer. The substrate is placed in a laser photo-CVD reactor chamber (20), the chamber is evacuated to a sub-UHV level of 10.sup.-3 to 10.sup.-7 Torr, the substrate is heated to C., hydrogen gas (24) is introduced into the chamber, and excimer pulsed ultraviolet laser radiation (32 from laser 12) is applied through the hydrogen gas to impinge the wafer substrate.
    Type: Grant
    Filed: December 2, 1988
    Date of Patent: July 10, 1990
    Assignee: Eaton Corporation
    Inventors: Steven R. Schachameyer, Mark W. Beranek
  • Patent number: 4918028
    Abstract: A process for forming deposited film, which comprises:(a) the step of preparing a substrate having crystal nuclei or regions where crystal nuclei are selectively formed scatteringly on the surface for forming deposited film in a film forming space for formation of deposited film;(b) the step of forming deposited film on the above substrate by introducing an activated species (A) formed by decomposition of a compound (SX) containing silicon and a halogen and an activated species (B) formed from a chemical substance for film formation (B) which is chemically mutually reactive on said activated species (A) separately from each other into said film-forming space to effect chemical reaction therebetween;(c) the step of introducing a gaseous substance (E) having etching action on the deposited film to be formed or a gaseous substance (E.sub.
    Type: Grant
    Filed: October 21, 1988
    Date of Patent: April 17, 1990
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shigeru Shirai
  • Patent number: 4914053
    Abstract: Preferred embodiments include growth of GaAs on insulator-masked silicon; the GaAs is single crystal over the silicon but polycrystalline over the insulator. A post=growth anneal extends the single crystal region over the insulator for distances of 2-4 .mu.m.
    Type: Grant
    Filed: September 8, 1987
    Date of Patent: April 3, 1990
    Assignee: Texas Instruments Incorporated
    Inventors: Richard J. Matyi, Hisashi Shichijo
  • Patent number: 4888302
    Abstract: A defect free monocrystalline layer of silicon on an insulator is produced by forming a thin layer of silicon dioxide on a monocrystalline silicon substrate, forming a thin layer of polycrystalline or amorphous silicon on the silicon dioxide layer and focussing two beams from lamps on the thin silicon layer to form a line image providing a melt zone surrounded by two narrow heated zones having temperatures lower than the melt zone and having a temperature differential of from C./mm decreasing form the melt zone while heating the substrate to a temperature below that of the zones heated by the lamps and scanning the structure.
    Type: Grant
    Filed: March 29, 1989
    Date of Patent: December 19, 1989
    Assignee: North American Philips Corporation
    Inventor: Subramanian Ramesh
  • Patent number: 4885260
    Abstract: Disclosed is a vapor phase growth method of compound semiconductor in which source gases are introduced into an epitaxial growth reactor at fixed feed rates, the substrate surface is irradiated with light, and the light irradiation is turned on and off, or the intensity of light irradiation is increased or decreased, so that an epitaxial layer structure changes in the composition, and the carrier concentration and conductivity type abruptly or continuously change in the growth film in the direction of the thickness.
    Type: Grant
    Filed: February 16, 1988
    Date of Patent: December 5, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuzaburo Ban, Masaya Manno, Minoru Kubo, Mototsugu Morisaki, Mototsugu Ogura
  • Patent number: 4859625
    Abstract: A method for epitaxial growth of compound semiconductor containing three component elements, two component elements thereof being the same group elements, in which three kinds of compound gases each containing different one of the three component elements are cyclically introudced, under a predetermined pressure for a predetermined period respectively, onto a substrate enclosed in an evacuated crystal growth vessel so that a single crystal thin film of the compound semiconductor is formed on the substrate.
    Type: Grant
    Filed: November 20, 1987
    Date of Patent: August 22, 1989
    Assignee: Research Development Corporation of Japan, Junichi Nishizawa and Oki Electric Industry Co., Ltd.
    Inventor: Fumio Matsumoto
  • Patent number: 4843029
    Abstract: A method of manufacturing a semiconductor device is described in which gaseous material is supplied into a reaction chamber containing a substrate to cause a first epitaxial layer of a first material to grow on the substrate and switching means are then operated to alter within a predetermined period the supply of gaseous material into the reaction chamber to cause a second eitaxial layer of a second material to grow on the first layer. During the predetermined period of radiant heat source is activated to radiantly heat the surface of the first layer so as to smooth the first layer on an atomic level before growth of the second layer is commenced. The radiant heat source may be a laser capable of directing one or more laser pulses at the surface to be radiantly heated.
    Type: Grant
    Filed: April 4, 1988
    Date of Patent: June 27, 1989
    Assignee: U.S. Philips Corporation
    Inventors: Bruce A. Joyce, Philip Dawson
  • Patent number: 4843031
    Abstract: Disclosed is a method of fabricating a compound semiconductor device which is capable of forming a multi-wavelength semiconductor laser structure, double cavity type semiconductor laser structure, stripe type semiconductor laser structure transverse junction stripe type semiconductor laser structure, or semiconductor grating by a single step of epitaxial growth while illuminating a desired part of substrate surface selectively with light at the time of epitaxial growth.
    Type: Grant
    Filed: March 15, 1988
    Date of Patent: June 27, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuzaburo Ban, Hiraaki Tsujii, Youichi Sasai, Mototsugu Ogura, Hiroyuki Serizawa
  • Patent number: 4843030
    Abstract: A semiconductor processing method is provided for growing a semiconductor film from a semiconductorbearing gas on a substrate at a substrate temperature below the pyrolytic threshold of the gas. The gas is photodissociated to a collisionally stable species which migrates and travels in the gas phase the entire distance to the substrate, surving hundreds of collisions, and is pyrolyzed at the surface of the substrate and forms several monolayers of semiconductor material which is substantially more catalytically active than the substrate and which subsequently catalyzes decomposition of the gas.
    Type: Grant
    Filed: November 30, 1987
    Date of Patent: June 27, 1989
    Assignee: Eaton Corporation
    Inventors: J. Gary Eden, Kevin K. King, Viken Tavitian
  • Patent number: 4837182
    Abstract: A method of producing sheets of crystalline material is disclosed, as well as devices employing such sheets. In the method, a growth mask is formed upon a substrate and crystalline material is grown at areas of the substrate exposed through the mask and laterally over the surface of the mask to form a sheet of crystalline material. This sheet is optionally separated so that the substrate can be reused. The method has particular importance in forming sheets of crystalline semiconductor material for use in solid state devices.
    Type: Grant
    Filed: December 4, 1987
    Date of Patent: June 6, 1989
    Assignee: Massachusetts Institute of Technology
    Inventors: Carl O. Bozler, John C. C. Fan, Robert W. McClelland
  • Patent number: 4835116
    Abstract: A method for producing wafers having deposited layers of III-V materials on Si or Ge/Si substrates is disclosed. The method involves the use of multiple in situ and ex situ annealing steps and the formation of a thermal strain layer to produce wafers having a decreased incidence of defects and a balanced thermal strain. The wafers produced thereby are also disclosed.
    Type: Grant
    Filed: November 13, 1987
    Date of Patent: May 30, 1989
    Assignee: Kopin Corporation
    Inventors: Jhang W. Lee, Richard E. McCullough
  • Patent number: 4808546
    Abstract: Of an amorphous Si film, a region to be formed into a lowly doped region such as the channel region of an MOS transistor is covered with a mask and an uncovered region is doped with an impurity. After this, the amorphous Si film is annealed and turned to signal crystal through solid phase epitaxial growth, and the mask itself is used as the electrode of a semiconductor device. By this impurity doping, a large-sized single-crystal Si film can be formed, and the impurity doping can be conducted in self-alignment with the electrode formation to produce a highly integrated semiconductor circuit.
    Type: Grant
    Filed: February 2, 1987
    Date of Patent: February 28, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Moniwa, Masanobu Miyao, Shoji Shukuri, Eiichi Murakami, Terunori Warabisako, Masao Tamura, Nobuyoshi Natsuaki, Kiyonori Ohyu, Tadashi Suzuki, Yuuichi Madokoro, Yasuo Wada
  • Patent number: 4800173
    Abstract: Process for producing a valence electron controlled functional crystalline film by introducing (i) a film forming gaseous raw material, (ii) a halogen series gaseous oxidizing agent to oxidize the raw material (i), and (iii) a gaseous raw material to impart a valence electron controlling agent separtely into a reaction region of a film deposition space and chemically reacting them to generate plural kinds of precursors containing excited precursors and to let at least one kind of said precursors to act as a film forming supplier whereby said crystalline film is formed on a selected substrate being kept at a predetermined temperature in the film deposition space.
    Type: Grant
    Filed: February 18, 1987
    Date of Patent: January 24, 1989
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masahiro Kanai, Junichi Hanna, Isamu Shimizu
  • Patent number: 4782035
    Abstract: A method for producing a semiconductor laser comprising depositing a first semiconductor layer comprising n-type InP on an n-type InP substrate, depositing a diffraction grating of InGaAsP which includes or excludes doping impurities on the first semiconductor layer with irradiating interference fringes by a light excitation crystalline growth means, and burying a portion of the diffraction grating with InGaAsP including or excluding doping impurities with irradiating interference fringes reverse in light and darkness from said interference fringes used in depositing the diffraction grating.
    Type: Grant
    Filed: November 12, 1987
    Date of Patent: November 1, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Masatoshi Fujiwara
  • Patent number: 4778775
    Abstract: Improved processing for forming an interconnect in a process where a recrystallized polysilicon layer is formed over an insulative layer and where recrystallization takes place through a plurality of seed windows formed in the insulative layer. A doped region is formed in the substrate prior to deposition of the polysilicon layer. The polysilicon layer is in contact with at least a portion of the doped region through an opening in the insulative layer. Recrystallization takes place through this opening, and, for instance, the doped region is electrically connected to a source or drain region of a semiconductor device formed in the recrystallized layer.
    Type: Grant
    Filed: May 27, 1987
    Date of Patent: October 18, 1988
    Assignee: Intel Corporation
    Inventor: J. C. Tzeng
  • Patent number: 4760036
    Abstract: A process for growing silicon on insulator in which complete isolation of the grown silicon of the substrate silicon by an intermediate oxide layer is obtained. A first epitaxial lateral overgrowth technique is used to grow a continuous layer of silicon through seed holes in a patterned oxide layer overlying the silicon substrate. Then the silicon layer is etched to expose the seed holes which are then oxidized to make the oxide layer aperture-free. This is followed by a second epitaxial lateral overgrowth step to replace the silicon etched in the silicon layer to make the layer substantially planar.
    Type: Grant
    Filed: June 15, 1987
    Date of Patent: July 26, 1988
    Assignee: Delco Electronics Corporation
    Inventor: Peter J. Schubert
  • Patent number: 4657603
    Abstract: A method for the manufacture of gallium arsenide thin film solar cells on inexpensive substrate material whereby an intermediate layer of highly doped, amorphous germanium is employed in order to promote the growth of the gallium arsenide layers. A high-energy radiation is directed to specific, prescribed points on the highly doped, amorphous germanium layer thereby generating centers having a defined crystal orientation, so that the epitaxial layer spreads laterally from these centers in a surface-covering fashion during the epitaxial vapor phase deposition. The solar cells produced by designational grain growth can be manufactured with high purity in a simple way and have an efficiency (greater than 20%) comparable to known mono-crystalline solar cells.
    Type: Grant
    Filed: September 20, 1985
    Date of Patent: April 14, 1987
    Assignee: Siemens Aktiengesellschaft
    Inventors: Wolfgang Kruehler, Josef Grabmaier
  • Patent number: 4559086
    Abstract: There is disclosed a process and the resulting semiconductor wafer wherein the backside of the wafer has applied thereto a layer of polysilicon. Portions of this layer are exposed to an energy beam to recrystallize them into single crystal silicon fused to and extending from the underlying wafer. The recrystallized portions contact adjacent portions of the polysilicon layer, thereby providing a path for impurities migrating from the wafer to the polysilicon.
    Type: Grant
    Filed: July 2, 1984
    Date of Patent: December 17, 1985
    Assignee: Eastman Kodak Company
    Inventor: Gilbert A. Hawkins
  • Patent number: RE33274
    Abstract: A method of converting selected areas of a semiconductor structure into a disordered alloy comprising a well feature epitaxially deposited on a semiconductor support, the well feature comprising at least one first well layer of narrow bandgap material deposited adjacent to at least a second layer of wider bandgap material or interposed between second and third layers of wider bandgap material. The disordered alloy exhibits higher bandgap and lower refractive index properties than the first layer. The method comprises the steps of (1) either placing the structure within a protective environment to prevent the escape of volatile components from the structure during subsequent processing or alternatively, covering the structure with a protective coating to prevent the escape of any elemental component of the structure, (2) heating the structure to a background temperature .[.just.].
    Type: Grant
    Filed: January 31, 1989
    Date of Patent: July 24, 1990
    Assignee: Xerox Corporation
    Inventors: Robert D. Burnham, Noble M. Johnson