Abstract: An aluminum fill process for sub-0.25 .mu.m technology integrated circuits that has a reflow temperature less than 400.degree. C. that has low alloy resistivity and excellent electromigration characteristics. The aluminum allow is composed of Al-1% Ge-1% Cu.

Abstract: A method of producing a bipolar transistor includes the step of forming an emitter contact layer containing a high concentration of impurity by means of plasma doping or solid-state diffusion without causing diffusion of impurity in a base layer. This makes it possible to realize a thin base layer having a high impurity concentration.The invention also provides a method of producing a semiconductor device including a bipolar transistor and another device element such as a resistor element including a polysilicon layer containing an activated impurity in such a manner that both the bipolar transistor and the device element are disposed on the same single substrate, the method including the steps of: forming a polysilicon layer containing an activated impurity on the surface of a substrate; and then forming a base layer of the bipolar transistor. This method prevents the base layer from being affected by heat treatment on the polysilicon layer.

Abstract: A method for fabricating a silicon-germanium thin film field effect transistor (TFT) with a high carrier mobility and a high on/off ratio. An amorphous silicon layer, an amorphous germanium layer and a gate insulating film are successively layered on an insulating substrate on which a pair of source and drain electrodes are formed. Next, the amorphous silicon layer and the amorphous germanium layer are converted into polycrystalline layers by thermal annealing at a temperature higher than 600.degree. C. or laser annealing. Then, a gate electrode is formed on the gate insulating film.

Abstract: A process for the laminar joining of two or more silicon semiconductor slices (wafers) under the effect of pressure and heat, in which a thin layer of a semiconductor-compatible material is applied to at least one of the surfaces to be joined.

Abstract: A resonant tunneling diode (400) made of a germanium quantum well (406) with silicon oxide tunneling barriers (404, 408). The silicon oxide tunneling barriers (404, 408) plus germanium quantum well (406) may be fabricated by oxygen segregation from germanium oxides to silicon oxides.

Abstract: The present invention is directed to a thin film transistor (TFT) structure having a channel region formed of a crystallized SiGe and is to provide a thin film transistor having a large carrier mobility. In this case, a channel region (4) is formed of a crystallized SiGe thin film.

Abstract: A germanium-containing compound may be used as an additive to dopant source gas to improve the direct GPD (Gas-Phase Doping) processes. This invention involves a gas-phase doping method for semiconductor wafers, including the steps of providing a semiconductor wafer, and exposing the surface of the wafer to a process medium comprising a dopant gas in order to dope the surface of the wafer, wherein the process medium also comprises a germanium-containing compound gas. Preferably, the process medium also comprises a carrier gas, where the carrier gas is hydrogen. The germanium-containing gas can be germane, digermane, or other suitable germanium-containing compound. The wafer and dopant gas may also be exposed to a plasma source, and the wafer may be heated in a rapid thermal processing reactor. Some advantages over conventional GPD processes include faster desorption of byproducts and incorporation of dopant atoms, shallower junctions, shorter cycle times, and lower processing temperatures.

Abstract: In a method of manufacturing a bonded semiconductor substrate, a SiGe mixed crystal layer, a silicon layer containing N-type impurities, a SiGe mixed crystal layer containing N-type impurities of high concentration, and a silicon layer containing N-type impurities of high concentration are formed in this order on a top surface of a silicon substrate by an epitaxial growth process to form a first semiconductor substrate. A silicon oxide film is formed on a surface of a silicon substrate to form a second semiconductor substrate. The first and second semiconductor substrates are bonded to each other by heat treatment, with their top surfaces contacting each other. The first semiconductor substrate is etched from the back surface thereof until the SiGe mixed crystal layer is exposed, and the SiGe mixed crystal layer is etched until the silicon layer containing N-type impurities is exposed. This method prevents the thickness of the element forming layer from varying.

Abstract: A method is provided for reducing growth of silicide and the temperatures necessary to produce silicide. Germanium is implanted at a concentration peak density depth below the midline and above the lower surface of a metal layer receiving the implant. Subsequent anneal causes germanide to occupy an area above growing silicide such that consumption of silicon atoms is reduced, and that silicide is formed to a controlled thickness.

Abstract: Germanium is used to significantly enhance the drift mobilities of minority carriers in the channels of N-channel and P-channel metal-oxide-semiconductor (MOS) transistors with silicon substrates. Germanium processing is also used to enhance the source/drain contact conductance for MOS devices. Methods are disclosed for forming the germanium-rich interfacial layer utilizing a germanium implant and wet oxidation or growing a silicon-germanium alloy by molecular beam epitaxy.

Abstract: Germanium is used to significantly enhance the drift mobilities of minority carriers in the channels of N-channel and P-channel metal-oxide-semiconductor (MOS) transistors with silicon substrates. Germanium processing is also used to enhance the source/drain contact conductance for MOS devices. Methods are disclosed for forming a germanium-rich interfacial layer utilizing a germanium implant and wet oxidation or growing a silicon-germanium alloy by molecular beam epitaxy.

Abstract: Doped silicon-germanium alloy is selectively deposited on a semiconductor substrate, and the semiconductor substrate is then heated to diffuse at least some of the dopant from the silicon-germanium alloy into the semiconductor substrate to form a doped region at the face of the semiconductor substrate. The doped silicon-germanium alloy acts as a diffusion source for the dopant, so that shallow doped, regions may be formed at the face of the semiconductor substrate without ion implantation. A high performance contact to the doped region is also provided by forming a metal layer on the doped silicon-germanium alloy layer and heating to react at least part of the silicon-germanium alloy layer with at least part of the metal layer to form a layer of germanosilicide alloy over the doped regions. The method of the present invention is particularly suitable for forming shallow source and drain regions for a field effect transistor, and self-aligned source and drain contacts therefor.

Abstract: A process for making local interconnection of devices on a semiconductor substrate is disclosed. Contact openings are defined to a plurality of devices on the substrate. A blanket layer of germanium is deposited over the substrate, followed by deposition of a blanket layer of electrically conducting material on top of the germanium layer. The conducting layer is etched first stopping at the germanium layer. Subsequently the germanium layer is etched by a different process, selective to the conductive layer and the device contact. The conducting layer is preferably one of the following materials: polysilicon, silicide, a composite of polysilicon with metal or silicide films.

Abstract: A monocrystalline germanium film is grown on a sapphire substrate with a (1102) orientation. The substrate is first pretreated to restructure the (1102) surface plane. Typically, restructuring is accomplished by either an anneal at high temperature or ion bombardment. A monocrystalline germanium layer is grown on the pretreated surface by a vapor deposition process such as molecular beam epitaxy or chemical vapor deposition.

Abstract: Methods are disclosed for making semiconductor windows which are transparent to light in the infrared range which have good electrical conductivity and are formed of a substrate material (11) having a semiconductor coating (14) having a dopant included therein. The coating is diffused, grown or deposited on one surface of the substrate and is controlled to obtain both low electrical resistivity and high infrared transmissivity. The coating can be formed of the same material as the substrate or can be a different material. Windows having particular thermal properties are formed utilizing zinc selenide and zinc sulfide as the substrate.

Abstract: A P-type buried layer is described for use with planar, silicon, monolithic, epitaxial, PN junction-isolated transistors of PNP conductivity primarily for use in IC construction. The buried layer includes a high concentration of boron and gallium along with germanium, which is in sufficient concentration to inhibit impurity diffusion in the silicon epitaxial layer. This inhibition effect has been found to be sufficient to cause the combination of boron and gallium to act as slow diffusers. The result is that the performance of arsenic and antimony, in the creation of buried layers for NPN transistors. Thus, the performance of NPN transistors can be matched for PNP transistors. This means that an IC can be fabricated so that more nearly equal performance NPN and PNP transistors can be fabricated simultaneously in a common substrate.

Abstract: This invention comprises a Pd layer formed on an n-type GaAs semiconductor crystals, and a Ge layer being formed on the Pd layer, characterized in that the thickness of the Pd layer is between 300 .ANG. and 1500 .ANG. and the thickness of the Ge layer is between 500 .ANG. and 1500 .ANG..In addition, this invention provides an ohmic electrode forming process for compound semiconductor crystals for forming an ohmic electrode on an n-type GaAs semiconductor crystal, comprising a first layer forming step for forming a palladium (pd) layer on a compound semiconductor crystal; a second layer forming step for forming a germanium layer (Ge) on the Pd layer; and an annealing step for annealing the Pd layer and the Ge layer by a rapid thermal annealing treatment.The Pd layer is formed between 300 .ANG. and 1500 .ANG. in the first layer forming step; the Ge layer is between 500 .ANG. and 1500 .ANG.

Abstract: An alternating cyclic (A.C.) method for selectively depositing single element semiconductor materials, on the surface of a substrate without depositing the material on an adjacent mask layer. A gas of a reducible compound of the material and a reducing gas, preferably hydrogen, are simultaneously flowed through a reaction chamber to deposit the material on the substrate surface and to a lesser extent on the mask layer. Then, the flow of reducing gas is interrupted to cause the reducible compound gas to etch the material which forms on the mask layer in a disproportionation reaction. The deposition and etch steps are repeated in an alternating cyclic fashion until the requisite thickness is deposited. The process may take place in a single reaction chamber, using only the reducible compound gas and pulsed flow of the reducing gas.

Abstract: This invention relates to ultra-thin semiconductor films which can be in the submicron range formed from semiconductor materials such as silicon, germanium and gallium arsenide. The films are formed by creating a thin slightly damaged surface on the polished reverse side of a film (e.g., a wafer) of the semiconductor by low dose ion implantation and then etching the semiconductor material on the front side of the film to remove the semiconductor material down to the ion implanted damaged layer. While the implanted ions can be chosen from functionally desirable ions which upon annealing remain in the film to alter the original electrical characteristics, the implanted ions can also be chosen so that upon annealing, the resultant ultra-thin semiconductor film has the same electrical characteristics as the original semiconductor material.The ion implantation changes the etching characteristics of the ion implanted layer.

Abstract: This invention relates to ultra-thin semiconductor films which can be in the submicron range formed from semiconductor materials such as silicon, germanium and gallium aresenide. The films are formed by creating a thin slightly damaged surface on the polished reverse side of a film (e.g., a wafer) of the semiconductor by low dose ion implantation and then etching the semiconductor material on the front side of the film to remove the semiconductor material down to the ion implanted damaged layer. While the implanted ions can be chosen from functionally desirable ions which upon annealing remain in the film to alter the original electrical characteristics, the implanted ions can also be chosen so that upon annealing, the resultant ultra-thin semiconductor film has the same electrical characteristics as the original semiconductor material.The ion implantation changes the etching characteristics of the ion implanted layer.

Abstract: A semiconductor processing method is provided for growing a semiconductor film from a semiconductorbearing gas on a substrate at a substrate temperature below the pyrolytic threshold of the gas. The gas is photodissociated to a collisionally stable species which migrates and travels in the gas phase the entire distance to the substrate, surving hundreds of collisions, and is pyrolyzed at the surface of the substrate and forms several monolayers of semiconductor material which is substantially more catalytically active than the substrate and which subsequently catalyzes decomposition of the gas.

Abstract: In a method for producing a spatially periodic semiconductor layer structure in the form of a superlattice composed of an alternating arrangement of strained semicondutor layers of at least two different semiconductor compositions forming at least one heterojunction, at least one of the semiconductor layers is provided with a doped layer which extends essentially parallel to the heterojunction and whose layer thickness is no greater than the thickness of the semiconductor layer in which it is produced.

Abstract: Process for producing a valence electron controlled functional crystalline film by introducing (i) a film forming gaseous raw material, (ii) a halogen series gaseous oxidizing agent to oxidize the raw material (i), and (iii) a gaseous raw material to impart a valence electron controlling agent separtely into a reaction region of a film deposition space and chemically reacting them to generate plural kinds of precursors containing excited precursors and to let at least one kind of said precursors to act as a film forming supplier whereby said crystalline film is formed on a selected substrate being kept at a predetermined temperature in the film deposition space.

Abstract: The heterojunction bipolar transistor has a structure of wide band-gap transistor and comprises a collector region having an N-type GaAs layer, a base region having a P-type germanium layer formed on the N-type GaAs layer, and an emitter region having an N-type semiconductor layer of mixed crystal of silicon and germanium formed on the P-type germanium layer. The mixed crystal of the N-type semiconductor layer may have a uniform distribution of silicon or a graded distribution of silicon in which a content of silicon is zero at the surface facing the P-type germanium layer and is continuously increased with distance from the surface facing the P-type germanium layer.

Abstract: Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.

Abstract: A TUNNETT (tunneling transit time) electronic device comprising a very thin injector uniformly doped at a high concentration, a thin drift region of lower doping of the same semiconductivity type, and a collector of high doping of the same semiconductivity type. A Schottky barrier is formed by placing a metal electrode on the injector and an ohmic contact may be made on the collector. In a preferred embodiment the injector is made of Ge grown on the drift region by vacuum epitaxy. The drift region is preferably GaAs grown by epitaxy on a GaAs collector.