Abstract: In a heating method for semiconductor devices, gas is filled in a heat chamber in which a heat target (semiconductor device) is mounted, and then the gas is compressed to produce heat. The heat target is heated to a desired temperature by the produced heat. Before the gas compression is performed, the heat target is preferably pre-heated by a heater.

Abstract: An amorphous silicon film is formed on a glass substrate by a CVD method, and then the island regions of the amorphous silicon film is changed to a plurality of polycrystalline silicon regions which are arranged in a line and apart with each other in a predetermined distanced by intermittently irradiating laser pulses each having the same dimensions as those of the island region onto the amorphous silicon film, using a laser beam irradiating section. Switching elements including the island regions as semiconductor regions are formed by etching and film-forming process to constitute a driving circuit section. The section is divided to gate driving circuit sections and source driving circuit sections for driving thin film transistors formed in a pixel region.

Abstract: Disclosed is a process for the formation of a tungsten silicide layer on an integrated circuit structure of a semiconductor wafer mounted on a susceptor in a vacuum chamber, wherein the tungsten silicide layer is applied at a temperature of at least 500.degree. C. and the susceptor has an aluminum nitride surface. After the chamber has been cleaned with one or more fluorine-containing etchant gases, the improvement comprises depositing a layer of tungsten silicide on the surface of the susceptor prior to an initial deposition of tungsten silicide on a wafer mounted on the susceptor after cleaning with the fluorine-containing etchant gases.

Abstract: A suitable inert gas such as argon or a mixture of inert and reactive gases such as argon and hydrogen is introduced onto the backside of wafers being processed in a CVD reactor during the deposition of tungsten or other metals, metal nitrides and silicides, to avoid deposition of material on the backside of the wafers being processed. Each process station includes a gas dispersion head disposed over a platen. A vacuum chuck including a number of radial and circular vacuum grooves in the top surface of the platen is provided for holding the wafer in place. A platen heater is provided under the platen. Backside gas is heated in and about the bottom of the platen, and introduced through a circular groove in the peripheral region outside of the outermost vacuum groove of the vacuum chuck. Backside gas pressure is maintained in this peripheral region at a level greater than the CVD chamber pressure.

Abstract: There is provided a method for bonding at least two semiconductor wafers to each other which comprises the steps of warping one of the semiconductor wafers, bringing the warped semiconductor wafer into contact with the other semiconductor wafer at one contact point, and reducing pressure in an atmosphere surrounding the semiconductor wafers to flatten the warped semiconductor wafer. An apparatus for bonding wafers using the above bonding method comprises a first wafer holder for warping and holding one of two wafers and a second wafer holder for holding the other wafer. First and second covers are attached so as to surround the first and second wafer holders. The apparatus further comprises a shaft for rotating the first and second wafer holders so that one of the wafers contact the other wafer at one contact point and the first and second covers are connected to each other to form a chamber.

Abstract: A processing system for workpieces such as semiconductor wafers is disclosed which incorporates multiple, isolated vacuum stages between the cassette load lock station and the main vacuum processing chambers. A vacuum gradient is applied between the cassette load lock and the main processing chambers to facilitate the use of a very high degree of vacuum in the processing chambers without lengthy pump down times. Separate robot chambers are associated with the vacuum processing chambers and the load lock(s). In addition, separate transport paths are provided between the two robot chambers to facilitate loading and unloading of workpieces. Pre-treatment and post-treatment chambers may be incorporated in the two transport paths.

Abstract: A passivation layer of dielectric material disposed on the top surface of the semiconductor device prevents the metallized patterns on the semiconductor substrate from being exposed to chemical attack. This layer also provides for improved metal electro-migration resistance through the well-known mechanism of grain boundary pinning. The semiconductor device substrate includes a dielectric layer which is disposed along the surface over the electrode metallization. The semiconductor substrate includes metallized regions on top of the dielectric layer which is disposed over the substrate surface and the electrodes thereon. These metallized regions form capacitors to the semiconductor electrodes and capacitively couple electrical input and output signals to the electrodes from external electronic apparatus.

Abstract: The present invention relates to a wafer succeptor apparatus for mouting and heating a semiconductor wafer provided in a reaction chamber of a semiconductor manufacturing apparatus and the like.A wafer succeptor apparatus according to the present invention is characterized by comprising a heat release supporter for supporting and heating a wafer, a dense coating film deposited on said heat release supporter and a gas discharge part provided in said heat release supporter where said supporter is not coated with said dense coating film for removing any impurity gas involved in said heat release supporter.

Abstract: Flatness of atomic-accuracy is achieved in an MBE epitaxial growth process by imparting kinetic energy to atoms absorbed on a substrate by means of irradiation by ion-beam for surface bombardment. Ion-beam surface bombardment may also be used for evaluation. The molecular-beam for epitaxial growth and the ion bombardment for surface energization and surface evaluation may all be operated in a pulse mode and synchronized so that evaluation and growth are conducted alternately while growth and energization are conducted simultaneously.

Abstract: A furnace having a sublimating section, a cracking section oriented off axis to the sublimating section, and a valve for controlling flux between the sections. The valve includes an annular plug having at least one longitudinal slot. The plug is retractable from a fully closed position where the slot is completely covered, to a fully open position where the slot is completely exposed. The slot becomes increasingly exposed as the plug is moved from the fully closed position to the fully opened position, thereby increasing flux from the sublimating section to the cracking section.

Abstract: A chemical vapor deposition apparatus includes a reaction tube, a substrate-holder installed in the reaction tube, the substrate-holder holding a plurality of substrates in a vertical direction, surfaces of the substrates being held horizontally, a rotating-means for rotating the substrate-holder, a heating-means for heating the substrates, a first gas-supply nozzle tube installed vertically in the reaction tube, the first gas-supply nozzle tube having a first vertical gas-emission line of a plurality of first gas-emission holes aligned in a vertical direction, and a second gas-supply nozzle tube installed vertically in the reaction tube, the second gas-supply nozzle tube having a second vertical gas-emission line, a plurality of second gas-emission holes aligned in a vertical direction, a first gas-emitting-axis of the first gas-emission holes intersecting with a second gas-emitting-axis of the second gas-emission holes at a first intersection over the substrate, the first intersection of the first and secon

Abstract: An improved semiconductor device manufacturing system and method is shown. In the system, undesirable sputtering effect can be averted by virtue of a combination of an ECR system and a CVD system. Prior to the deposition according to the above combination, a sub-layer can be pre-formed of a substrate in a reaction chamber and transported to another chamber in which deposition is made according to the combination without making contact with air, so that a junction thus formed has good characteristics.

Abstract: A method of forming a conductive layr includes the steps of performing dry etching of a surface of a substrate in a first chamber maintained in a nonoxidizing atmosphere to remove a natural oxide from the surface of the substrate, transferring the substrate from the first chamber to a second chamber while the nonoxidizing atmosphere is maintained, and forming a refractory metal film on the surface of the substrate by low-pressure CVD in the second chamber.

Abstract: MOVPE growth and photoetching are integrated into a unified sequence which is carried out without removing a workpiece from a MOVPE reactor. Growth may be carried out before, after or before and after the etching.To prevent pattern broadening by diffussion of the active species the substrate is preferably protected by a fugitive coating which is removed by the illumination. Native oxide coatings are particularly suitable for InGaAsP substrates. These are conveniently applied for exposing to substrate to 20.degree./o O.sub.2 +80.degree./oN.sub.2 for about 3 minutes at 450.degree. C.

Abstract: In order, in the epitaxial production of semiconductor products and of articles provided with a layer, to be able to make the junction between the layers applied to the substrates atomically sharp, it is important to be able to change the gas mixture, to be introduced into a pulsed reactor or MBE reactor, rapidly, accurately and without losses in respect of quantity and of composition. To this purpose, each of the gases to be introduced into the reactor is conveyed to a separate gas pipette and thereafter the content of the gas pipette is cyclically passed, by means of a pressure differential, into the pulse reactor, with the composition of the mixture being changed per one or more cycles.

Abstract: A remote plasma enhanced CVD apparatus and method for growing semiconductor layers on a substrate, wherein an intermediate feed gas, which does not itself contain constituent elements to be deposited, is first activated in an activation region to produce plural reactive species of the feed gas. These reactive species are then spatially filtered to remove selected of the reactive species, leaving only other, typically metastable, species which are then mixed with a carrier gas including constituent elements to be deposited on the substrate. During this mixing, the selected spatially filtered reactive species of the feed gas chemically interacts, i.e., partially dissociates and activates, in the gas phase, the carrier gas, with the process variables being selected so that there is no back-diffusion of gases or reactive species into the feed gas activation region. The dissociated and activated carrier gas along with the surviving reactive species of the feed gas then flows to the substrate.

Abstract: A method of manufacturing a semiconductor device, in which method a plurality of epitaxial layers are deposited by molecular beam epitaxy. A significant problem in such a method is the variation in the flux emitted by an effusion cell after the shutter associated with that cell has been opened, this resulting in undesired variations in the composition in the thickness direction of the epitaxial layer being grown. In a method according to the invention, when the shutter of a molecular beam source is opened, the rate of input of heat to that source is increased by a predetermined value so that the temperature of that source does not change substantially as a result of the opening of that shutter, and when the shutter is closed the rate of input of heat to that source is reduced by the predetermined value.

Abstract: A method for annealing semiconductor samples, especially following ion-implantation of semiconductor samples is disclosed. A furnace on a set of rails is passed over the semiconductor sample which is supported on a stationary wire basket made of low thermal mass, fine tungsten wire. The furnace temperature may be about 5.degree. above the desired anneal temperature of the semiconductor sample such that the sample temperature rises to within a few degrees of the furnace temperature within seconds. Utilizing the moveable furnace insures uniform heating without elaborate temperature control or expensive beam generating equipment.The apparatus and process of the present invention are utilized for rapid annealing of ion-implanted indium phosphide semiconductors within 10 to 30 seconds and at temperatures of approximately 700.degree. C., thereby eliminating undesired and damaging movement of impurities within the ion-implanted InP.