Abstract: During the growth of compound semiconductors by epitaxial processes, substrates are typically mounted to a support. In modular beam epitaxy, mounting is done using indium as a solder. This method has two drawbacks: the indium reacts with the substrate, and it is difficult to uniformly wet the back of a large diameter substrate. Both of these problems have been successfully overcome by sputter coating the back of the substrate with a thin layer of tungsten carbide or tungsten carbide and gold. In addition to being compatible with the growth of high quality semiconductor epilayers this coating is also inert in all standard substrate cleaning etchants used for compound semiconductors, and provides uniform distribution of energy in radiant heating.

Abstract: A method of forming a III-V semiconductor on the surface of a substrate which is placed in a vacuum chamber and is heated, by supplying one element of Group III and one element of Group V of the periodic table in the form of atoms or molecules to the surface of the substrate. The supply of the element of Group V is decreased to a small quantity insufficient to form a III-V compound semiconductor at least at one period of the growth of the III-V compound, and the element of Group V in the small quantity and the element of Group III are supplied to the surface of the substrate. This method makes it possible to grow III-V compound epitaxial layers which have a high degree of purity and fewer crystal defects and in which surfaces and the interfaces of the heterojunctions are flat on an atomic scale, at a wide temperature range. The present invention can be used for the fabrication of various optical devices and super-high-speed electronic devices.

Abstract: An injection block having a plurality of geometrically arranged injection sources for gaseous Group III metal organic compounds is oriented substantially perpendicular to the placement of at least one semiconductor wafer substrate within a vacuum reaction chamber. The injector sources are sized to provide disbursing flow of the compounds capable of depositing a layer of about 5% uniform thickness or less over substantially the entire semiconductor wafer. An injection source of Group V compounds is located centrally within the geometrically arranged injection sources for the Group III compounds. The Group V injection source is sized to supply an excess of the Group V compounds required to react with the Group III compounds in order to form Group III-V semiconductor layers on the substrate and partition the Group III sources into groups having substantially equal numbers of injection sources. An excess of Group V comounds is injected.

Abstract: A vertical, enhancement mode InP MISFET includes a conducting n-type substrate, a semi-insulating Fe-doped InP blocking layer on the substrate, a conducting layer formed in the blocking layer, a groove which extends through both the conducting layer and the blocking layer, a borosilicate dielectric layer formed on the walls of the groove, a gate electrode formed on the dielectric layer, drain electrodes formed on each side of the gate electrode, and a source electrode formed on the bottom of the substrate. When a positive gate voltage relative to the source is applied, conduction channels are formed along the sidewalls of the groove, and current flows vertically from drain to source.

Abstract: A method of rapid thermal annealing a wafer of an ion implanted III-V compound semiconductor material by heating the wafer in close proximity to a III-V compound semiconductor wafer coated with a layer of tin or indium. A localized overpressure of the Group V element is produced by the combination of the III and V elements with the tin or indium tending to reduce surface decomposition of the implanted wafer.

Abstract: A method for generating a strip laser in a buried hetero-structure composed of layers, wherein a raised strip is etched out of the layer structure and the strip is laterally etched with an erosion melt. The lateral edges of the laser active layer are protected by leaving them covered with a portion of the layer dissolved out by the erosion melt. The deposits thus remaining are used to initiate the generation of an epitaxial layer which extends laterally from the laser-active layer.

Abstract: In an epitaxial growth method of this invention, a first gas consisting of a hydrogen diluted gas containing a Group V element is continuously flowed on a monocrystalline substrate that is placed in a reaction chamber, the monocrystalline substrate is arranged in a gas mixing region where the first gas and a second gas containing a halogenide of a Group III element are mixed adjacent to the monocrystalline substrate, and a Group III-V compound semiconductor is grown on the monocrystalline substrate.

Abstract: Chemical vapor deposition of III-V and II-VI binary, ternary and quaternary compounds is facilitated by maintaining a relatively high flow rate of reactants and modulating the rate of flow by alternately directing the flow at the high rate into a reactor for use and then directing the flow to a vent. Growth rates of the order of 25 Angstroms per minute were achieved in the epitaxial growth of indium phosphide by flow-rate modulation. This produced crystals of device quality having measured carrier mobilities of 2850-3600. In the case of epitaxial growth of ternary and quaternary compounds, improved control of deposition rates is achieved by applying flow-rate modulation to the compound carriers of each of the Group V and VI elements.

Abstract: A method of producing a heterostructure device comprises defining in a substrate 5 of group III-V semiconductor material a structure, such as a mesa 9, having first and second faces oriented substantially parallel to the (100) and (111)A crystallographic planes. The mesa 9 is exposed to group III-V chemical reagents thereby to deposit group III-V materials on the first and/or second faces in dependence upon the group V constituent in the chemical reagents.

Abstract: A component of semiconductor material deposited by epitaxial growth on a substrate having a predetermined and different lattice parameter consists of an alternate succession of layers of a first type and layers of a second type deposited on the substrate. The lattice parameter of the first type of layers is substantially matched with the lattice parameter of the substrate. In the case of the second type of layers, the lattice parameter is matched and even equal to that of the first type of layers. A component having a lattice parameter equal to that of the second type of layers is formed on the last layer of the second type. Moreover, the energy gaps of the two types of layers are different.

Abstract: A distributed feedback (DFB) type laser and a method and apparatus for forming same wherein a quaternary semiconductor active lasing strip of material is buried between a substrate of binary compound of one type conductivity material and a mesa binary compound body of opposite type conductivity and a periodic grating structure is etched into the plateau of the mesa. In one embodiment, ohmic contacts are provided on either side of the grating structure and the mesa is undercut adjacent the active strip to partly isolate the ohmic contacts from the homojunction formed when the active strip is buried, preferably using a mass-transport process. In another embodiment, the ohmic contacts are formed on the top of a deeply etched grating structure. A buried layer double heterostructure (DH) laser is also described with DFB grating formed on the side walls of the layer. Additionally, a surface emitting diode laser with DFB is described.

Abstract: A semiconductor laser device comprises a substrate (7) formed of p type GaAs, a laser diode portion (10) capable of laser oscillation and a monitor photodiode portion (11) capable of photoelectric conversion formed on substrate (7). The laser diode portion (10) and the monitor photodiode portion (11) are both formed of an epitaxial separating layer (6) of p type AlAs, an epitaxial layer group (23) mainly formed of a material of AlGaAs system and an epitaxial window layer (9) formed on a cleavage plane of this epitaxial layer group (23). The cleavage plane of the epitaxial window layer (9) on the side of the laser diode portion (10) constitutes a laser resonator plane (16) for laser light output of said laser diode portion (10) while the cleavage plane of the epitaxial window layer (9) on the monitor photodiode portion (11) constitutes a light receiving plane (17) for receiving the laser light outputted from the laser resonator plane (16).

Abstract: This absorbant is of the type formed by superlattice constituted by a stack of films of two different semiconductor materials having gaps of different heights. Thus, a potential well is produced in each film corresponding to the semiconductor with the smallest gap and a potential barrier in each film corresponding to the semiconductor with the largest gap. This saturatable absorbant is characterized in that the films corresponding to the semiconductor with the smallest gap have a thickness, which can assume two values, one small and the other large.Application in optics to the production of mode locking lasers and all optical logic gates.

Abstract: A mass transport process for use in the manufacture of semiconductor devices, particularly but not exclusively low threshold semiconductor lasers in the InP/InGaAsP system, involves the arrangement of a cover wafer (18) of the material to be grown adjacent to a semiconductor wafer (15) on which the material is to be grown, their disposition together with a crystalline alkali halide (20) in a crucible (16), and heating the crucible, which is almost but not completely sealed, in a hydrogen stream.For the manufacture of InP/InGaAsP lasers and the growth of InP, the alkali halide may comprise KI, RbI or CsI and a controlled amount of In metal (21) may be optionally contained in the crucible (16) to control the balance between growth of InP for defining the laser active region and erosion of InP from other areas of the wafer. Growth is achieved at temperatures comparable with liquid phase epitaxy processing temperatures.

Abstract: The superlattice type semiconductor material has a multilayered structure of first layers of semiconductor containing impurities and having a thickness thinner than electron or hole wavelength and second layers of semiconductor free from impurities or insulator having such a thickness that electrons or holes may penetrate by tunneling effect, the first and second layers being alternately piled. Electrons or holes distribute uniformly over the entire of the multilayered structure to show a property of uniform semiconductor material.

Abstract: An epitaxially grown high resistivity crystalline layer of gallium arsenide is produced in a reactor vessel with a predetermined amount of carbon dioxide introduced during growth of the high resistivity gallium arsenide (GaAs) crystalline layer to provide carbon as a dopant. Thus, a plurality of carbon atoms is provided in the crystal, such carbon atoms having electrons at energy levels between a valance energy band and a conduction energy band of the GaAs crystal. With these energy levels, the carbon atoms are substantially ionized at room temperature by accepting a plurality of electrons from the valance band of the GaAs. The presence of these carbon ions in the crystal compensates for a stoichiometric defect which occurs during epitaxial growth of the GaAs crystalline layer. This results in a high resistivity layer which provides a buffer layer between a GaAs substrate and an active GaAs layer.

Abstract: A heterojunction bipolar transistor having an n- type epitaxial indium phosphide collector layer grown on a semi-insulating indium phosphide substrate with an n+ buried layer, a p- type indium phosphide base and an epitaxial, n- type boron phosphide wide gap emitter. The p- type base region is formed by ion implantation of magnesium ions into the collector layer. The transistor is applicable to millimeter wave applications due to the high electron mobility in the indium phosphide base. The wide gaps of both the boron phosphide (2.2 eV) and indium phosphide (1.34 eV) permit operation up to 350.degree. C. The transistor is easily processed using metal organic-chemical vapor deposition (MO-CVD) and standard microelectronic techniques.