Laser Anneal Patents (Class 148/DIG90)
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Patent number: 5804471Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.Type: GrantFiled: June 3, 1996Date of Patent: September 8, 1998Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Takenouchi, Yasuhiko Takemura
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Patent number: 5773309Abstract: A method for fabricating amorphous silicon thin film transistors (TFTs) with a polycrystalline silicon surface channel region for enhanced forward current drive. The method is particularly adapted for producing top-gate silicon TFTs which have the advantages of both amorphous and polycrystalline silicon TFTs, but without problem of leakage current of polycrystalline silicon TFTs. This is accomplished by selectively crystallizing a selected region of the amorphous silicon, using a pulsed excimer laser, to create a thin polycrystalline silicon layer at the silicon/gate-insulator surface. The thus created polysilicon layer has an increased mobility compared to the amorphous silicon during forward device operation so that increased drive currents are achieved. In reverse operation the polysilicon layer is relatively thin compared to the amorphous silicon, so that the transistor exhibits the low leakage currents inherent to amorphous silicon.Type: GrantFiled: August 7, 1995Date of Patent: June 30, 1998Assignee: The Regents of the University of CaliforniaInventor: Kurt H. Weiner
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Patent number: 5766989Abstract: A method for forming a polycrystalline semiconductor thin film according to the present invention includes the steps of: forming a semiconductor thin film partially containing microcrystals serving as crystal nuclei for polycrystallization on an insulating substrate; and polycrystallizing the semiconductor thin film by laser annealing.Type: GrantFiled: December 27, 1995Date of Patent: June 16, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeki Maegawa, Mamoru Furuta, Hiroshi Tsutsu, Tetsuya Kawamura, Yutaka Miyata
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Patent number: 5756364Abstract: It is intended to provide a technique of separately forming thin-film transistors disposed in a peripheral circuit area and those disposed in a pixel area in accordance with characteristics required therefor in a manufacturing process of semiconductor devices to constitute a liquid crystal display device. In an annealing step by laser light illumination, laser light is selectively applied to a semiconductor thin-film by partially masking it. For example, to illuminate the peripheral circuit area and the pixel area with laser light under different conditions in manufacture of an active matrix liquid crystal display device, laser light is applied at necessary illumination energy densities by using a mask. In this manner, a crystalline silicon film having a necessary degree of crystallinity in a selective manner can be obtained.Type: GrantFiled: November 22, 1995Date of Patent: May 26, 1998Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Koichiro Tanaka, Naoaki Yamaguchi
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Patent number: 5750443Abstract: Disclosed is a method of manufacturing a semiconductor device wherein a corpuscular beam is radiated to a semiconductor substrate to create crystal defects therein. The semiconductor substrate is subjected to a heat treatment, e.g. for 1 second to 60 minutes, wherein rapid heating-up, e.g. raising temperature to 550.degree. to 850.degree. C. within 10 minutes, is done in a process prior to that of carrying out of the radiation with a corpuscular beam. By doing so, there is provided a semiconductor device which is free from degradation in electrical characteristics such as current amplification factor and has an increased switching speed, even where crystal defects are created through the radiation of corpuscular beam such as an electron beam to shorten the carrier lifetime. Thus, the inventive semiconductor device is satisfied by both requirements of switching speed and electrical characteristic.Type: GrantFiled: March 3, 1997Date of Patent: May 12, 1998Assignee: Rohm Co., Ltd.Inventor: Kazuhisa Sakamoto
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Patent number: 5643801Abstract: A laser processing process which includes laser annealing a silicon film 2 .mu.m or less in thickness by irradiating a laser beam 400 nm or less in wavelength and being operated in pulsed mode with a pulse width of 50 nsec or more and preferably, 100 nsec or more. The invention further relates to a laser processing apparatus which includes a laser generation device and a stage for mounting thereon a sample provide separately from said device, to thereby prevent transfer of vibration attributed to the movement of the stage to the laser generation device and the optical system. A stable laser beam can be obtained to thereby improve productivity.Type: GrantFiled: August 4, 1995Date of Patent: July 1, 1997Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroaki Ishihara, Kazuhisa Nakashita, Hideto Ohnuma, Nobuhiro Tanaka, Hiroki Adachi
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Patent number: 5593918Abstract: Various techniques for forming superconductive lines are described whereby superconductive lines can be formed by stamping, etching, polishing, or by rendering selected areas of a superconductive film (layer) non-superconductive. The superconductive material can be "perfected" (or optimized) after it is formed into lines (traces). In one embodiment, trenches are etched in a substrate, the trenches are filled with superconductive material, and any excess superconductive material overfilling the trenches is removed, such as by polishing. In another embodiment, superconductive lines are formed by rendering selected areas of a superconductive layer (i.e., areas other than the desired superconductive lines) non-superconductive by "damaging" the superconductive material by laser beam heating, or by ion implantation. Superconductive lines formed according to the invention can be used to protect semiconductor devices (e.g.Type: GrantFiled: April 22, 1994Date of Patent: January 14, 1997Assignee: LSI Logic CorporationInventors: Michael D. Rostoker, Mark Schneider, Nicholas F. Pasch, Abraham Yee, William C. Schneider
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Patent number: 5591668Abstract: A laser annealing method for a semiconductor thin film for irradiating the semiconductor thin film with a laser beam having a section whose outline includes a straight-line portion, so as to change the crystallinity of the semiconductor thin film is provided, wherein the semiconductor thin film is overlap-irradiated with the laser beam while the laser beam is shifted in a direction different from a direction along the straight-line portion. A thin film semiconductor device fabricated by use of the laser annealing method is also provided.Type: GrantFiled: March 13, 1995Date of Patent: January 7, 1997Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeki Maegawa, Tetsuya Kawamura, Mamoru Furuta, Yutaka Miyata
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Patent number: 5587330Abstract: In producing a top gate type insulated gate semiconductor device in which a non-single crystalline semiconductor layer is used to form a channel forming region, after a gate electrode is formed on the non-single crystalline semiconductor layer through a gate insulating film, while ultraviolet light is irradiated to the non-single crystalline semiconductor layer, heating treatment is performed at a temperature of from 300.degree. to 600.degree. C. in an atmosphere containing nitrogen oxide or hydrogen nitride, in order to neutralize a recombination center in the non-single crystalline film or a boundary between the non-single crystalline film and the gate insulating film.Type: GrantFiled: October 18, 1995Date of Patent: December 24, 1996Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 5580801Abstract: A thin film on a substrate is patterned so as to include an area in which a thin film transistor is to be formed and an area of another patterned thin film or a semiconductor device, and so as to have a size larger than the total size of the areas. Next, the patterned thin film is annealed. After the annealing, a part of the inside area of the patterned thin film is patterned. The part of the thin film is used for forming a thin film transistor.Type: GrantFiled: August 30, 1994Date of Patent: December 3, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeki Maegawa, Tatsuo Yoshioka, Tetsuya Kawamura, Yutaka Miyata
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Patent number: 5569624Abstract: A doping sequence that reduces the cost and complexity of forming source/drain regions in complementary metal oxide silicon (CMOS) integrated circuit technologies. The process combines the use of patterned excimer laser annealing, dopant-saturated spin-on glass, silicide contact structures and interference effects creates by thin dielectric layers to produce source and drain junctions that are ultrashallow in depth but exhibit low sheet and contact resistance. The process utilizes no photolithography and can be achieved without the use of expensive vacuum equipment. The process margins are wide, and yield loss due to contact of the ultrashallow dopants is eliminated.Type: GrantFiled: June 5, 1995Date of Patent: October 29, 1996Assignee: Regents of the University of CaliforniaInventor: Kurt H. Weiner
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Method of forming polycrystalline silicon layer on substrate by large area excimer laser irradiation
Patent number: 5529951Abstract: A method of forming a polycrystalline silicon thin film improved in crystallinity and a channel of a transistor superior in electrical characteristics by the use of such a polycrystalline silicon thin film. An amorphous silicon layer of a thickness preferably of 30 nm to 50 nm is formed on a substrate. Next, substrate heating is performed to set the amorphous silicon layer to preferably 350.degree. C. to 500.degree. C., more preferably 350.degree. C. to 450.degree. C. Then, at least the amorphous silicon layer is irradiated with laser light of an excimer laser energy density of 100 mJ/cm.sup.2 to 500 mJ/cm.sup.2, preferably 280 mJ/cm.sup.2 to 330 mJ/cm.sup.2, and a pulse width of 80 ns to 200 ns, preferably 140 ns to 200 ns, so as to directly anneal the amorphous silicon layer and form a polycrystalline silicon thin film. The total energy of the laser used for the irradiation of excimer laser light is at least 5 J, preferably at least 10 J.Type: GrantFiled: November 1, 1994Date of Patent: June 25, 1996Assignee: Sony CorporationInventors: Takashi Noguchi, Tohru Ogawa, Yuji Ikeda -
Patent number: 5529630Abstract: An amorphous silicon film is formed on a glass substrate by a CVD method, and then the island regions of the amorphous silicon film is changed to a plurality of polycrystalline silicon regions which are arranged in a line and apart with each other in a predetermined distanced by intermittently irradiating laser pulses each having the same dimensions as those of the island region onto the amorphous silicon film, using a laser beam irradiating section. Switching elements including the island regions as semiconductor regions are formed by etching and film-forming process to constitute a driving circuit section. The section is divided to gate driving circuit sections and source driving circuit sections for driving thin film transistors formed in a pixel region.Type: GrantFiled: February 9, 1995Date of Patent: June 25, 1996Assignee: Tokyo Electron LimitedInventors: Issei Imahashi, Kiichi Hama, Jiro Hata
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Patent number: 5496768Abstract: In the first laser beam radiation, a laser beam having a predetermined energy density is scanned on each of predetermined unit irradiated regions at a scanning pitch smaller than the beam size, and in the second laser beam radiation, a laser beam having an energy density lower than that of the laser beam of the first radiation is scanned at a scanning pitch smaller than the beam size on each of unit irradiated regions different from those of the first laser beam radiation.Type: GrantFiled: November 23, 1994Date of Patent: March 5, 1996Assignee: Casio Computer Co., Ltd.Inventor: Toshio Kudo
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Patent number: 5424230Abstract: An amorphous silicon hydride thin film is deposited on an insulating body by a plasma CVD method, and is then heated for dehydrogenating the amorphous silicon thin film so that a dehydrogenated amorphous silicon thin film containing hydrogen of 3 atomic % or less is formed. The insulating body may be an insulating substrate (such as a glass substrate) alone, or a combination of an insulating substrate with an intermediate insulating base layer thereon. Impurity ions are injected into the dehydrogenated amorphous silicon hydride thin film to form source and drain regions. Excimer laser beams are applied to the dehydrogenated amorphous silicon thin film, thereby polycrystallizing the amorphous silicon thin film into a polysilicon thin film and activating the injected impurity ions.Type: GrantFiled: July 29, 1994Date of Patent: June 13, 1995Assignee: Casio Computer Co., Ltd.Inventor: Haruo Wakai
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Patent number: 5413958Abstract: An amorphous silicon film is formed on a glass substrate by a CVD method, and then the island regions of the amorphous silicon film is changed to a plurality of polycrystalline silicon regions which are arranged in a line and apart with each other in a predetermined distanced by intermittently irradiating laser pulses each having the same dimensions as those of the island region onto the amorphous silicon film, using a laser beam irradiating section. Switching elements including the island regions as semiconductor regions are formed by etching and film-forming process to constitute a driving circuit section. The section is divided to gate driving circuit sections and source driving circuit sections for driving thin film transistors formed in a pixel region.Type: GrantFiled: November 16, 1993Date of Patent: May 9, 1995Assignee: Tokyo Electron LimitedInventors: Issei Imahashi, Kiichi Hama, Jiro Hata
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Patent number: 5409857Abstract: An integrated circuit is formed thereof a conductive wiring pattern. On the conductive wiring semiconductor layer is directly formed in a form of amorphous on the substrate. The amorphous semiconductor layer is annealed to form a polycrystalline structure while avoiding influence of annealing heat for the substrate. In the polycrystalline semiconductor layer is formed a semiconductor element, such as MOS transistor, MIS transistor, TFT and so forth. The semiconductor element is directly connected to the wiring pattern on the substrate.Type: GrantFiled: September 7, 1989Date of Patent: April 25, 1995Assignee: Sony CorporationInventors: Seiichi Watanabe, Setsuo Usui
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Patent number: 5387546Abstract: The present invention relates to a method for manufacturing a semiconductor device including a method for reforming an insulating film formed by a low temperature CVD method. It is an object of the present Invention to provide a method for manufacturing a semiconductor device capable of improving a film quality of an insulating film formed by a CVD method which is able to form a film at a low temperature and also capable of maintaining mass productivity, in which processing by irradiation with ultraviolet rays of the insulating film while heating the film after forming an insulating film (4) on a body to be formed by a chemical vapor deposition method is included.Type: GrantFiled: June 22, 1992Date of Patent: February 7, 1995Assignees: Canon Sales Co., Inc., Alcan-Tech Co., Ltd., Semiconductor Process Laboratory Co., Ltd.Inventors: Kazuo Maeda, Noboru Tokumasu, Yuko Nishimoto
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Patent number: 5382548Abstract: A method for making a polycrystalline silicon (p-Si) thin film by heat treating an amorphous silicon (a-Si) thin film using a laser beam, including the steps of forming an a-Si thin film over a substrate, forming a metal reflection film over the a-Si thin film, forming, in the metal reflection film, windows each having a width smaller than the width of the regular strong energy portion of laser beam, annealing the portions of a-Si thin film disposed beneath the windows using a laser beam, removing the remaining portions of metal reflection film, each having a width smaller than the width of the regular strong energy portion of laser beam, to expose the portions of a-Si thin film disposed beneath the remaining portions of metal reflection film, and annealing the thus exposed portions of a-Si thin film disposed beneath the remaining portions of metal reflection film.Type: GrantFiled: December 30, 1992Date of Patent: January 17, 1995Assignee: Samsung Electronics Co., Ltd.Inventor: Jae W. Lee
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Patent number: 5366926Abstract: A low temperature process for dehydrogenating amorphous silicon using lasers. Dehydrogenation occurs by irradiating one or more areas of a hydrogenated amorphous silicon layer with laser beam pulses at a relatively low energy density. After the multiple laser pulse irradiation at a relatively low energy density, the laser energy density is increased and multiple irradiation at a higher energy density is performed. If after the multiple irradiation at the higher energy density the amorphous silicon hydrogen content is still too high, dehydrogenation proceeds by multiple irradiations at a yet higher energy density. The irradiation at the various energy densities can result in the formation of polysilicon due to melting of the amorphous silicon layer. As irradiation may be selectively applied to the amorphous silicon, an integral amorphous silicon-polysilicon structure may be formed.Type: GrantFiled: June 7, 1993Date of Patent: November 22, 1994Assignee: Xerox CorporationInventors: Ping Mei, James B. Boyce, Richard I. Johnson, Michael G. Hack, Rene A. Lujan
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Patent number: 5328861Abstract: An amorphous semiconductor layer is deposited on an insulating substrate, and an excimer laser is radiated thereon, and thus the amorphous is crystallized. A silicon oxide layer is deposited on the semiconductor layer, and a silicon nitride layer is deposited on the silicon oxide layer to be thicker than the silicon oxide layer. Thereafter, a gate electrode is formed on the silicon nitride layer. Thus, there is provided a method for a thin film transistor having a good mobility of carriers and a good characteristic of a breakdown voltage in that a gate insulating film is formed of a double-layer structure having the silicon oxide and silicon nitride layers.Type: GrantFiled: October 29, 1992Date of Patent: July 12, 1994Assignee: Casio Computer Co., Ltd.Inventor: Tatsuya Miyakawa
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Patent number: 5304357Abstract: An apparatus for zone melting a thin semiconductor film comprises an first laser for heating the thin semiconductor film, at least one additional laser for heating an insulating substrate, a first temperature detecting device for detecting the temperature of a melted portion of the thin semiconductor film, and a second temperature detecting device for detecting the temperature of a solidified portion of the thin semiconductor film. The apparatus further comprises a first controller for controlling an output of the first laser so as to maintain the temperature of the melted portion in a first predetermined temperature range, and a second controller for controlling an output of the additional laser so as to maintain the temperature of the solidified portion in a second predetermined temperature range.Type: GrantFiled: May 8, 1992Date of Patent: April 19, 1994Assignee: Ricoh Co. Ltd.Inventors: Yukito Sato, Mitsugu Irinoda, Kouichi Ohtaka, Takeshi Hino, Masafumi Kumano
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Patent number: 5296405Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, a semiconductor layer is formed and then undergoes photo annealing. A neutralizer is then introduced to the photoannealed semiconductor. The semiconductor thus formed demonstrates the SEL effect instead of the Staebler-Wronski effect.Type: GrantFiled: August 24, 1992Date of Patent: March 22, 1994Assignee: Semiconductor Energy Laboratory Co.., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 5229322Abstract: An inexpensive and reliable technique for forming connections to a substrate or buried layer of a semiconductor structure employs a laser to melt a small, selected region of a lightly doped layer and a highly doped underlying layer. Extremely rapid diffusion of impurities and mixing of materials within the liquid phase of the melt quickly creates a uniformly doped conductive region when the melt is allowed to recrystallize.Type: GrantFiled: December 5, 1991Date of Patent: July 20, 1993Assignee: International Business Machines CorporationInventors: Shao-Fu S. Chu, Kyong-Min Kim, Shaw-Ning Mei, Mary J. Saccamango, Donald R. Vigliotti, Robert J. von Gutfeld
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Patent number: 5221365Abstract: A thin film transistor and a photovoltaic cell wherein a polycrystalline semiconductive film, having a large grain size and high carrier mobility obtained by heat treatment of a polycrystalline semiconductive film, an amorphous semiconductive film, a microcrystalline semiconductive film or the like on a substrate with a textured surface, is used as a channel layer or a photo-activation layer, the textured surface being formed by etching one surface of the substrate or forming a textured thin film on the substrate.A method of manufacturing a polycrystalline semiconductive film, wherein a surface of a substrate is etched or a textured thin film is formed on the substrate to form a textured surface, and a polycrystalline semiconductive film, an amorphous semiconductive film, a microcrystalline semiconductive film or the like is formed on the textured surface, and the semiconductive film is polycrystallized by heat treatment.Type: GrantFiled: October 18, 1991Date of Patent: June 22, 1993Assignee: Sanyo Electric Co., Ltd.Inventors: Shigeru Noguchi, Hiroshi Iwata, Keiichi Sano
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Patent number: 5215939Abstract: In a method of manufacturing a planar buried heterojunction laser, after etching to delimit a laser stripe in relief on a substrate, lateral layers to surround the stripe are formed by a non-selective growth method not only at the sides of the stripe but also above it to create a parasitic projection. This projection is then removed after separation from the substrate by selective attack of a lift-off stripe which was deposited for this purpose above the stripe prior to this etching. Passages are formed for the attack medium used for this purpose. The invention can be applied in particular to the manufacture of fiber optic transmission systems.Type: GrantFiled: February 6, 1992Date of Patent: June 1, 1993Assignee: Alcatel N.V.Inventors: Leon Goldstein, Dominique Bonnevie, Francois Brillouet, Francis Poingt, Jean-Louis Lievin
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Patent number: 5171710Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, a semiconductor layer is formed and then undergoes photo annealing. A neutralizer is then introduced to the photoannealed semiconductor. The semiconductor thus formed demonstrates the SEL effect instead of the Staebler-Wronski effect.Type: GrantFiled: May 9, 1990Date of Patent: December 15, 1992Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 5122223Abstract: Improvements to graphoepitaxy include use of irradiation by electrons, ions or electromagnetic or acoustic radiation to induce or enhance the influence of artificial defects on crystallographic orientation; use of single defects; and use of a relief structure that includes facets at 70.5 and/or 109.5 degrees.Type: GrantFiled: December 10, 1984Date of Patent: June 16, 1992Assignee: Massachusetts Institute of TechnologyInventors: Michael W. Geis, Dale C. Flanders, Henry I. Smith
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Patent number: 5094977Abstract: A method of processing a semiconductor wafer comprises, a) chemical vapor depositing (CVD) a metal layer atop a semiconductor substrate; and b) impinging laser energy upon the CVD metal layer at an optical fluence of from 0.05 Joules/cm.sup.2 to 0.30 Joules/cm.sup.2 for a period of time sufficient to relieve mechanical stress associated with the CVD metal layer yet insufficient to melt the CVD metal layer. In accordance with another aspect of the invention, such treatment method could also be used to form a desired silicide layer in the same step.Type: GrantFiled: January 25, 1991Date of Patent: March 10, 1992Assignee: Micron Technology, Inc.Inventors: Chang Yu, Trung T. Doan, Gurtej S. Sandhu
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Patent number: 5077233Abstract: A random layout of devices, or at least active regions of devices, is achieved in fabricating semiconductor integrated circuits based on SOI technology using an anti-reflecting film. Windows are opened in the anti-reflecting film at positions corresponding to preselected regions of the semiconductor layer in which corresponding devices are to be formed, thereby to expose at least the surface area of each preselected region corresponding to the active region of the device to be formed therein. For each window, an energy beam substantially uniformly irradiates the exposed surface area including a portion of the anti-reflecting film bordering the window, sufficiently to heat the semiconductor layer and recrystallize the region thereof corresponding to the exposed surface area to a single crystalline form, free of grain boundaries. Self-aligned single crystal regions thus are fabricated in the polycrystalline silicon layer at the respective predetermined device regions.Type: GrantFiled: April 23, 1990Date of Patent: December 31, 1991Assignee: Fujitsu LimitedInventor: Ryoichi Mukai
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Patent number: 5008211Abstract: An improved FET is disclosed. The transistor is characterized in that its channel is constituted in the form of a super lattice. The super lattice structure provides a number of square well potential areas through which carriers can pass with little interaction with the gate insulating film.Type: GrantFiled: September 14, 1989Date of Patent: April 16, 1991Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 4992393Abstract: A method for producing a semiconductor thin film by melt and recrystallization process. At least one recess is formed in a stacked layered structure including a semiconductor thin film layer. The recess has an arrow head shape seen from a surface side of the layered structure. The apex of the arrow head shape is oriented to a forward direction on a scanning line. The surface of the layered structure is covered with a cooling medium so that the recess is filled with the cooling medium. An energy beam is irradiated to the layered structure through the cooling medium to scan the structure along the scanning line so as to melt the semiconductor thin film and after that the semiconductor is cooled and recrystallized to form a single crystal structure therein.Type: GrantFiled: May 25, 1990Date of Patent: February 12, 1991Assignee: Ricoh Company, Ltd.Inventors: Daisuke Kosaka, Junichi Konishi
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Patent number: 4988634Abstract: An improved FET is disclosed. The transistor is characterized in that its channel is constituted in the form of a super lattice. The super lattice structure provides a number of square well potential areas through which carriers can pass with little interaction with the gate insulating film.Type: GrantFiled: April 16, 1990Date of Patent: January 29, 1991Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 4963503Abstract: A liquid crystal display device comprises, a plurality of display electrodes which are selectively energized through on-off control of thin film transistors. In order to reduce the channel length of the thin film transistors to increase operation speed and obtain uniform characteristics each display electrode and an associated transistor source electrode is formed on one of a pair of transparent substrates of the liquid crystal display device, a semiconductor layer is formed between the display electrode and source electrode, a gate insulating film is formed on the semiconductor layer, and a gate electrode is formed on a portion of the gate insulating film between the display electrode and source electrode. Then, ions are implanted into the semiconductor layer with the gate electrode used as a mask, thus rendering portions of the semiconductor layer contiguous to the display electrode and source electrode into ohmic layers.Type: GrantFiled: March 29, 1989Date of Patent: October 16, 1990Assignee: Hosiden Electronics Co., Ltd.Inventors: Shigeo Aoki, Yasuhiro Ugai, Katsumi Miyake, Kotaro Okamoto
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Patent number: 4957880Abstract: In the production method of a semiconductor device, a connection layer is formed on an insulating layer according to two steps of irradiating, in the atmosphere of a reaction gas, a region in which the connection layer is to be formed selectively by light having a wavelength in a range of from 200 to 1000 nm, and depositing selectively a connection layer forming substrate by a CVD method in the light irradiated region until a desired thickness of the substance is obtained.Type: GrantFiled: April 28, 1989Date of Patent: September 18, 1990Assignee: Kabushiki Kaisha ToshibaInventors: Hitoshi Itoh, Takahiko Moriya
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Patent number: 4931353Abstract: In a multi-chip module, a structure for selectively connecting two conductors. A switchable connector (36) is disposed between a first and second portion (30,32) of a copper conductor (28). The switchable connector comprises an amorphous silicon layer (58), which extends between two spacer pads (56) that are electrically connected to the first and second portions of the copper conductor. A barrier layer (60) is formed atop the amorphous silicon, physically separating it from a reactive metal layer (62). The reactive metal layer is coated with an antireflective coating (64). Interaction of the reactive metal layer with the amorphous silicon layer is prevented by the barrier layer until the barrier layer is heated above 500.degree. C. A laser beam (66) is focused on opposite edges of the switchable connector, causing the barrier layer and reactive metal layer to diffuse into the amorphous silicon, forming electrically conductive silicides.Type: GrantFiled: November 22, 1989Date of Patent: June 5, 1990Assignee: The Boeing CompanyInventor: Minas H. Tanielian
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Patent number: 4915980Abstract: A method metallurgically bonds a thin film of easily amorphized material on a metallic substrate having a large thermal conductivity, and then irradiates all or selected portions of the thin film with a pulse laser. The irradiated portions become amorphous by rapidly heating and cooling. Therefore, a whole surface which is an amorphous layer or a part of a surface which is an amorphous layer is obtained. In the latter, a porous amorphous metal layer is obtained by subsequent acid elution and by removing the non-amorphous part.Type: GrantFiled: July 12, 1989Date of Patent: April 10, 1990Assignee: Kuroki Kogyosho Co., Ltd.Inventors: Akira Matsunawa, Seiji Katayama, Takanori Kuroki
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Patent number: 4871690Abstract: Different diffusion rates can be made operative relative to diffusion disordering in designated areas of a thin active layer or of quantum well feature compared to thermal disordering in other areas thereof where disordering is not desired by the selective placement of migratory defects in a semiconductor support means, such as a semiconductor substrate or semiconductor support layer for supporting subsequently epitaxially deposited semiconductor layers. Such migratory defects as used herein are intended to include impurities and/or other lattice defects initially introduced into the semiconductor support means prior to epitaxial deposition of semiconductor layers constituting the semiconductor structure, wherein at least one of such layers comprises a thin active layer (i.e.Type: GrantFiled: January 27, 1988Date of Patent: October 3, 1989Assignee: Xerox CorporationInventors: Nick Holonyak, Jr., Robert D. Burnham
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Patent number: 4870031Abstract: In a method of manufacturing a semiconductor device comprising melting an amorphous or polycrystalline first semiconductor layer formed on the surface of a first dielectric layer by irradiating energy rays thereon, and converting the same into single crystals by the subsequent lowering of the temperature and forming a second dielectric layer and a second semiconductor layer on the first semiconductor layer. Energy rays are irradiated under the condition capable of melting the first semiconductor layer through the second semiconductor layer and the second dielectric layer and, after the completion of the conversion into single crystals, the second semiconductor layer and the second dielectric layer are eliminated through etching.Type: GrantFiled: September 30, 1987Date of Patent: September 26, 1989Assignee: Kozo Iizuka, Director General, Agency of Industrial Science and TechnologyInventors: Kazuyuki Sugahara, Tadashi Nishimura, Shigeru Kusunoki, Yasuo Inoue
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Patent number: 4843032Abstract: A semiconductor optical element having a layer which exhibits a function of diffraction grating between a first cladding layer and a second cladding layer, wherein the layer which exhibits the function of diffraction grating consists of a superlattice layer in which crystal layers are periodically mixed to constitute a semiconductor grating layer.Type: GrantFiled: June 30, 1988Date of Patent: June 27, 1989Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yasunori Tokuda, Kenzo Fujiwara
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Patent number: 4837182Abstract: A method of producing sheets of crystalline material is disclosed, as well as devices employing such sheets. In the method, a growth mask is formed upon a substrate and crystalline material is grown at areas of the substrate exposed through the mask and laterally over the surface of the mask to form a sheet of crystalline material. This sheet is optionally separated so that the substrate can be reused. The method has particular importance in forming sheets of crystalline semiconductor material for use in solid state devices.Type: GrantFiled: December 4, 1987Date of Patent: June 6, 1989Assignee: Massachusetts Institute of TechnologyInventors: Carl O. Bozler, John C. C. Fan, Robert W. McClelland
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Patent number: 4834809Abstract: A semiconductor substrate includes: a first monocrystalline semiconductive layer formed on the surface of a crystalline silicon substrate with the intervension of a first insulation film; a second insulation film set to the upper surface of the first monocrystalline semiconductive layer and provided with a plurality of apertures each having a specific pattern; and a second monocrystalline semiconductive layer which is epitaxially grown by the seed crystallization process and provided with the same crystalline characteristics as that of the first monocrystalline semiconductive layer.Accordingly, the preferred embodiment of the present invention provides an extremely useful semiconductor substrate which easily isolates the elements of semiconductor devices between layers of insulating film described above.Type: GrantFiled: September 9, 1987Date of Patent: May 30, 1989Assignee: Sharp Kabushiki KaishaInventor: Yoshinobu Kakihara
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Patent number: 4822752Abstract: Disclosed herein is a process for producing a single crystal layer of a semiconductor device, which comprises the steps of providing an oxide insulator layer separated by an opening part for seeding, on a major surface of a single crystal semiconductor substrate of the cubic system, providing a polycrystalline or amorphous semiconductor layer on the entire surface of the insulator layer inclusive of the opening part, then providing a protective layer comprising at least a reflective or anti-reflection film comprising strips of a predetermined width, in a predetermined direction relative to the opening part and at a predetermined interval, the protective layer capable of controlling the temperature distributions in the semiconductor layer at the parts corresponding to the stripes or the parts not corresponding to the stripes, thereby completing a base for producing a semiconductor device, thereafter the surface of the base is irradiated with an energy beam through the striped reflective or anti-reflection filmType: GrantFiled: March 6, 1987Date of Patent: April 18, 1989Assignee: Agency of Industrial Science and TechnologyInventors: Kazuyuki Sugahara, Tadashi Nishimura, Shigeru Kusunoki, Yasuo Inoue
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Patent number: 4808546Abstract: Of an amorphous Si film, a region to be formed into a lowly doped region such as the channel region of an MOS transistor is covered with a mask and an uncovered region is doped with an impurity. After this, the amorphous Si film is annealed and turned to signal crystal through solid phase epitaxial growth, and the mask itself is used as the electrode of a semiconductor device. By this impurity doping, a large-sized single-crystal Si film can be formed, and the impurity doping can be conducted in self-alignment with the electrode formation to produce a highly integrated semiconductor circuit.Type: GrantFiled: February 2, 1987Date of Patent: February 28, 1989Assignee: Hitachi, Ltd.Inventors: Masahiro Moniwa, Masanobu Miyao, Shoji Shukuri, Eiichi Murakami, Terunori Warabisako, Masao Tamura, Nobuyoshi Natsuaki, Kiyonori Ohyu, Tadashi Suzuki, Yuuichi Madokoro, Yasuo Wada
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Patent number: 4764476Abstract: A method of making a photoelectric conversion device with a substrate having an insulating surface, and a plurality n of non-single crystal semiconductor photoelectric conversion elements U.sub.1 to U.sub.n sequentially formed side by side on the substrate and connected in series one after another, which eliminates leakage between electrodes and attains a high photoelectric conversion efficiency. The active portion of each element U.sub.1 to U.sub.n is selectively annealed by light irradiation to increase its crystallinity, hence conductivity. The intercell coupling portion has a high resistance to current leakage.Type: GrantFiled: May 19, 1987Date of Patent: August 16, 1988Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 4706376Abstract: A method for manufacturing a semiconductor photoelectric conversion device including forming a first impurity doped non-single crystal semiconductor layer of a first conductivity type on a substrate; forming an intrinsic non-single crystal semiconductor layer on the first semiconductor layer; forming a second impurity doped non-single crystal second conductivity layer type opposite to the first conductivity type on the intrinsic layer; irradiating the outer surface of the second impurity doped semiconductor layer with light energy of suitable wavelength which is effective to selectively crystallize the second impurity doped layer; irradiating the outer surface of the second impurity doped semiconductor layer with light energy of suitable wavelength which is effective to selectively crystallize the intrinsic semiconductor layer, whereby only the portion of the intrinsic semiconductor layer adjacent the impurity doped semiconductor layer is crystallized.Type: GrantFiled: November 18, 1986Date of Patent: November 17, 1987Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shumpei Yamazaki, Susumu Nagayama
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Patent number: 4672740Abstract: A semiconductor device having contact windows between an aluminum or aluminum-alloy wiring layer and a diffused region in a semiconductor substrate, in which the contacts are formed by using a barrier film on a refractory metal silicide between the wiring layer and the diffused region. The barrier film comprising the refactory metal and silicon is beam annealed for a short period of time such as, 10 seconds or less, so that adverse effects of the barrier film can be prevented while an excellent electrical or ohmic contact between the wiring layer and the diffused layer can be obtained.Type: GrantFiled: August 28, 1984Date of Patent: June 16, 1987Assignee: Fujitsu LimitedInventors: Kazunari Shirai, Hajime Kamioka, Shigeyoshi Koike
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Patent number: 4657603Abstract: A method for the manufacture of gallium arsenide thin film solar cells on inexpensive substrate material whereby an intermediate layer of highly doped, amorphous germanium is employed in order to promote the growth of the gallium arsenide layers. A high-energy radiation is directed to specific, prescribed points on the highly doped, amorphous germanium layer thereby generating centers having a defined crystal orientation, so that the epitaxial layer spreads laterally from these centers in a surface-covering fashion during the epitaxial vapor phase deposition. The solar cells produced by designational grain growth can be manufactured with high purity in a simple way and have an efficiency (greater than 20%) comparable to known mono-crystalline solar cells.Type: GrantFiled: September 20, 1985Date of Patent: April 14, 1987Assignee: Siemens AktiengesellschaftInventors: Wolfgang Kruehler, Josef Grabmaier
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Patent number: 4646426Abstract: In the production of an MOS transistor or a one-MOS transistor one-capacitor memory cell, a gate electrode is made of aluminum, doped regions are formed by an ion-implantation method using the gate electrode as a mask, and the doped regions are annealed by a laser beam.Type: GrantFiled: April 8, 1985Date of Patent: March 3, 1987Assignee: Fujitsu LimitedInventor: Nobuo Sasaki
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Patent number: 4565584Abstract: An amorphous or polycrystalline film which continuously covers the exposed surface of a single crystal substrate and an insulating film, is deposited in ultra-high vacuum and then heat-treated. The film is subjected to solid phase epitaxial growth at a temperature far lower than in prior-art methods, whereby a single crystal film is formed.Type: GrantFiled: January 25, 1983Date of Patent: January 21, 1986Assignee: Hitachi, Ltd.Inventors: Masao Tamura, Makoto Ohkura, Masanobu Miyao, Nobuyoshi Natsuaki, Naotsugu Yoshihiro, Takashi Tokuyama, Hiroshi Ishihara