Abstract: A method for operating an active matrix display device having an active matrix circuit, a column driver circuit and a scan driver circuit including driving the active matrix circuit by the column driver circuit and the scan driver circuit, wherein each of the active matrix circuit, column driver circuit and scan driver circuit includes by thin film transistors and wherein a variation in threshold voltages of the thin film transistors of the column driver circuit is not greater than 0.05 V.

Abstract: Disclosed is a method of manufacturing a semiconductor device wherein a corpuscular beam is radiated to a semiconductor substrate to create crystal defects therein. The semiconductor substrate is subjected to a heat treatment, e.g. for 1 second to 60 minutes, wherein rapid heating-up, e.g. raising temperature to 550.degree. to 850.degree. C. within 10 minutes, is done in a process prior to that of carrying out of the radiation with a corpuscular beam. By doing so, there is provided a semiconductor device which is free from degradation in electrical characteristics such as current amplification factor and has an increased switching speed, even where crystal defects are created through the radiation of corpuscular beam such as an electron beam to shorten the carrier lifetime. Thus, the inventive semiconductor device is satisfied by both requirements of switching speed and electrical characteristic.

Abstract: A solar cell fabrication procedure is described in which an excimer laser is used to cut a trench in a flat solar cell substrate so as to electrically isolate front and back regions of the substrate. The trench is cut around the perimeter of the cell. The advantage of using an excimer laser is that it will ablate a trench without diffusing conductive material deeper into the cell.

Abstract: An integrated circuit structure and method of forming the same is described in which a plurality of common signal planes are provided for an integrated circuit formed on a layer of semiconductive material (30). The common planes consist of a single crystal semiconductive substrate (2) and at least one conductive layer (26, 66) between the substrate (2) and the semiconductive circuit layer (30), with insulative layers (24, 28, 68) separating the conductive layers (26, 66) from each other and from the substrate (2) and semiconductive layer (30). When one conductive layer (26) is used, a power supply signal (V+) is preferably applied to the substrate (2) and a ground reference to the conductive layer (26). Contacts are made between the integrated circuit and the desired common planes by metallized contacts (56, 60) formed in openings (54, 58) through the underlying material. Various circuit signals can also be introduced through additional conductive layers.

Abstract: Disclosed is a method for producing image sensors having a plurality of sensing elements including the formation of parallel separating grooves by laser irradiation, the filling of the grooves with an insulating film, and the subsequent provision of a groove in the insulating film in a direction diagonal to the parallel grooves for metallization.

Abstract: There is disclosed a method of producing a transition metal pattern on a glass or glass-ceramic substrate by selective exudation of a transition metal from a glass substrate containing the metal as an oxide. The selective exudation is effected by applying an intense, well-focused source of energy to a glass in a pattern corresponding to the desired metal pattern. This develops localized heating, and thereby causes corresponding localized metal exudation from the glass. The metal pattern may be rendered electroconductive, and may constitute a pattern of interconnecting lines for microcircuitry.

Abstract: A method for producing a hole in a polymer film includes the steps of depositing a conductive layer onto the polymer film and irradiating a spot on the layer with a burst of focused laser energy at a level sufficient to form an opening in the film and, subsequently, plasma etching the film so as to form a hole of desired depth in the polymer film underlying the opening in the conductive layer. This method is particularly applicable to the formation of multichip intergrated circuit packages in which a plurality of chips formed in a semiconductor wafer are coated with a polymer film covering the chips and the substrates. The holes are provided for the purpose of interconnecting selected chip contact pads via a deposited conductive layer which overlies the film and fills the holes.

Abstract: A process for fabricating a bipolar transistor with a thin base and an abrupt base-collector junction includes the steps of depositing a thin layer of polycrystalline or amorphous silicon base material in a single crystal collector region, while in-situ doping the deposited silicon with boron atoms, and thereafter, recrystallizing the deposited silicon layer by thermal-pulse annealing at a temperature high enough to effect recrystallization and solid phase epitaxial regrowth while low enough to minimize interdiffusion of dopants between the base and collector.The process further includes providing the transistor fabricated by the aforedescribed steps with an abrupt base-emitter junction. This is accomplished by depositing n.sup.++ doped polysilicon with a LPCVD process and thereafter thermal annealing the polysilicon.

Abstract: The fabrication of bipolar junction transistors in silicon-on-sapphire (SOS) relies upon the laser-assisted dopant activation in SOS. A patterned 100% aluminum mask whose function is to reflect laser light from regions where melting of the silicon is undesirable is provided on an SOS wafer to be processed. The wafer is placed within a wafer carrier that is evacuated and backfilled with an inert atmosphere and that is provided with a window transparent to the wavelength of the laser beam to allow illumination of the masked wafer when the carrier is inserted into a laser processing system. A pulsed laser (typically an excimer laser) beam is appropriately shaped and homogenized and one or more pulses are directed onto the wafer. The laser beam pulse energy and pulse duration are set to obtain the optimal fluence impinging on the wafer in order to achieve the desired melt duration and corresponding junction depth.