Laser Beam Treatment Of Compound Devices Patents (Class 148/DIG94)
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Patent number: 5897381Abstract: Rapid Thermal Processing of a semiconductor wafer is performed by scanning a laser beam across a silicon dioxide film in contact with a surface of the wafer. The silicon dioxide film absorbs the energy from the laser beam and converts the energy to heat. The heat, in turn, is transferred to the wafer. Temperature feedback can be obtained to increase control and uniformity of temperatures across the wafer.Type: GrantFiled: October 21, 1997Date of Patent: April 27, 1999Assignee: LSI Logic CorporationInventors: Sheldon Aronowitz, Nicholas Eib, Jon S. Owyang
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Patent number: 5840592Abstract: A method of simultaneously improving the spectral response and dark current characteristics of an image gathering detector is disclosed. The method uses an excimer laser to redistribute and activate ion implanted dopant species in the backside of an image gathering device such as a backside-illuminated CCD. Alternately, the excimer laser is used to incorporate dopants from a gaseous ambient into the backside of the image gathering device and simultaneously redistribute and activate the dopants. The redistribution of the dopant is controlled by the laser pulses and provides for a peak dopant concentration at the back surface of the image gathering device which provides for improved spectral response and simultaneously improves dark current characteristics.Type: GrantFiled: July 5, 1994Date of Patent: November 24, 1998Assignee: The United States of America as represented by the Secretary of the NavyInventors: Stephen D. Russell, Douglas A. Sexton, Eugene P. Kelley, Ronald E. Reedy
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Patent number: 5153148Abstract: The invention is directed to a semiconductor laser wherein the first embodiment is characterized in that the first upper portion cladding layer is assumed to be a double layer construction, the upper layer portion is assumed to be higher in carrier concentration than the lower layer portion, the series resistance component is restrained, so that the sequential direction voltage V.sub.F may be lowered without damaging the other characteristics such as oscillation start current I th and so on.Type: GrantFiled: October 30, 1990Date of Patent: October 6, 1992Assignee: Rohm Co., Ltd.Inventors: Hajime Sakiyama, Haruo Tanaka, Masato Mushiage
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Patent number: 5100832Abstract: A process for preparing a doped epitaxial compound semiconductor on a substrate by molecular beam epitaxy, the molecular beam epitaxy being effected under the irradiation of the substrate surface with a specific electromagnetic radiation.Type: GrantFiled: March 31, 1990Date of Patent: March 31, 1992Assignee: Sharp Kabushiki KaishaInventors: Masahiko Kitagawa, Yoshitaka Tomomura, Kenji Nakanishi
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Patent number: 5024967Abstract: A process is described for making semiconductor devices with highly controlled doping profiles. The process involves minimizing or eliminating segregation effects caused by surface electric fields created by Fermi-level pinning. These electric fields act on dopant ions and cause migration from the original deposition site of the doplant ions. Dopant ions are effectively shielded from the surface electric fields by illumination of the growth surfaces and by background doping. Also, certain crystallographic directions in certain semiconductors do not show Fermi-level pinning and lower growth temperatures retard or eliminate segregation effects. Devices are described which exhibit enhanced characteristics with highly accurate and other very narrow doping profiles.Type: GrantFiled: June 30, 1989Date of Patent: June 18, 1991Assignee: AT&T Bell LaboratoriesInventors: Rose F. Kopf, J. M. Kuo, Henry S. Luftman, Erdmann F. Schubert
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Patent number: 5013684Abstract: In situ removal of selected or patterned portions of semiconductor layers is accomplished by induced evaporation enhancement to form patterned buried impurity layers in semiconductor devices, such as heterostructure lasers and array lasers, which function as buried impurity induced layer disordering (BIILD) sources upon subsequent annealing. These layers may be formed to either function as buried impurity induced layer disordering (BIILD) sources or function as a reverse bias junction configuration of confining current to the active region of a laser structure. Their discussion here is limited to the first mentioned function.Type: GrantFiled: March 24, 1989Date of Patent: May 7, 1991Assignee: Xerox CorporationInventors: John E. Epler, Thomas L. Paoli
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Patent number: 4962057Abstract: In situ evaporation of selected surface regions or layers of compound semiconductors is accomplished without breaking the growth system environment employing photo induced evaporation enhancement in chemical vapor deposition epitaxy. Intense radiation from an energy source desorbs or causes evaporation of consecutive monolayers of atoms or combined atoms from the surface crystal by thermal evaporation. The desorbed atoms from the growth surface are removed atomic layer by atomic layer in a fairly uniform and systematic manner and may be characterized as "monolayer peeling" resulting in a morphology that is sculpturally smooth and molecularly continuous. In this sense, the method of this invention is analogous to erasing or the etching of crystal material and is the antithesis to laser deposition patterning wherein erasure after growth or reduced rate of growth during growth provide "negative growth patterning".Type: GrantFiled: October 13, 1988Date of Patent: October 9, 1990Assignee: Xerox CorporationInventors: John E. Epler, David W. Treat, Thomas L. Paoli
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Patent number: 4950615Abstract: A technique is disclosed forming thin films (13) of group IIB metal-telluride, such as Cd.sub.x Zn.sub.1-x Te (0.ltoreq.x.ltoreq.1), on a substrate (10) which comprises depositing Te (18) and at least one of the elements (19) of Cd, Zn, and Hg onto a substrate and then heating the elements to form the telluride. A technique is also provided for doping this material by chemically forming a thin layer of a dopant on the surface of the unreacted elements and then heating the elements along with the layer of dopant.Type: GrantFiled: February 6, 1989Date of Patent: August 21, 1990Assignee: International Solar Electric Technology, Inc.Inventors: Bulent M. Basol, Vijay K. Kapur
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Patent number: 4950621Abstract: A method of growing an epitaxial crystalline layer on a substrate which comprises the steps of(a) providing in the reaction zone of a reaction vessel a heated substrate(b) establishing a gas stream, provided by a carrier gas which gas stream comprises at least 50% by volume of a gas which suppresses the homogeneous nucleation of particles in the vapor phase which contains, in the vapor phase, at least one alkyl of an element selected from Group 15 and Group 16 of the Periodic Table,(c) passing the gas stream through the reaction zone into contact with the heated substrate, and(d) irradiating at least a major part of the surface of the substrate with electromagnetic radiation to provide photolytic decomposition of the at least one alkyl and consequential epitaxial deposition of the layer containing the said element across at least a major part of the surface of the substrate.Type: GrantFiled: November 6, 1985Date of Patent: August 21, 1990Assignee: Secretary of the State for Defence in Her Majesty's Government of the United Kingdom of Great Britain and Northern IrelandInventors: Stuart J. Irvine, John B. Mullin, Jean Giess
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Patent number: 4933299Abstract: MOVPE growth and photoetching are integrated into a unified sequence which is carried out without removing a workpiece from a MOVPE reactor. Growth may be carried out before, after or before and after the etching.To prevent pattern broadening by diffussion of the active species the substrate is preferably protected by a fugitive coating which is removed by the illumination. Native oxide coatings are particularly suitable for InGaAsP substrates. These are conveniently applied for exposing to substrate to 20.degree./o O.sub.2 +80.degree./oN.sub.2 for about 3 minutes at 450.degree. C.Type: GrantFiled: March 13, 1989Date of Patent: June 12, 1990Assignee: British Telecommunications public limited companyInventor: Kenneth Durose
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Patent number: 4895812Abstract: A layer of chemically compatible conductive material is applied to ferroelectric semiconductor material having a permanent polarization below its Curie temperature. The materials are heated to a temperature above the Curie temperature of the ferroelectric semiconductor material and allowed to cool. The result is a low resistance contact. The ferroelectric semiconductive material may be a layer on a non ferroelectric semiconductor material with a matching work function or matching dopant levels.Type: GrantFiled: December 14, 1988Date of Patent: January 23, 1990Assignee: GTE Laboratories IncorporatedInventors: Da Y. Wang, Daniel T. Kennedy, Burton W. MacAllister, Jr.
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Patent number: 4885260Abstract: Disclosed is a vapor phase growth method of compound semiconductor in which source gases are introduced into an epitaxial growth reactor at fixed feed rates, the substrate surface is irradiated with light, and the light irradiation is turned on and off, or the intensity of light irradiation is increased or decreased, so that an epitaxial layer structure changes in the composition, and the carrier concentration and conductivity type abruptly or continuously change in the growth film in the direction of the thickness.Type: GrantFiled: February 16, 1988Date of Patent: December 5, 1989Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yuzaburo Ban, Masaya Manno, Minoru Kubo, Mototsugu Morisaki, Mototsugu Ogura
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Patent number: 4859625Abstract: A method for epitaxial growth of compound semiconductor containing three component elements, two component elements thereof being the same group elements, in which three kinds of compound gases each containing different one of the three component elements are cyclically introudced, under a predetermined pressure for a predetermined period respectively, onto a substrate enclosed in an evacuated crystal growth vessel so that a single crystal thin film of the compound semiconductor is formed on the substrate.Type: GrantFiled: November 20, 1987Date of Patent: August 22, 1989Assignee: Research Development Corporation of Japan, Junichi Nishizawa and Oki Electric Industry Co., Ltd.Inventor: Fumio Matsumoto
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Patent number: 4855256Abstract: A masking layer is formed on the light-emitting mirror surface of a semiconductor laser body. The masking layer is capable of blocking light emitted from the semiconductor laser body and of being thermally melted and evaporated by exposure to the emitted light. When the masking layer is formed on the light-emitting mirror surface of the semiconductor laser body, a small light-emitting hole is defined in the masking layer by the heat of the emitted light which is effective to prevent the material of the masking layer from being evaporated on a portion of the light-emitting surface.Type: GrantFiled: February 12, 1988Date of Patent: August 8, 1989Assignees: Ricoh Company, Ltd., Hiroshi Kobayashi, Haruhiko MachidaInventors: Hiroshi Kobayashi, Haruhiko Machida, Makoko Harigaya, Yasushi Ide, Jun Akedo
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Patent number: 4843031Abstract: Disclosed is a method of fabricating a compound semiconductor device which is capable of forming a multi-wavelength semiconductor laser structure, double cavity type semiconductor laser structure, stripe type semiconductor laser structure transverse junction stripe type semiconductor laser structure, or semiconductor grating by a single step of epitaxial growth while illuminating a desired part of substrate surface selectively with light at the time of epitaxial growth.Type: GrantFiled: March 15, 1988Date of Patent: June 27, 1989Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yuzaburo Ban, Hiraaki Tsujii, Youichi Sasai, Mototsugu Ogura, Hiroyuki Serizawa
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Patent number: 4835116Abstract: A method for producing wafers having deposited layers of III-V materials on Si or Ge/Si substrates is disclosed. The method involves the use of multiple in situ and ex situ annealing steps and the formation of a thermal strain layer to produce wafers having a decreased incidence of defects and a balanced thermal strain. The wafers produced thereby are also disclosed.Type: GrantFiled: November 13, 1987Date of Patent: May 30, 1989Assignee: Kopin CorporationInventors: Jhang W. Lee, Richard E. McCullough
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Patent number: 4743569Abstract: A two step rapid thermal anneal (RTA) has been studied for activating Be implanted GaAs, where a short duration high temperature step is used to electrically activate the Be followed by a longer low temperature anneal for lattice re-growth. PN diodes show a substantial reduction in reverse diode leakage current after the lower temperature second step anneal, when compared to a single step RTA or to furnace annealing (FA). For low energy Be implants, no difference in electrical activation between the single step and the two step anneal is observed. Raman studies demonstrate that residual substrate impurities and high Be concentrations inhibit restoration of single crystal lattice characteristics after RTA. Lattice quality is also shown not to limit diode characteristics in the RTA material.Type: GrantFiled: April 20, 1987Date of Patent: May 10, 1988Assignee: Texas Instruments IncorporatedInventors: Donald L. Plumton, Liem T. Tran, Walter M. Duncan
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Patent number: 4742013Abstract: Process is disclosed for the production of a semiconductor laser with tape geometry and laser obtained by this process.After producing a double heterostructure on a substrate, a p-dopant is implanted in these layers, so that the two layers are made insulating. This is followed by local annealing by focussing an appropriate energy source. The electrical conduction properties of the annealed part are restored and it is doped. Thus, a p-doped conductive tape is produced between two electrically insulating parts above the active zone of the laser, which increases the current confinement in said zone.The disclosed invention is used in optical telecommunications.Type: GrantFiled: May 14, 1986Date of Patent: May 3, 1988Inventor: Louis Menigaux
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Patent number: 4707909Abstract: A process of providing semi-insulating thin film resistors with closer tolerance values by furnance-annealing the film to increase is resistance to less than the final intended value, and then focused heat source-annealing the film to within a close tolerance of the final intended value.Type: GrantFiled: August 8, 1986Date of Patent: November 24, 1987Assignee: Siliconix IncorporatedInventor: Richard A. Blanchard
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Patent number: 4706377Abstract: A method of passivating a gallium arsenide surface includes the steps of implanting a subsurface layer of nitrogen ions and annealing and reactive the nitrogen to form a layer consisting primarily of gallium nitride.Type: GrantFiled: January 30, 1986Date of Patent: November 17, 1987Assignee: United Technologies CorporationInventor: Alexander J. Shuskus
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Patent number: 4706376Abstract: A method for manufacturing a semiconductor photoelectric conversion device including forming a first impurity doped non-single crystal semiconductor layer of a first conductivity type on a substrate; forming an intrinsic non-single crystal semiconductor layer on the first semiconductor layer; forming a second impurity doped non-single crystal second conductivity layer type opposite to the first conductivity type on the intrinsic layer; irradiating the outer surface of the second impurity doped semiconductor layer with light energy of suitable wavelength which is effective to selectively crystallize the second impurity doped layer; irradiating the outer surface of the second impurity doped semiconductor layer with light energy of suitable wavelength which is effective to selectively crystallize the intrinsic semiconductor layer, whereby only the portion of the intrinsic semiconductor layer adjacent the impurity doped semiconductor layer is crystallized.Type: GrantFiled: November 18, 1986Date of Patent: November 17, 1987Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shumpei Yamazaki, Susumu Nagayama
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Patent number: 4681640Abstract: Germanium and doped-germanium polycrystalline films are formed using photolytic CO.sub.2 laser-induced chemical vapor deposition method. Germanium being transparent to IR light makes the production of high purity polycrystalline germanium and doped-germanium films from starting compounds of germane, ethylgermane diethylgermane, and triethylgermane ideally adapted to the laser induced infrared radiation provided by the tunable, continuous-wave CO.sub.2 laser which delivers infrared laser radiation in the range of 10.4 or 9.4 micrometers. Triethylgermane produces germanium in a quantity usable as a dopant. Scanning electron microscopy is used for analysis of the films. The products identified on irradiation of germane are germanium and hydrogen. Conversion rates on the order of 86% are readily obtained. On irradiation of diethylgermane and ethylgermane, ethylene, germane, germanium and hydrogen are produced.Type: GrantFiled: August 6, 1986Date of Patent: July 21, 1987Assignee: The United States of America as represented by the Secretary of the ArmyInventor: Ann E. Stanley
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Patent number: 4661168Abstract: A method of producing a semiconductor device including an image recording unit composed of a plurality of separated detector mosaic regions of infrared sensitive monocrystalline compound semiconductor material disposed on an insulating layer on a surface of a semiconductor body containing an integrated circuit which functions as a readout device for the image recording body, wherein: the plurality of mosaic regions are formed by initially depositing a layer of the compound semiconductor material in polycrystalline form directly onto the surface of the insulating layer, and subsequently recrystallizing the polycrystalline material into monocrystalline form by irradiation of the polycrystalline material with a focused high energy light beam to melt the semiconductor material, followed by resolidification.Type: GrantFiled: November 25, 1985Date of Patent: April 28, 1987Assignees: Licentia Patent-Verwaltungs-GmbH, Telefunken electronic GmbHInventors: Horst Maier, Max Schulz
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Patent number: 4654090Abstract: A method of converting selected areas of a semiconductor structure into a disordered alloy comprising a well feature epitaxially deposited on a semiconductor support, the well feature comprising at least one first well layer of narrow bandgap material deposited adjacent to at least a second layer of wider bandgap material or interposed between second and third layers of wider bandgap material. The disordered alloy exhibits higher bandgap and lower refractive index properties than the first layer.Type: GrantFiled: September 13, 1985Date of Patent: March 31, 1987Assignee: Xerox CorporationInventors: Robert D. Burnham, Noble M. Johnson
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Patent number: 4649624Abstract: This invention relates to a process of manufacturing an integrated structure in which optical signals can be processed in an electrooptic material such as lithium tantalate and electrical signals can be processed in a semiconductor material such as silicon. Microelectronic semiconductors are fabricated in the semiconductor material and electrooptic devices are fabricated in the electrooptic material. Devices made by the process of the present invention are also disclosed.Type: GrantFiled: October 3, 1983Date of Patent: March 17, 1987Assignee: The United States of America as represented by the Secretary of the NavyInventor: Ronald E. Reedy
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Patent number: RE33274Abstract: A method of converting selected areas of a semiconductor structure into a disordered alloy comprising a well feature epitaxially deposited on a semiconductor support, the well feature comprising at least one first well layer of narrow bandgap material deposited adjacent to at least a second layer of wider bandgap material or interposed between second and third layers of wider bandgap material. The disordered alloy exhibits higher bandgap and lower refractive index properties than the first layer. The method comprises the steps of (1) either placing the structure within a protective environment to prevent the escape of volatile components from the structure during subsequent processing or alternatively, covering the structure with a protective coating to prevent the escape of any elemental component of the structure, (2) heating the structure to a background temperature .[.just.].Type: GrantFiled: January 31, 1989Date of Patent: July 24, 1990Assignee: Xerox CorporationInventors: Robert D. Burnham, Noble M. Johnson