Laser Devices Patents (Class 148/DIG95)
-
Patent number: 6060335Abstract: According to the present invention, a high-efficiency and high reliability GaN-based semiconductor light emitting device having uniform light emission from the active layer, can be obtained by suppressing the defect density of the interface between the guide layer and cladding layer. When manufacturing the GaN-based semiconductor light emitting device, the growth temperature and pressure are increased, or the carrier gas flow rate and ammonia flow rate necessary for efficiently growing p-GaAlN are increased, in the vicinity of the interface between the upper p-GaN guide layer and p-AlGaN cladding layer in particular, and thus a method and structure, capable of suppressing these high defect densities generated, can be provided.Type: GrantFiled: February 9, 1998Date of Patent: May 9, 2000Assignee: Kabushiki Kaisha ToshibaInventors: John Rennie, Genichi Hatakoshi, Masaaki Onomura
-
Patent number: 6001664Abstract: A monolthically integrated VCSEL and photodetector, and a method of manufacturing same, are disclosed for applications where the VCSEL and photodetector require separate operation such as duplex serial data communications applications. A first embodiment integrates a VCSEL with an MSM photodetector on a semi-insulating substrate. A second embodiment builds the layers of a p-i-n photodiode on top of layers forming a VCSEL using a standard VCSEL process. The p-i-n layers are etched away in areas where VCSELs are to be formed and left where the photodetectors are to be formed. The VCSELs underlying the photodetectors are inoperable, and serve to recirculate photons back into the photodetector not initially absorbed. The transmit and receive pairs are packaged in a single package for interface to multifiber ferrules. The distance between the devices is precisely defined photolithographically, thereby making alignment easier.Type: GrantFiled: February 21, 1997Date of Patent: December 14, 1999Assignee: Cielo Communications, Inc.Inventors: Stanley E. Swirhun, Jeffrey W. Scott
-
Patent number: 5960257Abstract: A distributed feedback semiconductor laser which includes a semiconductor substrate of a first conductive type; a semiconductor multi-layer structure provided on the semiconductor substrate and including an active layer for generating laser light; and a gain-coupled diffraction grating provided between the semiconductor substrate and the semiconductor multi-layer structure. The diffraction grating includes a plurality of curved projections periodically arranged at a surface of the semiconductor substrate and a quantum well light absorption layer for covering the plurality of curved projections. The quantum well light absorption layer includes a light absorption area having a first thickness at each border between two adjacent curved projections and a non-light absorption area having a second thickness which is smaller than the first thickness at a top of each of the curved projections.Type: GrantFiled: September 19, 1997Date of Patent: September 28, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masato Ishino, Masahiro Kitoh, Nobuyuki Otsuka, Yasushi Matsui
-
Patent number: 5897381Abstract: Rapid Thermal Processing of a semiconductor wafer is performed by scanning a laser beam across a silicon dioxide film in contact with a surface of the wafer. The silicon dioxide film absorbs the energy from the laser beam and converts the energy to heat. The heat, in turn, is transferred to the wafer. Temperature feedback can be obtained to increase control and uniformity of temperatures across the wafer.Type: GrantFiled: October 21, 1997Date of Patent: April 27, 1999Assignee: LSI Logic CorporationInventors: Sheldon Aronowitz, Nicholas Eib, Jon S. Owyang
-
Patent number: 5888844Abstract: An (Al,Ga)As/(Al,Ga,In)P semiconductor layer structure is etched using an SiCl.sub.4 or an SiCl.sub.4 /(He,Ne) plasma. The etching is carried out at 0.degree. to 80.degree. C. and at a plasma pressure below 1.33.times.10.sup.-1 Pa (1 mTorr). The etched surfaces are sufficiently smooth for the etching process to be used in the production of (Al,Ga)As/(Al,Ga,In)P semiconductor lasers.Type: GrantFiled: February 26, 1997Date of Patent: March 30, 1999Assignee: Sharp Kabushiki KaishaInventors: Timothy David Bestwick, Craig Tombling
-
Patent number: 5866440Abstract: After the active layer including indium is formed, the evaporation preventing layer is formed at a temperature which does not cause liberation of indium. The p-type Al.sub.X Ga.sub.1-X N (0.ltoreq.X.ltoreq.1) or the like is used for the evaporation preventing layer. Increasing the substrate temperature to as high as 1020.degree. C. for forming the upper cladding layer does not cause liberation of indium from the active layer because the evaporation preventing layer is provided. As a result, the composition ratio of indium can be easily controlled and the high-quality active layer and the high-quality interface between the active layer and the upper cladding layer can be provided.Type: GrantFiled: October 14, 1997Date of Patent: February 2, 1999Assignee: Sharp Kabushiki KaishaInventor: Toshio Hata
-
Patent number: 5856207Abstract: The semiconductor laser of the invention includes: a semiconductor substrate of a first conductivity type; a stripe-shaped multilayer structure, formed on the semiconductor substrate, the stripe-shaped multilayer structure including an active layer; and a current blocking portion formed on the semiconductor substrate on both sides of the stripe-shaped multilayer structure, wherein the current blocking portion has a first current blocking layer of a second conductivity type, and a second current blocking layer of the first conductivity type formed on the first current blocking layer, the first current blocking layer includes a low-concentration region having a relatively low concentration of an impurity of the second conductivity type, and a high-concentration region having an impurity concentration which is higher than that of the low-concentration region, and the low-concentration region is provided at a position closer to the stripe-shaped multilayer structure than the high-concentration region.Type: GrantFiled: June 20, 1996Date of Patent: January 5, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Nobuyuki Otsuka, Masahiro Kitoh, Masato Ishino, Yasushi Matsui
-
Patent number: 5814531Abstract: A semiconductor laser includes a patterned semiconductor substrate including a lower flat plane portion, an upper flat plane portion, and a stripe-shaped slant plane portion connecting the lower flat plane portion and the upper flat plane portion, an active layer formed on the semiconductor substrate, an upper cladding layer formed on the active layer, current blocking layers formed on portions of the cladding layer, the portions respectively corresponding to the lower flat plane portion to the upper flat plane portion; and a current channel region formed on a portion of the upper cladding layer corresponding to the slant plane portion. There are satisfied relations t1>t2 and tan.sup.-1 (2t1/W).ltoreq..theta.+.phi.<90.degree., where t2 is thickness of the flat plane portions of the upper cladding layer, t1 is thickness of the slant plane portion of the upper cladding layer, .theta.Type: GrantFiled: January 29, 1996Date of Patent: September 29, 1998Assignee: Fujitsu LimitedInventors: Chikashi Anayama, Hiroshi Sekiguchi, Makoto Kondo
-
Patent number: 5770474Abstract: A method of fabricating a laser diode with reverse mesa structure has the following processes. A buffer layer of a first conductivity type, an active layer, a clad layer of a second conductivity type and a high-concentration contact layer of the second conductivity type are sequentially formed on a compound semiconductor substrate of the first conductivity type. Predetermined portions of the contact layer and of the clad layer are etched to form a reverse mesa structure. A passivation layer is formed on the overall substrate and the passivation existing on the reverse mesa structure is removed to expose the contact layer. A metal layer is formed on the exposed contact layer to contact therewith and a conductive metal layer is uniformly formed on the metal layer and the passivation layer. A pad metal layer is formed on the conductive metal layer to fill the etched portions of either side of the reverse mesa structure.Type: GrantFiled: June 25, 1997Date of Patent: June 23, 1998Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Ang-Seo Kim
-
Patent number: 5763287Abstract: A method of making a semiconductor optical device, including an integrated laser diode and optical waveguide lens with a continuous resonator extending along a resonator length direction between a pair of resonator facets, includes forming a pair of dielectric films disposed on a surface of a substrate on which a semiconductor layer of the optical waveguide is to be grown, the dielectric films having a linear symmetry about a hypothetical line extending in the resonator length direction, having edges opposing each other and parallel to the hypothetical line, and widths perpendicular to the resonator length direction that gradually narrow toward one facet from a position in the resonator length direction of the films. A mask pattern that produces a precise layer thickness profile is easily designed.Type: GrantFiled: January 29, 1996Date of Patent: June 9, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takushi Itagaki, Tohru Takiguchi, Yutaka Mihashi, Akira Takemoto
-
Patent number: 5712188Abstract: A fabrication method of a surface-emitting laser diode which permits easy control of polarization in a desired direction is disclosed. The laser emits light from an emitting surface having a sidewall inclined with respect to a normal to the emitting surface. An ion beam is provided for etching the inclined sidewall of the laser and a substrate is positioned having a face which is formed into the emitting surface in the ion beam to cause the ion beam to intercept a sidewall of the substrate to form the inclined sidewall. The face is tilted about either one of a ?110! or a ?110! direction. An angle is formed ranging between 5.degree. and 45.degree. measured between the inclined sidewall and the ?001! direction.Type: GrantFiled: May 1, 1996Date of Patent: January 27, 1998Assignee: Electronics and Telecommunications Research InstituteInventors: HyeYong Chu, ByuengSu Yoo, HyoHoon Park, MinSoo Park
-
Patent number: 5668047Abstract: A method for fabricating an InP diffraction grating for a distributed feedback semiconductor laser includes the steps of applying an electron beam resist on a semiconductor substrate, giving electron beam exposure to the electron beam resist and controlling heights of resist patterns by using fixed electron beam diameters but by varying incident electron doses. The semiconductor substrate is dry-etched. The electron beam exposure is such that the incident electron doses are made larger at a center portion than at portions towards two sides of the diffraction grating. Due to the proximity effect, the resist patterns after development will have a lower height and a narrower width at portions at which the incident electron doses are increased and, conversely, a higher height and a wider width at portions at which the incident electron doses are decreased.Type: GrantFiled: May 31, 1994Date of Patent: September 16, 1997Assignee: NEC CorporationInventor: Yoshiharu Muroya
-
Patent number: 5614436Abstract: A distributed feedback semiconductor laser device having a semiconductor substrate, a bottom electrode formed on a bottom surface of the substrate, a corrugation-shaped grating formed on a top surface of the substrate, an active waveguide layer whose energy band gap profile and whose light propagation constant are varied along cavity length direction of the laser device, the active waveguide layer being formed over the corrugation-shaped grating, a clad layer formed to cover the active waveguide layer, and a top electrode formed on a top of the clad layer. The active waveguide layer is grown by a selective metal organic vapor phase epitaxy with use of slender insulation masks having a variation in width, the slender insulation masks being arranged at both sides of an area on which the active waveguide layer is grown.Type: GrantFiled: March 8, 1995Date of Patent: March 25, 1997Assignee: NEC CorporationInventors: Jong-In Shim, Mitsuhiro Kitamura
-
Patent number: 5585309Abstract: A method for fabricating a semiconductor laser includes forming a double heterojunction structure on a first conductivity type semiconductor substrate; forming the double heterojunction structure into a stripe mesa shape by selective etching; successively growing a first conductivity type layer, a second conductivity type current blocking layer, and a first conductivity type current blocking layer on opposite sides of the mesa to embed the mesa; and adding an impurity from a surface of the first conductivity type current blocking layer to form impurity doped regions that electrically separate the second conductivity type current blocking layer from an upper part of the mesa at opposite sides of the mesa.Type: GrantFiled: October 17, 1994Date of Patent: December 17, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kenzo Mori, Tadashi Kimura, Yoshitatu Kawama, Nobuaki Kaneno, Tatuya Kimura, Yuji Okura, Hitoshi Tada
-
Patent number: 5580818Abstract: A SiO.sub.2 mask is formed on an n-type InP substrate. The mask gap width is narrower in a region I (laser region) and wider in a region II (modulator region). With taking the mask as growth blocking masks, an optical guide layer of InGaAsP, an MQW active layer of InGaAs well layer and InGaAsP barrier layer, p-type InP layer are selectively grown. By removing a part of the mask, p-type InP clad layer and p-type InGaAs cap layer are formed. By this, regions having mutually different bandgap can be formed through one selective growth process. Also, it becomes possible to form the regions having large bandgap difference while avoiding lattice mismatching.Type: GrantFiled: April 28, 1995Date of Patent: December 3, 1996Assignee: NEC CorporationInventor: Yasutaka Sakata
-
Patent number: 5573976Abstract: A method of fabricating a semiconductor laser includes forming an active layer including a compound semiconductor material on a semiconductor substrate, the compound semiconductor material having an energy band gap that monotonically increases as the growth temperature of the material rises above a certain growth temperature, including growing a window structure forming region including at least a region which serves as a waveguide in the proximity of a laser resonator facet at a higher temperature than a region outside the window structure forming region. Therefore, the band gap energy of the window structure forming region is larger than that of the region outside the window structure forming region. Therefore, a semiconductor laser having a window structure can easily be fabricated with a high yield and with great repeatability.Type: GrantFiled: November 9, 1995Date of Patent: November 12, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Manabu Kato, Takashi Motoda
-
Patent number: 5563094Abstract: In situ removal of selected or patterned portions of semiconductor layers is accomplished by induced evaporation enhancement to form reversed bias current confinement structures in semiconductor devices, such as heterostructure lasers and array lasers.Type: GrantFiled: September 6, 1990Date of Patent: October 8, 1996Assignee: Xerox CorporationInventors: Thomas L. Paoli, John E. Epler
-
Patent number: 5559053Abstract: This invention involves a vertical cavity surface emitting laser ("VCSEL") having a Group III-V semiconductor epitaxial mesa structure with an electrically insulating sidewall located on the mesa's sidewalls for confinement of the optical radiation generated in the laser. A suitably doped Group III-V epitaxial layer or a layer of insulating material such as silicon dioxide acts as the insulating sidewall layer. Advantageously, the structure has a self-aligned ohmic contact layer located everywhere on the top surface of the epitaxial mesa structure.Type: GrantFiled: June 6, 1995Date of Patent: September 24, 1996Assignee: Lucent Technologies Inc.Inventors: Kent D. Choquette, Robert S. Freund, Minghwei Hong, Daryoosh Vakhshoori
-
Patent number: 5543355Abstract: In a method for manufacturing a semiconductor laser device, striped grooves are formed in a compound semiconductor substrate (or crystal element) on both sides of a light emission area, Then, the compound semiconductor substrate on both outer sides of the striped grooves is etched, so that the compound semiconductor substrate is lower than at both outer sides of the striped grooves than at the light emission area. Then, Current blocking layers are buried in the compound semiconductor substrate except for the light emission area.Type: GrantFiled: April 17, 1995Date of Patent: August 6, 1996Assignee: NEC CorporationInventor: Mitsuyoshi Ookubo
-
Patent number: 5538919Abstract: A VCSEL having a first mirror stack positioned on the surface of a substrate, an active region positioned on the first mirror stack and substantially coextensive therewith, and a second mirror stack positioned on the active region, the second mirror stack forming a ridge or mesa having a side surface. A metal contact layer is positioned on the side surface of the ridge or mesa and on portions of an end of the ridge or mesa to define a light emitting area, and a layer of diamond-like material is electrolytically plated on the metal contact layer so as to form a heat conductor to remove heat from the laser.Type: GrantFiled: May 18, 1995Date of Patent: July 23, 1996Assignee: MotorolaInventors: Michael S. Lebby, Chan-Long Shieh, Ken Davis
-
Patent number: 5508225Abstract: In a method for manufacturing a semiconductor laser diode, producing visible light after growing a p type GaAs contact layer on a p type AlGaInP cladding layer, an n type layer comprising that can be selectively etched with an etchant that does not etch GaAs is grown on the p type GaAs contact layer. After cooling, the n type layer is selectively etched and removed. In this method, a diffusion potential produced at the p-n junction between the p type GaAs contact layer and the n type layer prevents ionized hydrogen from entering the p type AlGaInP cladding layer during cooling, whereby the activation ratio of Zn atoms in the p type AlGaInP cladding layer is increased. Therefore, even if the Zn/III ratio during the growth of the p type AlGaInP cladding layer is low, a semiconductor laser diode with reduced threshold current and improved temperature characteristics is attained.Type: GrantFiled: March 28, 1994Date of Patent: April 16, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Kaoru Kadoiwa
-
Patent number: 5486489Abstract: In the method, a doped semiconductor coating is to be deposited on a disturbed surface (S) of a semiconductor base (9) doped with a dopant having the same conductivity type as the coating. According to the invention, prior to depositing a main layer (28) of the coating (10), a superdoped layer (24) is deposited, which superdoped layer has a dopant concentration that is greater than twice the mean concentration of the coating. The invention applies in particular to manufacturing a semiconductor laser for an optical fiber telecommunications system.Type: GrantFiled: February 3, 1994Date of Patent: January 23, 1996Assignee: Alcatel N.V.Inventors: Leon Goldstein, Dominique Bonnevie
-
Patent number: 5482891Abstract: A substrate (102) having a surface (103) with a first stack of distributed Bragg reflectors (106), a first cladding region (107), an active region (108), a second cladding region (109), a second stack of distributed Bragg reflectors (110), and a contact region (111) is provided. A mesa (131) with a surface (133) and a trench (136) is formed. A first dielectric layer (122) is formed overlying substrate (102) and covering a portion of trench (136). A seed layer (126) having a pattern is formed, with the pattern of seed layer (126) having an opening on a portion of mesa (131). A metal is selectively plated on seed layer (126), thereby generating a layer (304) on seed layer (126) for removal of heat of VCSEL (101).Type: GrantFiled: March 17, 1995Date of Patent: January 9, 1996Assignee: Motorola, Inc.Inventors: Chan-Long Shieh, John Lungo, Michael S. Lebby
-
Patent number: 5478775Abstract: A semiconductor laser diode of a ridge type includes a double heterostructure in which a cladding layer is formed in a mesa stripe form and a current block layer which selectively buries mesa side and bottom surfaces of the cladding layer. For fabrication, a first step is to grow, sequentially above a substrate, a second cladding layer, an active layer, a first cladding layer and a cap layer. A second step is to etch the first cladding layer and the cap layer respectively in mesa stripe forms. A third step is to selectively grow current blocking layer on the first cladding layer by a metalorganic vapor phase epitaxy process. A fourth step is to grow contact layers respectively on surfaces of the current blocking layer and the cap layer. In the third step, a gas in which HCl is mixed in a concentration within a range of 0.2.about.2 in a (HCl)/(III gas) ratio is used, which enhances re-evaporation of material on a selective mask.Type: GrantFiled: December 7, 1994Date of Patent: December 26, 1995Assignee: NEC CorporationInventor: Hiroaki Fujii
-
Patent number: 5472907Abstract: A method of manufacturing an optoelectronic semiconductor device includes the step of providing two comparatively thin layers next to one another on a substrate by means of a non-selective growing process, an etching process, and a selective growing process, a cladding layer being present over said thin layers. In the known method, first the one thin layer and the cladding layer are grown, the latter is locally removed, and the other thin layer and the cladding layer are then grown in that position. This method has the disadvantage that unevennesses (steps or openings) often arise at the surface of the layer structure above the transition between the thin layers.Type: GrantFiled: December 15, 1993Date of Patent: December 5, 1995Assignee: U.S. Philips CorporationInventors: Johannes J. M. Binsma, Johannes M. M. Van Der Heijden
-
Patent number: 5470786Abstract: A semiconductor laser device comprising a semiconductor substrate, a multi-layered double heterostructure having active layers, a pair of cladding layers, a ridged waveguide structure and a current confining structure formed between the semiconductor substrate and the active layer. With such an arrangement, injected current is narrowed not only on the side above the ridge of the active layer but also on the substrate side of the active layer to improve the threshold current and its current confinement performance. When the two lateral trenches of the ridge are embedded with resin layers, the ridge stripe width can be made narrow to improve the threshold current of the device. When the active layer is realized in a DCC structure having two active layers and having an intermediary clad layer sandwiched therebetween, the device will show a low threshold current circular beam divergence and stabilized thermal characteristics.Type: GrantFiled: March 17, 1994Date of Patent: November 28, 1995Assignee: The Furukawa Electric Co., Ltd.Inventors: Michinori Irikawa, Masayuki Iwase
-
Patent number: 5441912Abstract: This invention provides a method of manufacturing laser diodes having a high efficiency and a high optical output and showing an excellent temperature-dependent performance at a high yield. The method comprises steps of forming a mesa on a p-type compound semiconductor substrate 1 by sequentially arranging at least a p-type compound semiconductor cladding layer 2, an active layer 3 and an n-type compound semiconductor compound layer 4, burying the lateral sides of said mesa with a p-type compound semiconductor buried layer 6 and an n-type compound semiconductor current blocking layer 7, removing said n-type compound semiconductor current blocking layer 7 partly at areas contacting each of the lateral sides of said mesa to partly expose the p-type compound semiconductor buried layer 6 in the vicinity of said mesa and then burying the remaining space with a p-type compound semiconductor current blocking layer 8.Type: GrantFiled: February 22, 1994Date of Patent: August 15, 1995Assignee: The Furukawa Electric Co., Ltd.Inventors: Naoki Tsukiji, Hiroyuki Aida
-
Patent number: 5436194Abstract: A method for fabricating a laser diode, comprises the steps of: forming a first stripe structure defined by a plurality of crystallographically distinct surfaces on a surface of a semiconductor substrate; forming an epitaxial layer of InGaAlP on the semiconductor substrate including the first stripe structure by a decomposition of gaseous source materials of In, Ga, Al and P; wherein the InGaAlP layer is doped to the p-type by incorporating Mg while growing the InGaAlP by adding a gaseous source material of Mg into said source materials of In, Ga, Al and P such that the InGaAlP layer is doped to the p-type with a substantially uniform carrier concentration level irrespective of the crystal surfaces forming the stripe structure.Type: GrantFiled: April 15, 1994Date of Patent: July 25, 1995Assignee: Fujitsu LimitedInventors: Makoto Kondo, Akira Furuya, Chikashi Anayama, Mami Sugano, Kay Domen, Toshiyuki Tanahashi, Hiroshi Sekiguchi
-
Patent number: 5436193Abstract: A method of fabricating monolithic arrays having closely spaced laser stripes which output laser beams with large, but well-controlled, wavelength separations. The method begins by depositing on a substrate a lower cladding layer and a plurality of stacked active regions with different bandgaps and which are separated by etch stop layers. The stacked active regions are stacked in order of decreasing energy bandgaps as one moves away from the substrate. One or more stacks are then formed by etching one or more active layers using a patterned mask and the etch stop layers such that the topmost active region that remains in each stack has a bandgap which corresponds to the desired laser beam color from that stack. An upper cladding layer is then grown over the exposed surfaces. Beneficially, a lateral confinement region is then created around the stacks (such as by using impurity-induced layer disordering).Type: GrantFiled: November 2, 1993Date of Patent: July 25, 1995Assignee: Xerox CorporationInventors: Kevin J. Beernink, Robert L. Thornton
-
Patent number: 5424242Abstract: A method for making an optical amplifier according to which a stack of the following layers is made by epitaxy: a first optical guiding layer; a first chemical attack barrier layer; a second optical guiding layer; a second chemical attack barrier layer; an active layer; a confinement layer; and a contact layer. Then at least one amplifier element followed by an optical guide located beneath this amplifier element are etched in these layers. The method can be applied to the making of optoelectronic devices such as modulators, change-over switches, distributors, etc.Type: GrantFiled: April 29, 1993Date of Patent: June 13, 1995Assignee: Thomson-CSFInventors: Robert Blondeau, Yannick Bourbin, Daniel Rondi
-
Patent number: 5418182Abstract: A process for fabricating a diode laser is disclosed which allows the laser to be easily aligned with other components. Furthermore, the disclosed method provides a means for fabricating an entire diode laser upon a single substrate, thus eliminating the complexity of positioning and alignment. Ion beam deposition is used to create many of the components, thus forming very efficient and very uniform components.Type: GrantFiled: March 26, 1993Date of Patent: May 23, 1995Assignee: Honeywell Inc.Inventor: Carol M. Ford
-
Patent number: 5418183Abstract: A method for forming a reflective digitally tunable laser using selective area epitaxy is disclosed. The laser comprises passive waveguides and a plurality of optical amplifiers. The waveguides and optical amplifiers are formed by depositing multiple quantum wells having a suitable bandgap. According to the method, the multiple quantum wells forming both the passive waveguides and the optical amplifiers are deposited simultaneously using a dielectric mask. The mask comprises dual, rectangularly-shaped strips of dielectric material, spaced to form a gap. The multiple quantum wells grown in the gap are suitable for use as optical amplifiers, and those grown outside of the gap are suitable for use as passive waveguides.Type: GrantFiled: September 19, 1994Date of Patent: May 23, 1995Assignee: AT&T Corp.Inventors: Charles H. Joyner, Judith P. Meester, Martin Zirngibl
-
Patent number: 5416044Abstract: A method for producing a surface-emitting laser, includes the steps of: forming a mask pattern to define a top mirror on a semiconductor substrate, the semiconductor substrate having a first semiconductor multilayer formed on the semiconductor substrate, a second semiconductor multilayer formed on the first semiconductor multilayer, and a third semiconductor multilayer formed on the second semiconductor multilayer, the first semiconductor multilayer constituting a bottom mirror, the second semiconductor layer including an upper barrier layer and a lower barrier layer, and an active layer sandwiched between the upper and lower barrier layers, the third semiconductor multilayer constituting a top mirror; forming the top mirror by partially removing the third semiconductor layer by dry etching using the mask pattern as a mask until the surface of the upper barrier layer of the second semiconductor multilayer is exposed; forming an etching protective film at least on the side of the top mirror; partially removingType: GrantFiled: March 11, 1994Date of Patent: May 16, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toyoji Chino, Kenichi Matsuda
-
Patent number: 5413956Abstract: A method for producing a semiconductor laser device includes the steps of: forming window layers on either one of a top surface of an internal structure or a reverse surface of a substrate and on light-emitting end facets of the internal structure; forming a reflection film on the light-emitting end facets; removing the window layer formed on either one of the top surface or the reverse surface by using an etchant which hardly etches the reflection film; and forming electrodes on the surface from which the window layer is removed by etching and on the other surface. Another method for producing a semiconductor laser device includes the steps of: forming window layers on light-emitting end facets of the bars; inserting the bars into an apparatus having openings for forming electrodes and a supporting portion for preventing a positional shift between the bars and the openings, and forming the electrodes on the top surfaces and the reverse surfaces of the bars; and cutting the bars into the chips.Type: GrantFiled: December 22, 1992Date of Patent: May 9, 1995Assignee: Sharp Kabushiki KaishaInventors: Masanori Watanabe, Ken Ohbayashi, Kazuaki Sasaki, Osamu Yamamoto, Mitsuhiro Matsumoto
-
Patent number: 5403774Abstract: A method of altering a refractive index, as for an optical waveguide, as in a buried heterostructure laser, by inducing disordering in a region of a semiconductor body comprises exposing a surface portion of the semiconductor body to plasma etching, coating at least a part of the surface portion with an oxide layer, heat treating the semiconductor body.Type: GrantFiled: November 6, 1992Date of Patent: April 4, 1995Assignee: Siemens Corporate Research, Inc.Inventors: Chan-Long Shieh, Joseph L. Mantz, Reinhart W. H. Engelmann
-
Patent number: 5397740Abstract: First and second junctions are set so as to control electric fields applied to an active layer, independent from each other, and the electric field applied by the first junction controls exciting conditions while the electric field applied by the second junction drives the active layer so as to simplify a drive circuit for an optical semiconductor device.Type: GrantFiled: March 14, 1994Date of Patent: March 14, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yukio Toyoda, Shinichi Wakabayashi, Hitomaro Tougou
-
Patent number: 5395792Abstract: There is provided a process for fabricating a highly reliable semiconductor laser device operable at a low current with an increased yield, which process includes the steps of: (a) forming a lower clad layer on a semiconductor substrate; (b) forming an active layer of a material larger in refractive index and smaller in forbidden band width than the lower clad layer; (c) forming a first upper clad layer of a material smaller in refractive index and larger in forbidden band width than the active layer; (d) forming an etch stop layer made of GaAs on the first upper clad layer; (e) forming a current-blocking layer of a material smaller in refractive index and larger in forbidden band width than the first upper clad layer; (f) forming a stripe cavity by etching at least a portion of the current-blocking layer down to the etch stop layer; (g) evaporating the etch stop layer remaining in the stripe cavity; (h) forming a second upper clad layer of a material smaller in refractive index and larger in forbidden band wType: GrantFiled: June 1, 1994Date of Patent: March 7, 1995Assignee: Rohm Co., Ltd.Inventors: Katsuhiko Ikawa, Hiroshi Matagi
-
Patent number: 5387543Abstract: A VCSEL including a first mirror stack, an active region and a second mirror stack positioned on a substrate having a surface lying in a first plane and a centrally located offset area of the surface lying in a second plane parallel to the first plane and spaced therefrom. Portions of the active region and the first and second mirror stacks being offset from surrounding portions by the offset area in the surface of the substrate so as to define a lateral waveguide which confines the operating region of the VCSEL.Type: GrantFiled: March 28, 1994Date of Patent: February 7, 1995Assignee: Motorola, Inc.Inventor: Donald E. Ackley
-
Patent number: 5382543Abstract: In a method of manufacturing a semiconductor device, first strip dielectrics (33) and surfaces (35) were formed by taking first strip parts (31) of a dielectric layer (29) away from a principal surface (13) of a semiconductor substrate (11) in parallel by using a photo-lithography method. Active regions (43) were formed on the first strip surfaces (35) by using a metal organic vapor phase epitaxy method to be covered with lattice planes each of which is (111)B. Second strip dielectrics (35) and surfaces (47) were formed by taking second strip parts (31a) of the first strip dielectrics (31) away from the principal surface (13) with the second strip surfaces (47) positioned between the active regions (43) and the second strip dielectrics (45). Current block regions (57) were formed on the second strip surfaces (47) and the active regions (43) by using the metal organic vapor phase epitaxy method.Type: GrantFiled: July 22, 1993Date of Patent: January 17, 1995Assignee: NEC CorporationInventors: Takahiro Nakamura, Tomoji Terakado
-
Patent number: 5376582Abstract: A planar, topology free, semiconductor quantum-well laser is described. The quantum-well active layer is formed and patterned in a specified region which is constrained on all sides by high bandgaps which are formed through the use of impurity-free diffusion techniques. After the impurity-free diffusion has taken place, an upper portion is then epitaxially deposited to complete the structure. High-power, single fundamental mode laser operation is achieved by funneling current into the constrained quantum-well active region, high bandgap regions in conjunction with low index of refraction in regions surrounding the active area.The structure is further designed to allow low beam divergence in the direction perpendicular to the semiconductor laser junction.Type: GrantFiled: October 15, 1993Date of Patent: December 27, 1994Assignee: International Business Machines CorporationInventors: Abbas Behfar-Rad, Christoph S. Harder, Heinz P. Meier
-
Patent number: 5376581Abstract: In a process for fabricating a semiconductor laser by forming a double-heterostructure made up of a first cladding layer, an active layer and a second cladding layer on a semiconductor substrate at the first growth step, forming protecting films for selective growth on both sides of a striped region for current injection, without etching the second cladding layer, and growing a third cladding layer and a contact layer for current injection at a second growth step, the second cladding layer formed at the first growth step is grown to the thickness required for achieving laser characteristics.Type: GrantFiled: September 10, 1993Date of Patent: December 27, 1994Assignee: Mitsubishi Kasei CorporationInventors: Kenji Shimoyama, Yuichi Inoue, Hideki Gotoh
-
Patent number: 5360763Abstract: In the first method, an etching stop layer and a current blocking layer are grown on a semiconductor substrate by MOVPE. Next, the current blocking layer is etched on a region of the etching-stop layer corresponding to an active region, and the active region is formed in the etched portion by the selective growth using MOVPE. In the second method, a ridge is formed on a semiconductor substrate, and a doublehetero structure is grown on the ridge by MOVPE. On the active layer, a p-cladding layer is grown to be covered on the whole surface with (111) B plane entirely. The (111) B plane has the growth speed suppressing effect, so that no semiconductor layer is grown on the p-cladding layer, while a current blocking layer is grown on other regions.Type: GrantFiled: September 7, 1993Date of Patent: November 1, 1994Assignee: NEC CorporationInventor: Takahiro Nakamura
-
Patent number: 5360762Abstract: On a GaAs substrate (Al.sub.Y Ga.sub.1-Y).sub.0.5 In.sub.0.5 P crystal layers (0.ltoreq.Y.ltoreq.1) is formed to be lattice-matched with the substrate. By radiating As molecular beams on the surface of the crystal layers while heating the layered substrate to a temperature at which In in the crystal layers evaporates, the portion near the surface of the crystal layers is changed into an Al.sub.Y Ga.sub.1-Y As crystal layer (0.ltoreq.Y.ltoreq.1) of a thickness of several molecules, on which layer an Al.sub.X Ga.sub.1-X As crystal layer (0.ltoreq.X.ltoreq.1) is formed. Since the surface of the Al.sub.Y Ga.sub.1-Y As crystal layer has been purl fled, the formed Al.sub.X Ga.sub.1-X As crystal layer has a high crystallinity, allowing production of a light emitting diode, a semiconductor laser device and the like with high efficiency.Type: GrantFiled: June 21, 1993Date of Patent: November 1, 1994Assignee: Sharp Kabushiki KaishaInventors: Kosei Takahashi, Masahiro Hosoda, Atsuo Tsunoda, Takahiro Suyama, Sadayoshi Matsui
-
Patent number: 5356832Abstract: A surface emission type semiconductor laser includes a plurality of semiconductor layers defining at least one resonator in a direction perpendicular to the semiconductor substrate of the laser, the layers including at least a cladding layer in the semiconductor layers being formed into at least one column-like semiconductor layer extending in a direction perpendicular to the semiconductor substrate, and a II-VI group compound semiconductor epitaxial layer buried around the at least one column-like semiconductor layer. If a plurality of column-like semiconductor layers are to be formed by a separation groove, these column-like semiconductor layers are separated from one another, the II-VI group compound semiconductor epitaxial layer being buried in the separation groove.Type: GrantFiled: December 31, 1992Date of Patent: October 18, 1994Assignee: Seiko Epson CorporationInventors: Katsumi Mori, Tatsuya Asaka, Hideaki Iwano
-
Patent number: 5346855Abstract: Disclosed is a method of making InP-based DFB lasers that can reliably mitigate or substantially prevent erosion of the grating during overgrowth. The method comprises contacting, prior to overgrowth, the grating with a sulfurcontaining aqueous medium, e.g., 80 parts by weight H.sub.2 O/20 parts by weight ammonium sulfide.Type: GrantFiled: January 19, 1993Date of Patent: September 13, 1994Assignee: AT&T Bell LaboratoriesInventors: Erin K. Byrne, Utpal K. Chakrabarti, Todd R. Hayes
-
Patent number: 5336635Abstract: A semiconductor laser of a patterned-substrate type comprises the patterned-substrate having a sloped portion and a planar portion, and a plurality of semiconductor layers formed on the patterned-substrate including a heterostructure. By controlling condition for growing a specific semiconductor layer, a preferable ratio of a sloped portion thickness to a planar portion thickness of the semiconductor layer can be obtained, which enables a lasing current of the laser to be confined in a restricted region, and this results in obtaining a high efficiency and a high power output of the semiconductor laser.Type: GrantFiled: June 15, 1993Date of Patent: August 9, 1994Assignee: Fujitsu LimitedInventors: Chikashi Anayama, Toshiyuki Tanahashi, Makoto Kondo
-
Patent number: 5324387Abstract: The present invention is a method for fabricating a multiple beam semiconductor laser, wherein the laser includes first and second semiconductor laser dies respectively affixed to a pair of supporting heatsinks. The method utilizes a laminating process to accurately position the supporting heatsinks relative to one another yet on opposite sides of an intermediate spacer to form a sandwich-like element. After permanently affixing the sandwich-like element to a base plate, the intermediate spacer is dissolved or otherwise removed to expose the mounting surfaces for the laser dies. The method not only enables the accurate placement of the heatsinks relative to one another so as to reduce the positional error, but also eliminates the need for subsequent multiple-step laser beam alignment operations.Type: GrantFiled: May 7, 1993Date of Patent: June 28, 1994Assignee: Xerox CorporationInventors: John R. Andrews, George A. Neville Connell
-
Patent number: 5304507Abstract: In a first crystal growth process for manufacturing a semiconductor laser, an n-(Al.sub.y Ga.sub.1-y).sub.0.5 In.sub.0.5 P clad layer, an undoped (Al.sub.z Ga.sub.1-z).sub.0.5 In.sub.0.5 P active layer, a p-(Al.sub.y Ga.sub.1-y).sub.0.5 In.sub.0.5 P clad layer, a p-Ga.sub.0.5 In.sub.0.5 P layer, and an n-type semiconductor layer, are sequentially stacked in the named order on an upper surface of a GaAs substrate. Thereafter, the n-type semiconductor layer is removed, and the p-Ga.sub.0.5 In.sub.0.5 P layer and the p-(Al.sub.y Ga.sub.1-y).sub.0.5 In.sub.0.5 P clad layer are selectively removed so as to form a ridge stripe. A current block layer is formed on the p-(Al.sub.y Ga.sub.-y).sub.0.5 In.sub.0.5 P clad layer at both sides of the ridge stripe, and a p-GaAs contact layer is formed on the ridge stripe and the current block layer. With this process, since the n-type semiconductor layer is formed to cover the p-Ga.sub.0.5 In.sub.0.Type: GrantFiled: January 14, 1993Date of Patent: April 19, 1994Assignee: NEC CorporationInventor: Kousei Unozawa
-
Patent number: 5288659Abstract: An improved process for fabricating photonic circuits is disclosed. The inventive process starts with a growth of a base wafer comprising a stack of epitaxial layers of various materials. At least a portion of each of the material layers will ultimately be a functioning part of any of a number of devices which will form the PIC or will serve a role in at least one of the fabrication processing steps. Specific inventive processing steps are addressed to (1) interconnecting passive waveguides, active devices, and grating filtering regions without the substantial optical discontinuities which appear in the prior art, and (2) etching continuous waveguide mesas to different depths in different regions of the PIC so as to optimize the performance of each PIC device.Type: GrantFiled: September 14, 1992Date of Patent: February 22, 1994Assignee: AT&T Bell LaboratoriesInventors: Thomas L. Koch, Uziel Koren
-
Patent number: 5284791Abstract: In a method of making a tunable twin guide (TTG) type tunable semiconductor laser, over the surface of a semiconductor substrate of one conductivity type, an active layer, a central layer of the opposite conductivity type, and a tuning layer, each being stripe-shaped and overlying the top of the preceding one is provided. This method is characterized in that the processing of semiconductor elements for defining the current path/optical waveguide inside the laser is carried out not by etching but by using selective epitaxy method such as metal organic vapor phase epitaxy (MOVPE). The use of selective MOVPE permits to form stripe-shaped layers at high precision and good uniformity, with consequent effects of minimizing scattering of laser light, increasing the efficiency of the drive power to laser light output conversion and enhancing the coupling efficiency with optical fibers. Besides thinner central layer that can be formed can contributes to enlarging the tunable bandwidth of laser light.Type: GrantFiled: August 6, 1992Date of Patent: February 8, 1994Assignee: NEC CorporationInventors: Yasutaka Sakata, Masayuki Yamaguchi, Tatsuya Sasaki