With Dielectric Member Patents (Class 313/586)
  • Patent number: 9935120
    Abstract: Some embodiments include a memory array which has a stack of alternating first and second levels. Channel material pillars extend through the stack, and vertically-stacked memory cell strings are along the channel material pillars. A common source is under the stack and electrically coupled to the channel material pillars. The common source has conductive protective material over and directly against metal silicide, with the conductive protective material being a composition other than metal silicide. Some embodiments include methods of fabricating integrated structures.
    Type: Grant
    Filed: February 21, 2016
    Date of Patent: April 3, 2018
    Assignee: Micron Technology, Inc.
    Inventors: John M. Meldrim, Yushi Hu, Rita J. Klein, John D. Hopkins, Hongbin Zhu, Gordon A. Haller, Luan C. Tran
  • Patent number: 9470634
    Abstract: An electride may provide surface enhanced Raman scattering (SERS). The electride, a compound where the electrons serve as anions, may be a ceramic electride, such as a conductive ceramic derived from mayenite, or an organic electride, for example. The textured electride surface or electride particles may strongly enhance the Raman scattering of organic or other Raman active analytes. This may also provide a sensitive method for monitoring the chemistry and electronic environment at the electride surface. The results are evidence of a new class of polariton (i.e., a surface electride-polariton resonance mechanism) that is analogous to the surface plasmon-polariton resonance that mediates conventional SERS.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: October 18, 2016
    Assignee: The United States of America as Represented by the Administrator of the National Aeronautics and Space Administration
    Inventor: Mark S. Anderson
  • Patent number: 9247187
    Abstract: A panel of a plasma display apparatus includes a front substrate and a back substrate arranged in opposition to this front substrate, and an outer circumferential portion of the front substrate and an outer circumferential portion of the back substrate are adhered to each other by a sealing material. The panel is held on a front side of a chassis base portion of a chassis member. The conductive member is fixed to a back cover of a casing by a first fixing member arranged inside a portion where the conductive member is fixed to the chassis member. The conductive member is fixed to the back cover also by a second fixing member arranged outside the portion where the conductive member is fixed to the chassis member. Occurrence of a crack of the panel due to drop impact, vibration, and external force can be prevented.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 26, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Kiyotaka Nakase
  • Patent number: 9247186
    Abstract: A panel of a plasma display apparatus includes a front substrate and a back substrate arranged in opposition to this front substrate, and an outer circumferential portion of the front substrate and an outer circumferential portion of the back substrate are adhered to each other by a sealing material. The panel is held on a front side of a chassis base portion of a chassis member. A conductive member fixed to an outer circumferential portion of the chassis member includes a first bent portion bent to a back side at a portion located inside a portion where the conductive member is fixed to the chassis member and a first extending portion extending to the back side from the first bent portion. Occurrence of a crack of the panel due to drop impact, vibration, and external force can be prevented.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 26, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Kiyotaka Nakase
  • Patent number: 9113560
    Abstract: A signal line is a linear conductor provided within a laminated body. A first ground conductor is provided on a positive direction side in a z axis direction within the laminated body, compared with the signal line, and overlaps with the signal line in a planar view seen from the z axis direction. A second ground conductor is provided on a negative direction side in the z axis direction within the laminated body, compared with the signal line, and overlaps with the signal line in the planar view seen from the z axis direction. Via hole conductors connect the ground conductors to each other. In the first ground conductor, a plurality of opening portions are arranged along the signal line in the planar view seen from the z axis direction. The via hole conductors are provided between the opening portions adjacent to one another, in an x axis direction.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: August 18, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Noboru Kato, Jun Sasaki, Satoshi Ishino
  • Patent number: 9005879
    Abstract: A method for manufacturing an electrode for a display apparatus includes printing and drying a conductive paste on a substrate, and printing a glass paste on the dried conductive paste, followed by patterning.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: April 14, 2015
    Assignee: Cheil Industries, Inc.
    Inventors: Ah Reum Koo, Min Su Park, Dong Il Shin, Ryun Min Heo, Won Hee Lee, Myung Sung Jung, Chul Kyu Kim
  • Patent number: 8890409
    Abstract: An array of microcavity plasma devices is formed in a unitary sheet of oxide with embedded microcavities or microchannels and encapsulated metal driving electrodes isolated by oxide from the microcavities or microchannels and arranged so as to generate sustain a plasma in the embedded microcavities or microchannels upon application of time-varying voltage when a plasma medium is contained in the microcavities or microchannels.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: November 18, 2014
    Assignee: The Board of Trustees of the University of Illnois
    Inventors: J. Gary Eden, Sung-Jin Park, Taek-Lim Kim, Kwang-Soo Kim
  • Patent number: 8803423
    Abstract: To obtain effective luminance and light efficiency while avoiding discharge, it is necessary to sufficiently increase a current luminous efficiency of gas and an electron emission efficiency of an electron source. In a fluorescent lamp, an anode electric field is increased by setting a pressure of a noble gas or a molecular gas enclosed to 10 kPa or higher, setting an anode voltage to 240 V or lower, and setting a substrate distance to 0.4 mm or smaller. Furthermore, the resulting effect that the current luminous efficiency is increased in proportion to the electric field is used. Also, by applying a MIM electron source having an electron emission efficiency exceeding 10% as an electron source, a non-discharge fluorescent lamp having a light emission luminance equal to or larger than 104 [cd/m2] and a light emission efficiency equal to or larger than 120 [lm/W] is achieved.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: August 12, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Masakazu Sagawa, Shin Imamura, Toshiaki Kusunoki
  • Patent number: 8796926
    Abstract: An AC, rf, or pulse-excited microdischarge device and array are provide by the invention. A preferred array includes a substrate. A plurality of microdischarge cavities that contain discharge medium are in the substrate. A transparent layer seals the discharge medium in the microdischarge cavites. Electrodes stimulate the discharge medium. The microdischarge cavities are physically isolated from the electrodes by dielectric and arranged relative to the electrodes such that ac, rf, or pulsed excitation applied to the electrodes stimulates plasma excitation of the discharge medium. The microdischarge cavities are sized to produce plasma within the microdischarge cavities.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: August 5, 2014
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: J. Gary Eden, Ju Gao, Sung-o Kim
  • Patent number: 8643023
    Abstract: A light-emitting diode having a high output, high efficiency, and a long service life under a high-humidity environment is provided. The light-emitting diode (1) includes a compound semiconductor layer (2) having a light-emitting section (7), ohmic electrodes (4, 5) provided on the main light extraction surface of the compound semiconductor layer (2), and an electrode protection layer (6) for protecting the ohmic electrodes (4, 5), wherein the Al concentrations of the surfaces (2a, 2b) of the compound semiconductor layer (2), which include the main light extraction surface, are 20% or less and the As concentration of the surfaces (2a, 2b) is less than 1%, and the electrode protection layer (6) has a two-layer structure composed of a first protective film (12) provided so as to cover the ohmic electrodes (4, 5) and a second protective film (13) provided so as to cover at least an end portion of the first protective film (12).
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: February 4, 2014
    Assignee: Showa Denko K.K.
    Inventors: Wataru Nabekura, Ryouichi Takeuchi
  • Patent number: 8624492
    Abstract: A plasma display panel and a multi plasma display panel are disclosed. The plasma display panel includes a front substrate, a back substrate positioned opposite the front substrate, a barrier rib positioned between the front substrate and the back substrate to partition a discharge cell, and a seal portion positioned outside the barrier rib in an area between the front substrate and the back substrate. A distance between the barrier rib and the seal portion on one side of the plasma display panel is different from a distance between the barrier rib and the seal portion on the other side of the plasma display panel opposite the one side.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: January 7, 2014
    Assignee: LG Electronics Inc.
    Inventors: Soomyun Lee, Kyungtae Kim
  • Patent number: 8575844
    Abstract: The plasma klystron switching device of the present invention may include a low-dielectric substrate, a plasma cavity internally pressurized by an inert gas, a circuit assembly formed on the first surface of the low-dielectric substrate and enclosed by the plasma cavity, wherein the circuit assembly includes a first electrode and a second electrode configured to form a switching gap, wherein the switching gap is configured to act as a high conductance plasma generation zone during an ON state of the plasma klystron switching device and a low conductance zone during an OFF state of the plasma klystron switching device, an evacuated klystron resonance generator, wherein the klystron resonance generator includes a klystron resonance cavity, wherein the klystron resonance generator includes a coupling aperture configured to RF couple the klystron resonance cavity and the plasma cavity, and a field emitter array configured to energize the klystron resonance generator.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: November 5, 2013
    Assignee: Rockwell Collins, Inc.
    Inventors: Don L. Landt, Nathan P. Lower, Roger A. Dana, Mark M. Mulbrook
  • Patent number: 8513888
    Abstract: PDP (1) includes front plate (2) and rear plate (10). Front plate (2) has protective layer (9). Rear plate (10) has phosphor layers (15). Protective layer (9) includes a base layer. On the base layer, aggregated particles are dispersed and disposed. The underlying layer includes a first metal oxide and a second metal oxide. In X-ray diffraction analysis, a peak of the base layer lies between a first peak of the first metal oxide and a second peak of the second metal oxide. The first and second metal oxides are two selected from the group consisting of MgO, CaO, SrO, and BaO. The base layer further contains sodium and potassium.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: August 20, 2013
    Assignee: Panasonic Corporation
    Inventors: Jun Hashimoto, Takuji Tsujita, Takayuki Shimamura
  • Patent number: 8508129
    Abstract: A plasma display panel equipped with a front substrate and a back substrate facing each other to form a discharge space. On the discharge space side of the front substrate there are disposed a metal oxide layer and magnesium oxide crystal particles. The magnesium oxide crystal particles are arranged to be protruding closer to the discharge space than the surface of the metal oxide layer.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: August 13, 2013
    Assignee: Panasonic Corporation
    Inventors: Taro Naoi, Hai Lin, Eishiro Otani, Hiroshi Ito
  • Publication number: 20130200786
    Abstract: A plasma cell and a method for making a plasma cell are disclosed. In accordance with an embodiment of the present invention, a cell comprises a semiconductor material, an opening disposed in the semiconductor material, a dielectric layer lining a surface of the opening, a cap layer closing the opening, a first electrode disposed adjacent the opening, and a second electrode disposed adjacent the opening.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 8, 2013
    Applicant: Infineon Technologes AG
    Inventor: Dirk Meinhold
  • Patent number: 8497631
    Abstract: A microplasma device includes a substrate and either or both of a microchannel or microcavity defined in a polymer layer supported by the substrate. Electrodes arranged with respect to the polymer material can excite a plasma in a discharge medium contained in the microchannel or the microcavity or both. A method of forming a microplasma device places a curable polymer material between a mold having a negative volume impression of microcavities and/or microchannels and a substrate. The polymer is cured and then the mold is separated from the solid polymer.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: July 30, 2013
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: J. Gary Eden, Sung-Jin Park, Meng Lu, Brian Cunningham
  • Patent number: 8482190
    Abstract: PDP (1) includes front plate (2) and rear plate (10). Front plate (2) has protective layer (9). Rear plate (10) has phosphor layers (15). Protective layer (9) includes a first metal oxide and a second metal oxide. In X-ray diffraction analysis, a peak of a base layer lies between a first peak of the first metal oxide and a second peak of the second metal oxide. The first and second metal oxides are two selected from the group consisting of MgO, CaO, SrO, and BaO. A peak desorption temperature of CO2 gas from protective layer (9) is less than 480° C.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: July 9, 2013
    Assignee: Panasonic Corporation
    Inventors: Takayuki Shimamura, Jun Hashimoto, Takuji Tsujita
  • Patent number: 8471471
    Abstract: An embodiment of the invention is a microcavity plasma device that can be controlled by a low voltage electron emitter. The microcavity plasma device includes driving electrodes disposed proximate to a microcavity and arranged to contribute to generation of plasma in the microcavity upon application of a driving voltage. An electron emitter is arranged to emit electrons into the microcavity upon application of a control voltage. The electron emitter is an electron source having an insulator layer defining a tunneling region. The microplasma itself can serve as a second electrode necessary to energize the electron emitter. While a voltage comparable to previous microcavity plasma devices is still imposed across the microcavity plasma devices, control of the devices can be accomplished at high speeds and with a small voltage, e.g., about 5V to 30V in preferred embodiments.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: June 25, 2013
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: J. Gary Eden, Kuo-Feng Chen
  • Patent number: 8456086
    Abstract: An embodiment of the invention IS an array of microcavity plasma devices The array includes a first metal film electrode with a plurality of non-uniform cross-section microcavities therein that are encapsulated in oxide A second electrode is a thin metal foil encapsulated in oxide that is bonded to the first electrode A packaging layer contains gas or vapor in the non-uniform cross-section microcavities To make such device, photoresist is patterned to encapsulate the anodized foil or film except on a top surface at desired positions of microcavities A second anodization or electrochemical etching is conducted to form the non-uniform cross-section sidewall microcavities cavities After removing photoresist and metal oxide, a final anodization lines the walls of the microcavities with metal oxide and fully encapsulates the metal electrodes with metal oxide.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: June 4, 2013
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: J. Gary Eden, Sung-Jin Park, Kwang Soo, Andrew J. Price
  • Patent number: 8450931
    Abstract: A process for reducing Ag electromigration in electronic circuitry includes the step of treating the electronic circuitry with an electromigration resistant composition. This process is useful in fabricating electronic devices having electronic circuitry that is close together, such as resistors, capacitors, and displays, e.g., a plasma display panel (PDP) or a liquid crystal display (LCD).
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: May 28, 2013
    Assignee: Dow Corning Corporation
    Inventors: Khristopher Edward Alvarez, Nick Evan Shephard, James Steven Tonge
  • Patent number: 8427054
    Abstract: A plasma display panel equipped with a front substrate and a back substrate facing each other to form a discharge space. On the discharge space side of the front substrate there are disposed a metal oxide layer and magnesium oxide crystal particles. The magnesium oxide crystal particles are arranged to be protruding closer to the discharge space than the surface of the metal oxide layer.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: April 23, 2013
    Assignee: Panasonic Corporation
    Inventors: Taro Naoi, Hai Lin, Eishiro Otani, Hiroshi Ito
  • Patent number: 8427053
    Abstract: A plasma display panel has high definition, high luminance, and low power consumption. In the plasma display panel, the front panel is provided thereon with display electrodes, a dielectric layer, and a protective layer. The display electrodes are formed on the front glass substrate. The dielectric layer coats the display electrodes, and the protective layer is formed on the dielectric layer. The rear panel is provided thereon with address electrodes and barrier ribs for partitioning the discharge space in the direction crossing to the display electrodes. The front and rear panels are opposed to each other with a discharge space therebetween filled with a discharge gas. The protective layer on the dielectric layer includes an underlying film, and aggregated particles adhered on the underlying film, the aggregated particles being formed by aggregating crystal grains of magnesium oxide.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: April 23, 2013
    Assignee: Panasonic Corporation
    Inventors: Takuji Tsujita, Jun Hashimoto, Ryuichi Murai, Hiroyuki Kado, Masashi Gotou, Yukihiro Morita, Yasuyuki Noguchi
  • Patent number: 8415871
    Abstract: An image display apparatus has a plurality of phosphor films two-dimensionally disposed on a substrate, a matrix-pattern rib formed on the substrate to partition between the phosphor films, a plurality of metal backs each covering at least one phosphor film, and resistance wirings having a sheet resistance higher than that of the metal backs for electrically connecting the plurality of metal backs to each other. The resistance wirings are disposed to the apexes of the matrix-pattern rib and composed of a plurality of column lines and a plurality of row lines, the metal backs have first portions for covering the phosphor films on the substrate and second portions formed along the rib to connect the first portions to the column lines.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: April 9, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tomoya Onishi
  • Patent number: 8400058
    Abstract: A PDP to improve a discharge delay includes X and Y electrodes, a dielectric layer covering the X and Y electrodes, and a protective layer covering the dielectric layer. The protective layer includes an MgO film stacked on a surface of the dielectric layer, and a plurality of MgO crystal particles attached on the MgO film. In addition, a covering ratio of a surface of the MgO film is lower than or equal to 10%, and the plurality of MgO crystal particles are arranged so that orientations of surfaces opposing to the discharge space are aligned. Further, the plurality of MgO crystal particles have a cubic form.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: March 19, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Kawasaki, Yasuhito Yamaryo, Atsuo Ohtomi
  • Patent number: 8395320
    Abstract: A plasma display panel (PDP) includes a front panel including (i) a substrate, (ii) a display electrode formed on the substrate, (iii) a dielectric layer formed to cover the display electrode, and (iv) a protective layer formed on the dielectric layer. Further, the PDP includes a rear panel disposed facing the front panel forming a discharge space, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib partitioning the discharge space. The protective layer is formed by forming a base film of MgO on the dielectric layer and attaching a plurality of aggregated particles of metal oxide crystal particles to the base film so that the aggregated particles are distributed over the entire surface, the base film includes Si as a material impurity, and a Si concentration in the base film is more than 0 ppm and not more than 10 ppm.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Kaname Mizokami, Hideji Kawarazaki, Yoshinao Ooe
  • Patent number: 8378572
    Abstract: A plasma display panel includes: a front plate; a rear plate having barrier ribs; a sealing member that seals a peripheral edge of the front plate and a peripheral edge of the rear plate; and a bonding layer that bonds at least part of the barrier ribs and the front plate to each other. The sealing member has a first glass member. The bonding layer has a second glass member. A deformation point of the second glass member is lower than a softening point of the first glass member. A softening point of the second glass member is higher than the softening point of the first glass member.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: February 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Osamu Oida, Akifumi Okigawa, Noriteru Maeda
  • Patent number: 8350474
    Abstract: A plasma display panel includes a front plate and a rear plate disposed in such a manner as to face the front plate. The front plate has a display electrode and a dielectric layer covering the display electrode. The dielectric layer contains substantially no lead components but contains MgO, SiO2, and K2O. A content of MgO is in a range between 0.3 mol % and 1.0 mol %, both inclusive. The content of SiO2 is in a range between 35 mol % and 50 mol %, both inclusive.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: January 8, 2013
    Assignee: Panasonic Corporation
    Inventors: Yoshiyuki Ota, Kazuhiro Morioka, Akira Kawase, Morio Fujitani, Tatsuo Mifune
  • Patent number: 8350473
    Abstract: A plasma display panel is disclosed. The plasma display panel includes a front substrate, a rear substrate positioned to be opposite to the front substrate, a barrier rib positioned between the front substrate and the rear substrate to partition a discharge cell, and a phosphor layer positioned in the discharge cell. The phosphor layer includes a phosphor material and an additive material. The phosphor layer includes a red phosphor layer emitting red light, a green phosphor layer emitting green light, and a blue phosphor layer emitting blue light. A thickness of the blue phosphor layer is larger than a thickness of the red phosphor layer.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: January 8, 2013
    Assignee: LG Electronics Inc.
    Inventors: Jihoon Lee, Heekwon Kim, Jeonghyun Hahm
  • Patent number: 8339041
    Abstract: A gas discharge device constructed out of one or more plasma-shells with an organic luminescent substance(s) located in close proximity to each plasma-shell. Each plasma-shell is a hollow geometric body filled with an ionizable gas. Photons from the gas discharge inside the plasma-shell excite the luminescent substance. In one embodiment the luminescent substance is located on the external surface of the plasma-shell. In another embodiment, the luminescent substance is located inside the plasma-shell. The plasma-shell may be made of an inorganic luminescent material with organic luminescent material located on the inside or outside of the plasma-shell. The plasma-shell is of any suitable geometric shape and includes plasma-sphere, plasma-disc, and plasma-dome. A plasma-shell may be used in combination with a plasma-tube.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: December 25, 2012
    Assignee: Imaging Systems Technology, Inc.
    Inventors: Oliver M. Strbik, III, Carol Ann Wedding
  • Patent number: 8334820
    Abstract: A plasma display panel is disclosed. The plasma display panel includes a scan electrode and a sustain electrode positioned parallel to each other on a front substrate, an upper dielectric layer positioned on the scan electrode and the sustain electrode, a rear substrate on which an address electrode is positioned to intersect the scan electrode and the sustain electrode, a lower dielectric layer positioned on the address electrode, and a barrier rib positioned between the front substrate and the rear substrate. The barrier rib includes lead (Pb) equal to or less than 1,000 ppm (parts per million). A discharge gas is filled between the front substrate and the rear substrate and includes helium (He) of 9% to 42%.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: December 18, 2012
    Assignee: LG Electronics Inc.
    Inventors: Seongnam Ryu, Gibum Lee, Jongmun Yang, Jain Goo, Hyeonjae Lee, Jinyoung Kim, Jeonghyun Hahm, Myongsoon Jung, Jihoon Lee
  • Patent number: 8330368
    Abstract: An object of the present invention is to provide a plasma display panel that can suppress the generation of cracks in a dielectric layer, and also improve the yield, and a method for manufacturing such a display panel. A dielectric layer on a front panel is designed to have a two-layer structure in which a first dielectric layer and a second dielectric layer are laminated, and the first dielectric layer is formed through processes in which, after printing or applying a dielectric paste containing a glass frit onto a front substrate so as to cover display electrodes formed thereon as a stripe pattern, drying and firing the resulting substrate at a temperature not less than a softening point of the glass frit, and the second dielectric layer is formed on the first dielectric layer by using a sol-gel method.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: December 11, 2012
    Assignee: Panasonic Corporation
    Inventors: Shuzo Tsuchida, Kazuto Fukuda, Kenji Date
  • Patent number: 8319705
    Abstract: The plasma display device has a display panel having first and second display electrodes and address electrodes, an electrode drive circuit, and a drive control circuit for controlling the electrode drive circuit. The drive control circuit performs a reset drive control, address drive control and sustain drive control in each subfield. The drive control circuit performs an all cell reset drive control which resets all cells in a first subfield out of the plurality of subfields, and an ON cell reset drive control which resets ON cells in a second subfield. At a first temperature T1, an ultimate potential of an slope pulse of the first display electrode is controlled to be a first potential in the ON cell reset drive control, and at a second temperature T2>T1, the ultimate potential is controlled to be a second potential higher than the first potential.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: November 27, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Junichi Kumagai, Katsumi Ito
  • Patent number: 8304992
    Abstract: The present invention relates to a plasma display panel. The plasma display panel includes a front substrate on which a first electrode and a second electrode are positioned parallel to each other, a first black layer at a position corresponding to the first electrode, a second black layer at a position corresponding to the second electrode, a rear substrate positioned opposite the front substrate, and a barrier rib positioned between the front substrate and the rear substrate to partition a discharge cell. An interval between the first black layer and the second black layer ranges from 0.7 to times a shortest interval between at least one of the first and second black layers and the barrier rib.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: November 6, 2012
    Assignee: LG Electronics Inc.
    Inventor: Sungyong Ahn
  • Patent number: 8294342
    Abstract: An optical sheet capable of enhancing contrast is provided. The optical sheet includes a layer configured to control light incident on the layer and then allow the light to exit towards the observer side. The optical sheet includes: an optical functional sheet layer having multiple prisms capable of transmitting light and multiple light-absorbing parts capable of absorbing light, the multiple prisms and multiple light-absorbing parts being arranged alternately along a sheet plane of the optical sheet; and an electromagnetic-wave shield layer. The electromagnetic-wave shield layer is positioned on a side opposite to the observer side relative to the optical functional sheet layer.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: October 23, 2012
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Tsuyoshi Kashiwagi, Yousuke Ezaki, Yukihiro Makita, Takayuki Niijima
  • Patent number: 8294364
    Abstract: A plasma display panel is disclosed. In one embodiment, the plasma display panel includes a first member, which is a base substrate for forming a phosphor layer, having at least one inclined surface. Also a method of manufacturing the plasma display panel is disclosed. In one embodiment, both the first member and a second member formed on the first member are manufactured using a photolithography method using different exposure masks. Accordingly, the plasma display panel may be manufactured having increased reliability and productivity and a method of manufacturing the plasma display panel is provided.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: October 23, 2012
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Sung-Hee Cho, Sung-Soo Kim, Hyoung-Bin Park
  • Patent number: 8294365
    Abstract: A plasma display panel has a front substrate, a rear substrate, and a phosphor layer. The front substrate has a dielectric layer formed so as to cover a plurality of display electrodes disposed on a substrate, and a protective layer formed on the dielectric layer. The rear substrate is faced to the front substrate so as to form discharge space, has data electrodes in the direction intersecting with the display electrodes, and has barrier ribs for partitioning the discharge space. The phosphor layer is formed by applying phosphor ink that is made of a phosphor material and dispersant between the barrier ribs of the rear substrate. Nano-particles with a diameter of a range of 1 nm to 100 nm inclusive, or a solvent having an affinity for the dispersant of the phosphor ink is applied to the surfaces of the barrier ribs, and then the phosphor ink is applied to them, thereby forming the phosphor layer.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: October 23, 2012
    Assignee: Panasonic Corporation
    Inventors: Shougo Nasu, Hisayo Oohata, Kenji Sato, Syouzou Ninomiya, Kenji Hasegawa
  • Patent number: 8283864
    Abstract: A plasma display panel has a front plate, and a rear plate arranged so as to be opposed to the front plate. The front plate has a display electrode, a dielectric layer to cover the display electrode, and a protective layer to cover the dielectric layer. The protective layer has a luminescence peak in a wavelength ranging from not less than 350 nm to not more than 550 nm under irradiation of light having a wavelength of 146 nm. In addition, the protective layer has a luminescence peak in a wavelength ranging from not less than 350 nm to not more than 550 nm under irradiation of light having a wavelength of 173 nm. A ratio A/B between a peak intensity of luminescence under the light having the wavelength of 146 nm and a peak intensity of luminescence under the light having the wavelength of 173 nm falls within a range from more than 3.0 to not more than 7.0.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: October 9, 2012
    Assignee: Panasonic Corporation
    Inventors: Hideji Kawarazaki, Keiji Horikawa, Chiharu Koshio, Kanako Okumura
  • Patent number: 8274222
    Abstract: A plasma display panel has a front plate and a rear plate disposed so as to face the front plate. The front plate includes display electrodes, a dielectric layer formed to coat the display electrodes, and a protective layer formed to coat the dielectric layer. The protective layer includes a base layer formed on the dielectric layer, and a plurality of particles dispersed in the base layer. The base layer has nanocrystalline particles made of magnesium oxide and having an average particle diameter in the range of at least 10 nm to at most 100 nm. The particles are aggregated particles in which a plurality of metal oxide crystal particles are aggregated. The aggregated particles have an average particle diameter at least twice to at most four times as large as a film thickness of the base layer.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: September 25, 2012
    Assignee: Panasonic Corporation
    Inventors: Yoshinao Ooe, Koyo Sakamoto, Sadahiro Goto, Yoshiyuki Hisatomi, Kengo Kigami, Kaname Mizokami, Takeshi Kokura
  • Patent number: 8269419
    Abstract: A plasma display panel equipped with a front substrate and a back substrate facing each other to form a discharge space. On the discharge space side of the front substrate there are disposed a metal oxide layer and magnesium oxide crystal particles. An area ratio of the magnesium oxide crystal particles to the metal oxide layer is 0.1% to 85%.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: September 18, 2012
    Assignee: Panasonic Corporation
    Inventors: Taro Naoi, Hai Lin, Eishiro Otani, Hiroshi Ito
  • Patent number: 8264146
    Abstract: A plasma display panel includes a front panel wherein an electrode, a dielectric layer and a protective layer are formed on a substrate of the front panel; and a rear panel wherein an electrode, a dielectric layer and a barrier rib and a phosphor layer are formed on a substrate of the rear panel. The front panel and the rear panel are oppositely disposed to each other. The electrode of the front panel is composed of a transparent electrode and a bus electrode, and the bus electrode comprises a melted-solidified portion obtained by a melting and subsequent solidifying of electrically-conductive particles.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: September 11, 2012
    Assignee: Panasonic Corporation
    Inventors: Michiru Kuromiya, Shuzo Tsuchida, Tomohiro Okumura
  • Patent number: 8258701
    Abstract: A plasma display panel equipped with a front substrate and a back substrate facing each other to form a discharge space. On the discharge space side of the front substrate there are disposed a metal oxide layer and magnesium oxide crystal particles. Among the magnesium oxide crystal particles there are magnesium oxide crystal particles having a particle diameter of at least 3500 angstroms.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: September 4, 2012
    Assignee: Panasonic Corporation
    Inventors: Taro Naoi, Hai Lin, Eishiro Otani, Hiroshi Ito
  • Patent number: 8253333
    Abstract: A plasma display panel equipped with a front substrate and a back substrate facing each other to form a discharge space. On the discharge space side of the front substrate there are disposed a metal oxide layer and magnesium oxide crystal particles. The magnesium oxide crystal particles are arranged on the discharge space side of the metal oxide layer, or alternatively, part of the magnesium oxide crystal particles are disposed within the metal oxide layer.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: August 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Taro Naoi, Hai Lin, Eishiro Otani, Hiroshi Ito
  • Patent number: 8237363
    Abstract: A plasma display panel includes a front panel including a substrate, a display electrode formed on the substrate, a dielectric layer formed so as to cover the display electrode, and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel so that discharge space is formed, and including an address electrode formed in a direction intersecting the display electrode and a barrier rib for partitioning the discharge space. The protective layer is formed by forming a base film on the dielectric layer and attaching a plurality of aggregated particles of a plurality of crystal particles of metal oxide to the base film so that a plurality of aggregated particles are distributed over the entire surface, and the base film is made of MgO containing Al.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: August 7, 2012
    Assignee: Panasonic Corporation
    Inventors: Kaname Mizokami, Shinichiro Ishino, Koyo Sakamoto, Akira Shiokawa, Hiroyuki Kadou, Yoshinao Ooe, Hideji Kawarazaki, Kazuo Uetani
  • Patent number: 8237362
    Abstract: A plasma display panel (PDP) and a method of manufacturing the same with improved luminous efficiency. The PDP includes: a first substrate; a second substrate facing the first substrate; a plurality of sustain electrode pairs between the first substrate and the second substrate and extending in a first direction; a plurality of address electrodes on the second substrate and extending in a second direction crossing the first direction; a first dielectric layer on the second substrate for covering the address electrodes; a discharge enhancement layer on the first dielectric layer; a plurality of barrier ribs on the discharge enhancement layer and defining discharge cells between the first and second substrates; and phosphor layers in the discharge cells, wherein the discharge enhancement layer has an opening in each of the discharge cells, and wherein the barrier ribs have a roughness less than that of the discharge enhancement layer.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: August 7, 2012
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Hyun-Chul Kim, Hyoung-Bin Park, Sang-Hyuck Ahn, Sang-Ho Jeon, Seung-Hyun Son, Gi-Young Kim, Sil-Keun Jeong, Sung-Hyun Choi, Jung-Min Kim
  • Patent number: 8227972
    Abstract: A display filter includes a base film disposed on a display panel. The base film includes a phototransmissive unit having a constant horizontal cross-sectional area, and a light absorbing unit which includes a light absorbing material and surrounds the phototransmissive unit. A plasma display panel (PDP) may include the display filter. The display filter may improve ambient contrast by increasing the transmittance of light emitted by a display panel and by blocking externally incident light.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: July 24, 2012
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Yeon-Joo Choi, Cha-Won Hwang, Sang-Mi Lee, Seung-Goo Baek
  • Patent number: 8227987
    Abstract: Provided are a protecting layer for a plasma display panel (PDP), a method of forming the same, and a PDP including the protecting layer. The protecting layer includes a magnesium oxide-containing layer having a surface to which magnesium oxide-containing particles having a magnesium vacancy-impurity center (VIC) are attached. The protecting layer is resistant to plasma ions and has excellent electron emission effects, and thus, a PDP including the protecting layer can be operated at low voltage with high discharge efficiency.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: July 24, 2012
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Min-Suk Lee, Jong-Seo Choi, Suk-Ki Kim, Yury Matulevich, Jae-Hyuk Kim, Soon-Sung Suh, Hee-Young Chu
  • Patent number: 8227988
    Abstract: Provided is a material for forming barrier ribs, barrier ribs formed using the material, and a PDP comprising the barrier ribs. The material is photosensitive and made from a glass frit composition which is environmentally friendly (no Pb or Bi) and also prevents light scattering. The primary component of the glass frit is P2O5. Other components can be included in the barrier rib forming material such as an alkali-based metal oxide, B2O3, SiO2, etc. The barrier rib formed of the glass frit can additionally include a photosensitive organic material which may include a crosslinking agent, a polyfunctional monomer or oligomer, a photo initiator, a binder and an additive. A method of forming the barrier ribs comprising the glass frit composition is also provided as is a PDP including such barrier ribs.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: July 24, 2012
    Assignee: Samsung SDI Co., Ltd
    Inventors: Beom-Wook Lee, Jong-Seo Choi, Kwi-Seok Choi, Myung-Duk Lim, Bum-Jin Chang, Jong-Hee Hwang
  • Patent number: 8223090
    Abstract: A plasma display device is disclosed. The device includes a plasma display panel including an address electrode, first and second display electrodes crossing the address electrode, a dielectric layer covering the display electrodes, and an MgO protective layer covering the dielectric layer. The device also includes a driver configured to generate a sustain pulse width of 1 to 3.5 ?s, and a statistical delay time (Ts) depending on temperature is represented by the following Formula 1: y=A×e?kx??(Formula 1), wherein k is a constant, x is 1/temperature, y is 1/Ts, and A is a constant. The MgO protective layer may be formed by MgO deposition in which water vapor partial pressure is in a range of from 2×10?7 to 6×10?7 Torr·l/s. The temperature dependency of the discharge characteristics is reduced, response speed is improved, and the discharge stability is improved.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: July 17, 2012
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Ki-Dong Kim
  • Patent number: 8222816
    Abstract: A multi plasma display panel is disclosed. The multi plasma display panel includes a plurality of plasma display panels positioned adjacent to one another, each of the plurality of plasma display panels including, a front substrate on which a first electrode is positioned, a rear substrate on which a second electrode crossing the first electrode is positioned, a barrier rib between the front substrate and the rear substrate, the barrier rib providing a plurality of discharge cells, and an exhaust hole on the rear substrate. The exhaust hole is formed in at least one of the plurality of discharge cells. A size of a discharge cell in which the exhaust hole is formed is greater than a size of at least one discharge cell in which the exhaust hole is not formed.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: July 17, 2012
    Assignee: LG Electronics Inc.
    Inventors: Soomyun Lee, Yonggi Choi, Kyungtae Kim
  • Patent number: RE44445
    Abstract: A partition is formed by the process including a step for providing a sheet-like partition material that covers a display area and outside thereof on the surface of the substrate, a step for providing a mask for patterning that covers the display area and the outside thereof, so that a pattern of the portion arranged outside of the display area of the mask is a grid-like pattern, a step for patterning the partition material covered partially with the mask by a sandblasting process, and a step for baking the partition material after the patterning.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: August 20, 2013
    Assignees: Hitachi Consumer Electronics Co., Ltd., Hitachi, Ltd.
    Inventors: Akihiro Fujinaga, Kazunori Ishizuka, Tatsutoshi Kanae, Kazuhide Iwasaki, Toshiyuki Nanto, Yoshimi Kawanami, Masayuki Shibata, Yasuhiko Kunii, Tadayoshi Kosaka, Osamu Toyoda, Yoshimi Shirakawa