Semiconductors For Nonelectrical Property Patents (Class 324/71.5)
  • Patent number: 8558288
    Abstract: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: October 15, 2013
    Assignee: Life Technologies Corporation
    Inventors: Jonathan M. Rothberg, Wolfgang Hinz, Kim L. Johnson
  • Patent number: 8558326
    Abstract: Semiconductor devices having integrated nanochannels confined by nanometer spaced electrodes, and VLSI (very large scale integration) planar fabrication methods for making the devices. A semiconductor device includes a bulk substrate and a first metal layer formed on the bulk substrate, wherein the first metal layer comprises a first electrode. A nanochannel is formed over the first metal layer, and extends in a longitudinal direction in parallel with a plane of the bulk substrate. A second metal layer is formed over the nanochannel, wherein the second metal layer comprises a second electrode. A top wall of the nanochannel is defined at least in part by a surface of the second electrode and a bottom wall of the nanochannel is defined by a surface of the first electrode.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Stefan Harrer, Stanislav Polonsky, Mark B. Ketchen, John A. Ott
  • Publication number: 20130265031
    Abstract: A nanogap sensor includes a first layer in which a micropore is formed; a graphene sheet disposed on the first layer and including a nanoelectrode region in which a nanogap is formed, the nanogap aligned with the micropore; a first electrode formed on the grapheme sheet; and a second electrode formed on the graphene sheet, wherein the first electrode and the second electrode are connected to respective ends of the nanoelectrode region.
    Type: Application
    Filed: September 6, 2012
    Publication date: October 10, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeo-young SHIM, Tae-han JEON, Kun-sun EOM, Dong-ho LEE, Hee-jeong JEONG, Seong-ho CHO
  • Patent number: 8479558
    Abstract: A method and apparatus for sensing analyte. The method includes the steps of sensing one or more parameters in reaction to the presence of one or more analytes and outputting a current therefrom in accordance with level of the sensed parameter by each of a plurality of sensors, each of the plurality of sensors being provided in one or more sensor array columns, receiving an output current from one of the plurality of sensors from each of the plurality of sensor arrays by a Voltage Controlled Oscillator (VCO) arranged in a VCO array. The method further includes the steps of generating an output oscillation frequency by each VCO in accordance with the level of the received output current, and counting a number of oscillations over a predetermined time received from each of the plurality of VCOs in the VCO array by a plurality of counters arranged in a counter array.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 9, 2013
    Assignee: Sensorbit Systems, Inc.
    Inventors: Klaus Dimmler, Thomas Moss, III
  • Patent number: 8438902
    Abstract: An apparatus for sensing analyte is provided. The apparatus may include a plurality of sensor array columns, each sensor array column including a plurality of sensors, each sensor being adapted for sensing one or more parameters in reaction to the presence of one or more analytes and output a current therefrom in accordance with level of the sensed parameter, a Voltage Controlled Oscillator (VCO) array including a plurality of VCOs, each VCO adapted to receive an output current from one of the plurality of sensors from each of the plurality of sensor arrays and for and generating an output oscillation frequency in accordance with the level of the received output current, and a counter array including a plurality of counters, each counter adapted to receive an output from a corresponding VCO and count a number of oscillations over a predetermined time.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: May 14, 2013
    Assignee: Sensorbit System, Inc.
    Inventors: Klaus Dimmler, Thomas Moss, III
  • Patent number: 8436622
    Abstract: Disclosed are a measurement method and a measurement apparatus both of which can measure the content of water or an organic acid in a polar organic solvent with high accuracy even when water or the organic acid is contained in the polar organic solvent at a low content. The content of water or an organic acid in a polar organic solvent can be measured by using, as a work electrode, an ISFET electrode in which a thin film comprising an oxide or nitride of a metal or metalloid element belonging to Groups 3 to 15 is formed on a gate.
    Type: Grant
    Filed: December 26, 2008
    Date of Patent: May 7, 2013
    Assignee: Horiba, Ltd.
    Inventors: Yuji Nishio, Yasukazu Iwamoto
  • Patent number: 8432149
    Abstract: The described embodiments may provide a chemical detection circuit with an improved signal-to-noise ration. The chemical detection circuit may include a current source, a chemical detection pixel, an amplifier and a capacitor. The chemical detection pixel may comprise a chemical-sensitive transistor that may have a first and second terminals and a row-select switch coupled between the current source and chemically-sensitive transistor. The amplifier may have a first input and a second input, with the first input coupled to an output of the chemically-sensitive transistor via a switch and the second input coupled to an offset voltage line. The capacitor may be coupled between an output of the amplifier and the first input of the amplifier. The capacitor and amplifier may form an integrator and may be shared by a column of chemical detection pixels.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: April 30, 2013
    Assignee: Life Technologies Corporation
    Inventor: Peter Levine
  • Patent number: 8432150
    Abstract: Methods are described for reading a chemically-sensitive field-effect transistor (chemFET) with an improved signal-to-noise ratio. In one embodiment, a method is described for reading a chemFET having a first terminal and a second terminal, and a floating gate coupled to a passivation layer. The method includes biasing the first terminal of the chemFET to a first bias voltage during a read interval. The second terminal of the chemFET is coupled to a data line during the read interval. A current is induced through the chemFET via the data line. An output signal proportional to an integral of a voltage or current on the data line is generated in response to the induced current through the chemFET during the read interval.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: April 30, 2013
    Assignee: Life Technologies Corporation
    Inventor: Peter Levine
  • Patent number: 8421487
    Abstract: A method and a device for monitoring at least one output stage for an inductive load using a current regulator and an analysis device are described. A short circuit to a power supply or to ground is detected by comparing at least one current value in a switching phase of the at least one output stage with at least one current value in a free-wheeling phase of the at least one output stage.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: April 16, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Christian Lammers, Jochen Neumeister, Hans Raub, Steffen Reinhardt, Danilo Marcato
  • Patent number: 8421437
    Abstract: Circuits are described for reading a chemically-sensitive field-effect transistor (chemFET) with an improved signal-to-noise ratio. In one embodiment, a device is described that includes a chemFET including a first terminal and a second terminal, and a floating gate coupled to a passivation layer. An integrator circuit is coupled to the second source/drain terminal of the chemFET via a data line. The integrator circuit applies a bias voltage to the data line during a read interval, thereby inducing a current through the chemFET based on a threshold voltage of the chemFET. The integrator circuit then generates an output signal proportional to an integral of the induced current through the chemFET during the read interval.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: April 16, 2013
    Assignee: Life Technologies Corporation
    Inventor: Peter Levine
  • Patent number: 8405406
    Abstract: A detection apparatus and an imaging apparatus are capable of accurately conducting non-destructive observation of a target by using an incoherent electromagnetic wave. The detection apparatus has a generating section, a first coupler section, a delaying section, a second coupler section and a signal processing section. The generating section 101 includes a coherent electromagnetic wave source 102 and a diffusing section 103 for generating a pseudoincoherent electromagnetic wave by changing a propagation state of the coherent electromagnetic wave in accordance with a code pattern. The incoherent electromagnetic wave is split into first and second waves and the first wave is affected by the target of observation while the second wave is delayed by the delaying section. The first and second waves are then coupled to produce a coupled wave having a correlation signal of them and the signal is utilized to acquire information on the inside of the target of observation.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: March 26, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takeaki Itsuji
  • Patent number: 8354671
    Abstract: A technique for setting Vgg in an IC is disclosed. The technique includes specifying a design reliability lifetime for the IC, and a relationship between maximum gate bias and gate dielectric thickness for the IC sufficient to achieve the design reliability lifetime is established. The IC is fabricated and the gate dielectric thickness is measured. A maximum gate bias voltage is determined according to the gate dielectric thickness and the relationship between maximum gate bias and gate dielectric thickness, and a Vgg trim circuit of the IC is set to provide Vgg having the maximum gate bias voltage that will achieve the design reliability lifetime according to the measured gate dielectric thickness.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: January 15, 2013
    Assignee: Xilinx, Inc.
    Inventors: Hsung Jai Im, Henley Liu, Jae-Gyung Ahn, Tony Le, Patrick J. Crotty
  • Patent number: 8299775
    Abstract: A method, system and program product for replacing isotropic hole shapes in a wiring layout with non-equiaxial hole shapes that are arranged in a direction of current flow, which increases current flow along the wire's longitudinal axis while decreasing current flow along the wire's transverse axis. One aspect of the invention includes a method including determining a direction of electrical current flow in a portion of a wiring layout; and placing at least one non-equiaxial hole shape within the portion of the wiring layout, wherein the non-equiaxial hole shape is arranged in the direction of electrical current flow. The invention accommodates the limitations of copper CMP within an automated tool without sacrificing the efficiency of a hand-tuned layout. The invention also includes a semiconductor device including at least one non-equiaxial hole shape.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Howard S. Landis, David Parker, Jeanne-Tania Sucharitaves
  • Patent number: 8294476
    Abstract: A method for measuring values from a sensor cell having the basic structure of an MOS silicone transistor having and including a polymer material therein. The method includes the steps of expelling an analyte from the polymer material, determining a silicon current signature before analyte accumulation in a sensitive response region, introducing analyte into the polymer material, determining the silicon current signature immediately after analyte introduction, determining the organic current signature immediately after analyte introduction, allowing analyte accumulation in the polymer material, determining the silicon current signature after analyte accumulation, determining the organic current signature after analyte accumulation, and determining the silicon current signature after analyte accumulation in sensitive response region.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: October 23, 2012
    Assignee: Sensorbit Systems, Inc.
    Inventors: Klaus Dimmler, Thomas Moss, III
  • Patent number: 8129978
    Abstract: To realize a small size and high detection accuracy in a substance detection apparatus. A charge detection field effect transistor and a control circuit therefor are provided in each cell, and the control circuit controls the charge detection field effect transistor so that the drain-source voltage and the drain current of the charge detection field effect transistor are always maintained constant. The control circuit may be formed in a CMOS configuration including a small number of elements in a small area using a standard CMOS integrated circuit technique.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: March 6, 2012
    Assignee: National University Corporation Nagoya University
    Inventor: Kazuo Nakazato
  • Publication number: 20120001616
    Abstract: The described embodiments may provide a chemical detection circuit. The chemical detection circuit may comprise a column of chemically-sensitive pixels. Each chemically-sensitive pixel may comprise a chemically-sensitive transistor, and a row selection device. The chemical detection circuit may further comprise a column interface circuit coupled to the column of chemically-sensitive pixels and an analog-to-digital converter (ADC) coupled to the column interface circuit. Each column interface circuit and column-level ADC may be arrayed with other identical circuits and share critical resources such as biasing and voltage references, thereby saving area and power.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 5, 2012
    Applicant: LIFE TECHNOLOGIES CORPORATION
    Inventor: Keith FIFE
  • Publication number: 20120001615
    Abstract: The described embodiments may provide a chemical detection circuit with an improved signal-to-noise ration. The chemical detection circuit may include a current source, a chemical detection pixel, an amplifier and a capacitor. The chemical detection pixel may comprise a chemical-sensitive transistor that may have a first and second terminals and a row-select switch coupled between the current source and chemically-sensitive transistor. The amplifier may have a first input and a second input, with the first input coupled to an output of the chemically-sensitive transistor via a switch and the second input coupled to an offset voltage line. The capacitor may be coupled between an output of the amplifier and the first input of the amplifier. The capacitor and amplifier may form an integrator and may be shared by a column of chemical detection pixels.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 5, 2012
    Applicant: LIFE TECHNOLOGIES CORPORATION
    Inventor: Peter LEVINE
  • Publication number: 20110074381
    Abstract: Embodiments of the invention include sensors comprising high electron mobility transistors (HEMTs) with capture reagents on a gate region of the HEMTs. Example sensors include HEMTs with a thin gold layer on the gate region and bound antibodies; a thin gold layer on the gate region and chelating agents; a non-native gate dielectric on the gate region; and nanorods of a non-native dielectric with an immobilized enzyme on the gate region. Embodiments including antibodies or enzymes can have the antibodies or enzymes bound to the Au-gate via a binding group. Other embodiments of the invention are methods of using the sensors for detecting breast cancer, prostate cancer, kidney injury, glucose, metals or pH where a signal is generated by the HEMT when a solution is contacted with the sensor. The solution can be blood, saliva, urine, breath condensate, or any solution suspected of containing any specific analyte for the sensor.
    Type: Application
    Filed: December 13, 2010
    Publication date: March 31, 2011
    Applicant: University of Florida Research Foundation, Inc.
    Inventors: Fan REN, Stephen John PEARTON, Tanmay LELE
  • Patent number: 7901553
    Abstract: A system for sensing a gas stream constituent comprises: (a) a thermally conductive, electrically insulative substrate, (b) a gas-sensing element mounted on the substrate and capable of sensing the constituent, (c) a reference element mounted on the substrate having electrical properties congruent with the gas-sensing element and being insensitive to the constituent, (d) an electronic circuit interconnecting the gas-sensing element and the reference element. The circuit is capable of actuating both of the elements and measuring the voltage difference between the elements. The voltage difference is proportional to the concentration of the constituent in the gas stream.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: March 8, 2011
    Assignee: H2scan Corporation
    Inventors: Timothy Howard, Carlton Salter
  • Publication number: 20110050201
    Abstract: The present invention relates to a Sub-threshold Field Effect Transistor (SF-FET). The invention integrates a MEMS mechanical transducer along with the sensing mechanism in a single device. Forced mass is capacitively coupled onto the FET structure. Dielectric SiO2 forms good interface with underlying silicon substrate. Air dielectric forms second dielectric wherein effective gate capacitance is the series combination of the second dielectric capacitance and fixed dielectric. Inertial displacements are sensed by observing change in drain current (ID) of the sensor due to change in gap height (T Gap) of the second dielectric of the sensor caused by forced mass.
    Type: Application
    Filed: June 19, 2008
    Publication date: March 3, 2011
    Applicant: INDIAN INSTITUTE OF SCIENCE
    Inventors: Navakanta Bhat, Rudra Pratap, Thejas
  • Patent number: 7852466
    Abstract: To provide an apparatus capable obtaining a temporal waveform of terahertz waves transmitted through or reflected by a sample in a set region. A delay unit is configured to change a timing at which the detection unit detects terahertz waves transmitted through or reflected by a sample, which is originated from terahertz waves generated by a generation unit. A waveform obtaining unit is configured to obtain a temporal waveform of the transmitted terahertz waves which are obtained by using the delay unit. The delay unit, of which more than one may be used, is controlled so that the detection unit detects the transmitted terahertz waves in an area related to the temporal waveform set on the basis of information related to the sample that is pre-stored in the storage unit. Then, a temporal waveform of the transmitted terahertz waves in the area is obtained.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: December 14, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takeaki Itsuji
  • Patent number: 7838912
    Abstract: A semiconductor sensing field effect transistor uses an organic unimolecular film formed on a gate insulating layer. In the semiconductor sensing field effect transistor and a semiconductor sensing device, the gate insulating layer has a stack structure wherein a second silicon oxide layer is stacked on a first silicon oxide layer through a silicon nitride layer. A semiconductor sensor chip and the semiconductor sensing device are provided with a field effect transistor chip wherein the gate insulating layer, a source electrode and a drain electrode are integrated on a silicon board, a source electrode terminal wiring connected with the source electrode, and a drain electrode terminal wiring connected with the drain electrode.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: November 23, 2010
    Assignee: Waseda University
    Inventors: Daisuke Niwa, Ichiro Koiwa, Tetsuya Osaka
  • Patent number: 7816152
    Abstract: Methods and systems for in situ process control, monitoring, optimization and fabrication of devices and components on semiconductor and related material substrates includes a light illumination system and electrical probe circuitry. The light illumination system may include a light source and detectors to measure optical properties of the in situ substrate while the electrical probe circuitry causes one or more process steps due to applied levels of voltage or current signals. The electrical probe circuitry may measure changes in electrical properties of the substrate due to the light illumination, the applied voltages and/or currents or other processes. The in situ process may be controlled on the basis of the optical and electrical measurements.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: October 19, 2010
    Assignee: WaferMaster, Inc.
    Inventors: Woo Sik Yoo, Kitaek Kang
  • Publication number: 20100236035
    Abstract: A system and method for detecting a defect in a solar cell and repairing and characterizing a solar cell includes applying a test signal to the solar cell, monitoring the response of solar cell, detecting a defect associated with its location during the monitoring step, removing or isolating the defect from a solar cell and characterizing solar cell performance. The defect may be a short between the emitter and the base of solar cell. The system and method also detect a precise location of the defect based on the use of light valve panel (LVP), which can control the input beam to or output beam from the solar cell in terms of size, position, gray level, and wavelength of the transmitted light. The LVP may be realized in any one of a variety of ways. For example, the active matrix liquid crystal display (AMLCD) such as Thin Film Transistor driven LCD (TFT-LCD) may be used as the LVP.
    Type: Application
    Filed: March 19, 2009
    Publication date: September 23, 2010
    Inventor: Kyo Young Chung
  • Patent number: 7795593
    Abstract: A semiconductor wafer is radiated with an electron beam so that the inelastic scattering takes place in the narrow region, and current flows out from the narrow region; the amount of current is dependent on the substance or substances in the narrow region so that the analyst evaluates the degree of contamination on the basis of the substance or substances specified in the narrow region.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: September 14, 2010
    Assignee: TOPCON Corporation
    Inventors: Takeo Ushiki, Keizo Yamada, Yohsuke Itagaki, Tohru Tsujide
  • Publication number: 20100188069
    Abstract: Embodiments of the invention include sensors comprising high electron mobility transistors (HEMTs) with capture reagents on a gate region of the HEMTs. Example sensors include HEMTs with a thin gold layer on the gate region and bound antibodies; a thin gold layer on the gate region and chelating agents; a non-native gate dielectric on the gate region; and nanorods of a non-native dielectric with an immobilized enzyme on the gate region. Embodiments including antibodies or enzymes can have the antibodies or enzymes bound to the Au-gate via a binding group. Other embodiments of the invention are methods of using the sensors for detecting breast cancer, prostate cancer, kidney injury, glucose, metals or pH where a signal is generated by the HEMT when a solution is contacted with the sensor. The solution can be blood, saliva, urine, breath condensate, or any solution suspected of containing any specific analyte for the sensor.
    Type: Application
    Filed: March 15, 2010
    Publication date: July 29, 2010
    Inventors: FAN REN, Stephen John Pearton, Tanmay Lele, Hung-Ta Wang, Byoung-Sam Kang
  • Publication number: 20100109637
    Abstract: A sensor system for detecting the presence of one or more target substances reacting with one or more target recognition element types for producing an electrical charge detectable by a differential pair of field effect transistors that provide increased sensitivity by minimizing common mode effects on the differential pair. The differential pair is controlled by optimization algorithms in a digital signal processor that reads and store electrical characteristics of the differential pair and maintains the differential pair at optimal operating points based on continuously monitoring the differential pair. One or more target recognition element types are disbursed over a sensor gate area of the differential pair that detects one or more signature signals created by the binding of one or more target substances and the target recognition element types. The detected signature signals are compared with a library of stored signature signals for determining the identity of the target substances.
    Type: Application
    Filed: December 24, 2008
    Publication date: May 6, 2010
    Applicant: BIOWARN, LLC
    Inventor: Vladisav A. OLEYNIK
  • Publication number: 20100088040
    Abstract: Chemical field effect sensors comprising nanotube field effect devices having biopolymers such as single stranded DNA or RNA functionally adsorbed to the nanotubes are provided. Also included are arrays comprising the sensors and methods of using the devices to detect volatile compounds.
    Type: Application
    Filed: July 13, 2007
    Publication date: April 8, 2010
    Applicant: The Trustees of the University of Pennsylvania
    Inventor: Alan T. Johnson, JR.
  • Publication number: 20100007326
    Abstract: [Object] To realize a small size and high detection accuracy in a substance detection apparatus. [Solving Means] A charge detection field effect transistor and a control circuit therefor are provided in each cell, and the control circuit controls the charge detection field effect transistor so that the drain-source voltage and the drain current of the charge detection field effect transistor are always maintained constant. The control circuit may be formed in a CMOS configuration including a small number of elements in a small area using a standard CMOS integrated circuit technique.
    Type: Application
    Filed: July 11, 2007
    Publication date: January 14, 2010
    Inventor: Kazuo Nakazato
  • Patent number: 7646190
    Abstract: A stress measurement device includes a current supply portion; a series circuit which is connected to the current supply portion and has a piezoresistive element that forms a single gauge resistance and a compensating diode that is connected in series to the piezoresistive element; and a voltage measuring portion that measures voltage between both ends of the series circuit. The single gauge resistance has a piezoresistive effect in which a resistance value changes according to applied stress, and a positive temperature characteristic in which the resistance value increases depending on an increase in temperature. The compensating diode is provided in a forward direction with respect to the current supply portion and has a negative temperature characteristic in which a voltage between an anode and a cathode of the compensating diode decreases depending on the increase in temperature.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: January 12, 2010
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kentaro Mizuno, Shoji Hashimoto, Hidenori Moriya, Hiromichi Yasuda
  • Patent number: 7635602
    Abstract: There is provided a method for simulating ion implantation which includes the steps of calculating an integral value ?a/c by integrating concentration distribution of Ge in a test silicon substrate from the thickness of an amorphous layer to infinite, acquiring a form parameter of the Ge concentration distribution in a product silicon substrate by referring to a database, creating a distribution function which approximates the Ge concentration distribution by using the form parameter, and obtaining such a depth that an integral value obtained by integrating the distribution function from the depth to infinite can be equal to the integral value ?a/c, and then specifying that the depth is the thickness of an amorphous layer.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: December 22, 2009
    Assignee: Fujitsu Limited
    Inventor: Kunihiro Suzuki
  • Patent number: 7598722
    Abstract: Method and system for periodically measuring the junction temperature of a semiconductor device. The junction exited by at least two sequential predetermined currents of different magnitudes. The voltage response of the junction to the at least two currents is measured and the temperature of the junction is calculated, while substantially canceling ohmic effects, by using the voltage response and a correction factor obtained by periodically. Whenever desired, the junction is exited by a set of at least four sequential different currents having known ratios. The voltage response to the set is measured and the correction factor is calculated by using each voltage response to the set.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: October 6, 2009
    Assignee: Nation Semiconductor Corporation
    Inventor: Ohad Falik
  • Patent number: 7551269
    Abstract: To provide an apparatus capable obtaining a temporal waveform of terahertz waves transmitted through or reflected by a sample in a set region. A delay unit is configured to change a timing at which the detection unit detects terahertz waves transmitted through or reflected by a sample, which is originated from terahertz waves generated by a generation unit. A waveform obtaining unit is configured to obtain a temporal waveform of the transmitted terahertz waves which are obtained by using the delay unit. The delay unit, of which more than one may be used, is controlled so that the detection unit detects the transmitted terahertz waves in an area related to the temporal waveform set on the basis of information related to the sample that is pre-stored in the storage unit. Then, a temporal waveform of the transmitted terahertz waves in the area is obtained.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: June 23, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takeaki Itsuji
  • Publication number: 20090146639
    Abstract: Provided is a detector having a transistor or resistor structure. When an electrode is exposed to a detected solution, such as blood, a variation in current flowing through the detected solution may be greater than a variation in the electrical characteristics of the detector caused by a variation in the physical properties of semiconductor so that it is difficult to detect whether a bio-particle is contained in the detected solution. In order to solve this problem, a detection portion and an electrical measurement portion are separately formed, and the detection portion is processed with the bio-particle and then post-processed. Subsequently, the detection portion and the electrical measurement portion are bonded to each other using, for example, a laminating process, and the detector measures a detection value.
    Type: Application
    Filed: July 29, 2008
    Publication date: June 11, 2009
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seong Hyun Kim, Yong Suk Yang, Sang Chul Lim, Zin Sig Kim, Yoon Ho Song
  • Publication number: 20090140718
    Abstract: A wavelength meter, an associated method, and system are generally described. In one example, an apparatus includes a photodiode to receive an optical signal and to generate a photocurrent upon receiving the optical signal, the photodiode having an absorption edge that is substantially aligned with a band of wavelengths, wherein the absorption edge shifts toward longer wavelengths when a reverse bias is applied to the photodiode, and control electronics coupled with the photodiode to apply at least a first reverse bias and a second reverse bias to the photodiode, wherein a ratio of a first measurement of the photocurrent at the first reverse bias and a second measurement of the photocurrent at the second reverse bias provides information about the wavelength of the optical signal.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 4, 2009
    Inventors: Sergei Sochava, John Hutchinson
  • Patent number: 7538538
    Abstract: A four terminal field effect device comprises a silicon field effect device with a silicon N-type semiconductor channel and an N+ source and drain region. An insulator is deposited over the N-type semiconductor channel. An organic semiconductor material is deposited over the insulator gate forming a organic semiconductor channel and is exposed to the ambient environment. Drain and source electrodes are deposited and electrically couple to respective ends of the organic semiconductor channel. The two independent source electrodes and the two independent drain electrodes form the four terminals of the new field effect device. The organic semiconductor channel may be charged and discharged electrically and have its charge modified in response to chemicals in the ambient environment. The conductivity of silicon semiconductor channel is modulated by induced charges in the common gate in response to charges in the organic semiconductor channel.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: May 26, 2009
    Assignee: Board of Regents, The University of Texas System
    Inventors: Ananth Dodabalapur, Deepak Sharma, Daniel Fine
  • Publication number: 20090108831
    Abstract: Specific ionic interactions with a sensing material that is electrically coupled with the floating gate of a floating gate-based ion sensitive field effect transistor (FGISFET) may be used to sense a target material. For example, an FGISFET can use (e.g., previously demonstrated) ionic interaction-based sensing techniques with the floating gate of floating gate field effect transistors. The floating gate can serves as a probe and an interface to convert chemical and/or biological signals to electrical signals, which can be measured by monitoring the change in the device's threshold voltage, VT.
    Type: Application
    Filed: December 5, 2008
    Publication date: April 30, 2009
    Inventors: Kalle LEVON, Arifur Rahman, Tsunehiro Sai, Ben Zhao
  • Publication number: 20090079414
    Abstract: Specific ionic interactions with a sensing material that is electrically coupled with the floating gate of a floating gate-based ion sensitive field effect transistor (FGISFET) may be used to sense a target material. For example, an FGISFET can use (e.g., previously demonstrated) ionic interaction-based sensing techniques with the floating gate of floating gate field effect transistors. The floating gate can serves as a probe and an interface to convert chemical and/or biological signals to electrical signals, which can be measured by monitoring the change in the device's threshold voltage, VT.
    Type: Application
    Filed: December 5, 2008
    Publication date: March 26, 2009
    Inventors: Kalle Levon, Arifur Rahman, Tsunehiro Sai, Ben Zhao
  • Publication number: 20090058395
    Abstract: A method is provided for determining the anisotropy of alignment of a random array of 1-D conductive elements (e.g., carbon nanotube or silicon nanowire) formed on a substrate. A pattern of a plurality of electrodes are arranged on the substrate containing the 1-D conductive elements and a plurality of electrical property measurements are performed in a plurality of different directions between the plurality of electrodes. The plurality of measurements are combined together to generate a total measurement sum of electrical property measurements between the various electrodes. The measured electrical property is determined between a selected pair of the plurality of electrodes along a selected direction extending between the selected pair of electrodes. The anisotropy of alignment of the 1-D conductive elements on the substrate along the selected direction is determined based on a ratio of the measured electrical property between the selected pair of electrodes versus the total measurement sum.
    Type: Application
    Filed: April 1, 2008
    Publication date: March 5, 2009
    Inventors: Amol M. Kalburge, Zhen Yu
  • Patent number: 7468549
    Abstract: The invention relates a substrate for a package for an electronic circuit and methods for packaging an electronic circuit with a substrate. The substrate comprises at least one conduction region and an activation region arranged within the substrate. The activation region is generally in contact with the conduction region and is configured to change its electrical resistance when activation occurs.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: December 23, 2008
    Assignee: Infineon Technologies AG
    Inventors: Rory Dickman, Michael Sommer
  • Publication number: 20080290865
    Abstract: An object of the present invention is to provide a method of forecasting and detecting a polishing endpoint and the device thereof and a real time film thickness monitoring method and the device thereof capable of suppressing a Joule heat loss to the minimum due to an eddy current, and precisely forecasting and detecting the polishing endpoint, and moreover, precisely calculating a remaining film amount to be removed and a polishing rate and the like on the spot so as to be able to accurately evaluate whether the predetermined conductive film is appropriately removed.
    Type: Application
    Filed: October 18, 2007
    Publication date: November 27, 2008
    Inventors: Takashi Fujita, Toshiyuki Yokoyama, Keita Kitade
  • Publication number: 20080278140
    Abstract: A four terminal field effect device comprises a silicon field effect device with a silicon N-type semiconductor channel and an N+ source and drain region. An insulator is deposited over the N-type semiconductor channel. An organic semiconductor material is deposited over the insulator gate forming a organic semiconductor channel and is exposed to the ambient environment. Drain and source electrodes are deposited and electrically couple to respective ends of the organic semiconductor channel. The two independent source electrodes and the two independent drain electrodes form the four terminals of the new field effect device. The organic semiconductor channel may be charged and discharged electrically and have its charge modified in response to chemicals in the ambient environment. The conductivity of silicon semiconductor channel is modulated by induced charges in the common gate in response to charges in the organic semiconductor channel.
    Type: Application
    Filed: June 5, 2008
    Publication date: November 13, 2008
    Applicant: Board of Regents, The University of Texas System
    Inventors: Ananth Dodabalapur, Deepak Sharma, Daniel Fine
  • Publication number: 20080265867
    Abstract: A process for measuring the thickness of an insulating material. The process includes providing a device used to measure capacitance, and electrically connecting the capacitance measuring device to a heat sink and an electrical, heat-generating component. The thickness of the insulating material is determined by measuring the capacitance of the insulating material according to the formula; B=?r?0A/C, where B is the thickness of the insulating material, C is the capacitance, A is the area of the heat generating component, ?0 is the permittivity of free space and ?r is the relative dielectric constant of the insulating material.
    Type: Application
    Filed: April 25, 2007
    Publication date: October 30, 2008
    Applicant: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Edward J. Yarmchuk
  • Publication number: 20080158036
    Abstract: An on die thermal sensor (ODTS) in a memory device includes: a band gap unit for detecting a temperature of the memory device to output a first voltage corresponding to the temperature; and an analog-to-digital converting unit for outputting a digital code having temperature information based on the first voltage, the digital code having varied resolution according to temperature ranges.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 3, 2008
    Inventor: Chun-Seok Jeong
  • Publication number: 20080158481
    Abstract: A sensor is provided, which includes a substrate, an insulating layer formed on the substrate, a semiconductor formed on the insulating layer, an ohmic contact formed on the semiconductor, a sensor input electrode and a sensor output electrode formed on the ohmic contact, and a passivation layer formed on the sensor input electrode and the sensor output electrode. A sensor control electrode may also be formed between the substrate and the insulating layer. A thin film transistor array panel including the sensor and a liquid crystal display panel including the sensor are further provided.
    Type: Application
    Filed: March 11, 2008
    Publication date: July 3, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Chan LEE, Hyun-Seok KO, Yun-Jae PARK, Seung-Hwan MOON
  • Publication number: 20080091378
    Abstract: A circuit for outputting temperature data of a semiconductor memory apparatus includes a temperature detecting circuit that generates a temperature voltage corresponding to a change in temperature and outputs the temperature voltage, an A/D converter that converts the temperature voltage into a first temperature code and outputs it, and a temperature data correcting unit that outputs a second temperature code obtained by correcting an error of the first temperature code using a correction code.
    Type: Application
    Filed: June 27, 2007
    Publication date: April 17, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Chun-Seok Jeong, Kang-Seol Lee
  • Publication number: 20080054875
    Abstract: A biometric sensor panel includes (a) a first flexible substrate, (b) a plurality of first electrodes formed on the first flexible substrate, the first electrodes being arranged in a first direction, (c) a semiconductor layer formed on the first electrodes, (d) a second flexible substrate, (e) a plurality of second electrodes formed on the second flexible substrate, the second electrodes being arranged in a second direction crossing the first direction, and (f) a pressure sensitive conductive layer formed on the second electrodes, wherein the first and second flexible substrates face each other such that the semiconductor layer is in contact with the pressure sensitive conductive layer.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 6, 2008
    Applicant: IVI Smart Technologies, Inc.
    Inventor: Tamio Saito
  • Patent number: 7208759
    Abstract: Functional circuits such as a processor, an SRAM, a DRAM and a flash-EEPROM are mounted on a semiconductor chip. Of these functional circuits, for example, the flash-EEPROM which fluctuates a potential of the semiconductor chip is separated from the other circuits by means of a separating region provided in the semiconductor chip. In addition, the separating region is put in contact with the entire side faces of the semiconductor chip.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: April 24, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomomi Momohara
  • Patent number: 7200498
    Abstract: The present invention defines a system (100) for detecting copper contamination within a semiconductor manufacturing process. According to the present invention, a semiconductor wafer (102) is transferred (108) from a semiconductor manufacturing component (104), which may have exposed the wafer to copper contamination, to a measurement system (106). The measurement system measures an electrical value at a plurality of locations along a surface of the wafer, prior to and after exposure of the surface to an activation system (112). The activation system is provided to cause any copper contamination along the surface to form a precipitate thereon. An analysis component (110) is provided to receive electrical value and location information from the measurement system and to identify, from the measurements, the presence and location of copper contamination along the semiconductor wafer surface.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: April 3, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Deepak A. Ramappa
  • Patent number: 7186576
    Abstract: Embodiments of the present technique relate to forming die stacks. Specifically, embodiments of the present technique include a method of forming and testing semiconductor die comprising forming a die stack of at least two semiconductor die without attaching either of the at least two semiconductor die to a substrate. Further, present embodiments include testing the semiconductor die in the die stack after the die stack is formed and prior to attaching either of the at least two semiconductor die to the substrate.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: March 6, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Timothy L. Jackson