Abstract: A monitoring system that is configured to monitor a property is disclosed. In one aspect, the monitoring system includes a sensor that is located at the property and that is configured to generate sensor data. The monitoring system further includes a voltage sensor that is configured to generate voltage data by measuring voltage at an electrical outlet located at the property. The monitoring system further includes a monitor control unit that is configured to receive the sensor data; receive the voltage data; determine an action of an electrical device that is located in the property or that is located at a neighboring property in a vicinity of the property; determine whether the electrical device is located at the property or at the neighboring property in the vicinity of the property; and perform a monitoring system action.

Abstract: The invention provides apparatus and methods for interference based wave synthesis. The invention comprises (i) receiving information defining output wave characteristics, said output wave characteristics comprising at least an output wave frequency B, and an output signal amplitude M, (ii) determining a constant value A and (iii) driving a first input wave generator to generate a first input wave and (iv) driving a second input wave generator to generate a second input wave, such that the interfered wave synthesized by interference of the first input wave and the second input wave has output wave characteristics defined by the received information.

Abstract: In an example, a processing system for a capacitive sensing device includes a sensor module and a determination module. The sensor module comprises a receiver, coupled to a sensor electrode, configured to receive a capacitive sensing signal. The receiver includes an in-phase channel and a quadrature channel. The in-phase channel is configured to mix the capacitive sensing signal with a local oscillator signal substantially in phase with the capacitive sensing signal. The quadrature channel is configured to mix the capacitive sensing signal with a phase-shifted signal near ninety degrees out of phase with the capacitive sensing signal. The determination module is configured to measure a change in capacitance in response to a demodulated signal of the in-phase channel concurrently with measuring a non-coherent signal in response to a demodulated signal of the quadrature channel.

Abstract: A device analyzer for analyzing power devices. An example device analyzer comprises a collector supply to generate supply signal pulses with selected voltage or current levels and a supply signal pulse width at a high current. The supply signal pulses are applied at a collector supply source terminal when DUT is connected to conduct current between the collector supply source terminal and a collector supply common terminal. A supply switch closes or opens the DUT current path in narrow pulses having a narrow pulse width narrower than the supply signal pulses to conduct the supply signal pulses as narrowed sweep signal pulses having the high current capacity of the collector supply current. The supply switch alternatively regulates the current in the current path at constant current levels. Other modules capable of high power test capabilities may also be added.

Abstract: Accumulators that operate to fully or partially remove noise from a signal, including removing noise inserted into the signal by the accumulator itself. In some embodiments, an accumulator may be operated in a sampling phase and a transfer phase each time the accumulator samples an input signal. In some such embodiments, an op-amp of an accumulation circuit of the accumulator may be auto-zeroed during some or all of the sampling phases of an accumulation period. In some embodiments in which the op-amp is auto-zeroed during some or all of the sampling phases, the accumulation circuit may include a holding capacitor that, during an auto-zeroing process, holds a value output by the op-amp during a prior transfer phase. Including such a holding capacitor in an accumulator may reduce a voltage that the op-amp output rises following the auto-zero process, which may reduce a bandwidth and noise of the accumulation circuit.

Abstract: A presentable voltage sensor includes an electrode faced by an electric field probe and connected to a voltage source; a screening conductive shell wrapping the probe and connected to a reference potential; a dielectric material housed within the shell and interposed between the probe and the electrode; a conditioning circuit connected to an exit of the sensor and having a resistor of resistance Rm interposed between the probe and a second reference potential; and an integrator circuit formed from an RC network and having a resistor of resistance Ri, a capacitor of capacitance Ci, and a loss factor which, at a frequency of interest, is of an order of 10?4.

Abstract: A method for identifying a drifted dose integrator in an implantation system and an implantation system are provided. The implantation system includes a first dose integrator and a second dose integrator. The first dose integrator includes a first input configured to receive a first current generated from charges carried by implanted ions in a wafer, and a first output configured to output a first accumulated dosage value. The second dose integrator includes a second dose integrator including a second input configured to receive a second current generated from the charges carried by the implanted ions in the wafer, and a second output configured to output a second accumulated dosage value. The implantation system further includes a processing unit comparing the first accumulated dosage value and the second accumulated dosage value to detect a drift in one of the first and the second dose integrators.

Abstract: An apparatus adapted to measure of current pulses that are very brief (a few nanoseconds) and of very low amplitude (a few microamps), such as those that can emanate from a photodetector used for the optical transmission of data at very high speed, or from a photodetector (photodiode or photoconductor) subject to a radiation that is of pulsed nature (in particular: X, gamma and other radiations). The circuit includes an integration stage (IT), a differentiation stage (DR), and a subtraction stage (SS). The time constants Rp.Cint and R2.C2 of the integration and differentiation stages are preferably equal.

Abstract: A method and apparatus for estimating the changing frequency of a signal received by a satellite receiver from, illustratively, positioning system satellites is disclosed that enables a more accurate measurement of the change in frequency of that signal due to movement of the satellite receiver relative to those satellites. The system includes a PLL having a numerically controlled oscillator (NCO) and a filter of frequency estimates (FFE). In operation, an analog signal is received at the satellite receiver and the PLL tracks the changing signal frequency and outputs non-smoothed frequency estimates into the FFE. The FFE then smoothes noise in the signal to produce a more accurate smoothed frequency estimate of the input signal. Comparing multiple estimates over time allows Doppler shift of the signal frequency received by the satellite receiver to be calculated more precisely, thus resulting in more accurate satellite receiver velocity vector determinations and, hence, position measurements.

Abstract: In one embodiment, a circuit measures picoampere current levels. The circuit comprises: an operational-amplifier that has differential inputs and differential outputs; a switching structure that switchably couples an input line to one of the differential inputs in response signals from a timing circuit; a first integrating capacitor coupled to one of the differential inputs and to one of the differential outputs; a second integrating capacitor coupled to the other of the differential inputs; and a charge injection compensation structure that selectively injects charge into the input line and removes charge from the input line in response to signals from the timing circuit.

Abstract: Detector circuitry for detecting magnetic field disturbances resulting from the movement of equipment through a pipe of magnetic material, the detector circuitry comprising a difference circuit fed with the outputs of two longitudinally spaced sensor means via respective DC blocking means, a saturating difference amplifier feeding an integrator and fed with the outputs of the difference circuit and the integrator, and indicating means fed from the integrator. The detector circuitry may also including level setting means and a comparator fed with the outputs of the integrator and the level setting means and feeding the indicating means. A second comparator may be connected in parallel with the first comparator and fed with the inverse of the output of the level setting means and the output of the integrator.

Abstract: A system for measuring signals in a non-linear network is provided which reduces the reliance on hardware and processing support when correcting for A/D offset by performing a pair of dual slope measurement cycles with an integrating analog to digital converter (ADC) circuit. Each of the measurement cycles has at least four phases including a first integrating phase and a first de-integrating phase followed by a second integrating phase and a second de-integrating phase. The system further includes an ADC controller operatively communicative with the integrating ADC circuit for detecting when the first count value is reached during the second de-integrating phase and then resetting the second count value in response to this detection so that the second count value is offset corrected at the end of the second de-integration phase. As a result, a difference calculation is automatically performed during the measurement cycle.

Abstract: Integrated circuitry including a clock circuit powered by a first power supply and a secondary circuit powered by a second power supply. The secondary circuit includes a control signal output for supplying a control signal to the clock circuit and a clock data output for outputting new clock data to the clock circuit.

Abstract: A system and method of harmonic regulation includes a harmonic regulator configured to cancel or inject harmonics into a power conversion system. A resettable integrator is provided to determine at least one harmonic coefficient of the at least one error signal harmonic. The resettable integrator determines the at least one harmonic coefficient over a single signal period and is then reset. The harmonic regulator further includes at least one adder to determine a difference of the harmonic coefficient and the reference harmonic coefficient and a regulator is provided to determine an at least one axis harmonic reference signal. The harmonic regulator outputs a three-phase final electrical reference signal that is input into a DC/AC inverter of a power conversion system.

Abstract: Photometric apparatus and photometric method measure a wide range of incident light amounts accurately and efficiently. The photometric apparatus includes an optical sensor for delivering a photocurrent; an integrator capacitor for integrating the photocurrent to provide an integrated voltage; a voltage measurer measuring the integrated voltage; an integration time measure for measuring an integration time which the integrator capacitor integrates the photocurrent; for resetting the integrator capacitor whenever the voltage across the integrator capacitor exceeds a given voltage value; a summer summing a total voltage value integrated by the integrator capacitor during the given time including at least one reset; and a photometric calculator for calculating a photometric value based on the total voltage value and on the integration time.

Abstract: In a method and apparatus for measuring the frequency of a signal by integration of its signal phase, a phase accumulator integrates the signal phase of the signal, at predetermined time intervals. A first intermediate memory reads in a first output value of the phase accumulator after a predetermined first number of time intervals, as well as a second output value of the phase accumulator after a predetermined second number of time intervals. A second intermediate memory reads in the first output value of the first buffer register and multiplies it by a first factor which corresponds to the quotient of the second number of time intervals and the first number of time intervals. A subtracter subtracts the first output value multiplied by the first factor from the second output value; and a divider divides the output value of the subtracter by a second factor.

Abstract: A system and method of harmonic regulation includes a harmonic regulator configured to cancel or inject harmonics into a power conversion system. A resettable integrator is provided to determine at least one harmonic coefficient of the at least one error signal harmonic. The resettable integrator determines the at least one harmonic coefficient over a single signal period and is then reset. The harmonic regulator further includes at least one adder to determine a difference of the harmonic coefficient and the reference harmonic coefficient and a regulator is provided to determine an at least one axis harmonic reference signal. The harmonic regulator outputs a three-phase final electrical reference signal that is input into a DC/AC inverter of a power conversion system.

Abstract: Integrated circuitry including a clock circuit powered by a first power supply and a secondary circuit powered by a second power supply. The secondary circuit includes a control signal output for supplying a control signal to the clock circuit and a clock data output for outputting new clock data to the clock circuit.

Abstract: An earth protection device having an input for receiving a first signal representative of an earth fault current, a first signal processing module, and a module for processing protection functions connected to the first signal processing module. The device includes a second signal processing module connected between the input and the first signal processing module for processing the first signal representative of the earth fault current and for supplying to the first signal processing module a second signal representative of the earth fault current. In order to increase the value of the second signal over an RMS value when the fault current comprises pulses of short duration, the second signal has, at decreasing second signal values, a gradient lower than a preset gradient limiting value.

Abstract: An apparatus for converting capacitance in a capacitive sensor into a voltage signal. A capacitive sensor monitors a physical parameter. A capacitance of the sensor varies with the physical parameter. A voltage supply applies an alternating voltage to the capacitive sensor, which creates an output signal from the sensor. A modulator modulates the output signal, which produces a voltage signal that corresponds to the capacitance of the sensor.

Abstract: An arcing fault detector band pass filters the ac current in a protected circuit to generate a sensed current signal with pulses having an amplitude related to the step increases in current produced each time an arc is struck. The envelope of this pulse signal is tracked by a first, slow tracking circuit or envelope detector having a first, long time constant and a second, fast tracking circuit having a second, shorter time constant. When the second tracking signal generated by the second tracking circuit falls below a predetermined fraction of the first tracking signal of the first tracking circuit, a charge pulse modulator generates a pulse of a size which is a function of the amplitude of the most recent pulse in the sensed current signal. When a time attenuated accumulation of the charge pulses maintained on an integrating capacitor reaches a preselected level, an output circuit generates an arcing fault indication.

Abstract: For discrete-time reactance measurement the reactance is activated by a clocked generator device with an electric voltage, an electric current or an electric charge. A clocked analyzer device generates an output signal as a function of the reactance to be measured from discrete-time sampling values of the electric voltage, electric current or electric charge. The generator device and the analyzer device are clocked in synchronism, the clock controlling the generator device and the analyzer device being varied in the same way by a frequency or phase modulator for reducing the influence of narrowband disturbances coupled into the circuit caused by aliasing.

Abstract: Disclosed is a waveform measuring apparatus in which an integration period T can be discretionally set to a value in accordance with the analog voltage cycle of the device being measured with a simple circuit configuration. The waveform measuring apparatus has two integrator circuits for integrating a repeat-cycle analog input with a fixed period. A control portion, consisting of a gate controller and a phase shifter, enables first and second integrators alternatively, such that only one integrator is active at any point in time. The integrals from both integrators are then combined to obtain the integral of the analog input voltage.