Abstract: A method for achieving terminal-pair definition of four-terminal-pair (4TP) impedance and an application thereof are provided, which belongs to the field of precision measurement and metrology. A current output terminal of a two-stage follower is connected to a high current terminal of impedance through a coaxial line, and a voltage output terminal of the two-stage follower is connected to a high voltage terminal of the impedance through the coaxial line, which makes current of the high voltage terminal be 0, and core wire currents and outer wire currents of the high current terminal equal and reverse. The terminal-pair definition of the 4TP impedance can be satisfied; and the follower is added to make a bridge ratio variable and isolate effects of bridge load changes, thereby accelerating a balancing speed of the 4TP impedance bridge, and achieving accurate and fast comparative measurement having high precision of the 4TP AC impedance.

Abstract: Computing device, software and method for calibrating pilot and drive signals of a marine seismic source array using measured data. The method includes receiving a source array geometry and a model of the source array; estimating an initial overall response of the source array based on numerical simulations, the model of the source array, and the source array geometry; generating the pilot and drive signals for the source array based on the initial overall response; determining individual responses of the source elements, which form the source array, based on the source array geometry, the model of the source array, and first measured data; calculating an actual overall response of the source array based on the pilot and drive signals, the model of the source array and second measured data; and adjusting the pilot and drive signals based on the actual overall response of the source array.

Abstract: A sweep generator is employed to generate a sweep to be used by a seismic vibrator device for generating a desired target output spectrum, wherein the frequency sweep is designed so as to comply with one or more constraints imposed by the seismic vibrator device and/or imposed by the environment in which the device is to be used. In one embodiment, a sweep generator determines a sweep for achieving a desired target output spectrum by a given seismic vibrator device in compliance with at least a pump flow constraint imposed by the seismic vibrator device. In another embodiment, a sweep generator determines a sweep for achieving a desired target output spectrum by a given seismic vibrator device in compliance with all of multiple operational constraints of the seismic vibrator device, such as both mass displacement and pump flow constraints. Environmental constraints may also be accounted for in certain embodiments.

Abstract: A system and method to detect the fundamental frequency of an electric input signal using a feedback control loop including a phase error detector, a loop controller, and a digitally controlled oscillator. The frequency detector may detect the fundamental frequency of an electric input signal and produce an output signal representing the fundamental frequency of the electric input signal. The frequency detector may further include a filter that may be coupled to the frequency detector output signal in order to remove spurious tones or noise from the output signal.

Abstract: Systems provide for a test system for capacitors in a digitally controllable oscillator (DCO). The system includes: capacitor toggling logic configured to switch on and off a selected one of the capacitors at a modulation frequency; a tone generator configured to generate a tone; a mixer configured to receive the tone and an output carrier signal from the DCO while the capacitor toggling logic is switching the selected one of the capacitors on and off and to output an intermediate frequency signal having FM sidebands based on the modulation frequency and relative capacitor size; and an evaluation circuit configured to evaluate a frequency deviation associated with the selected one of the capacitors based on at least one of the FM sidebands.

Abstract: The invention provides a phase-locked loop with loop gain calibration and methods for measuring an oscillator gain, gain calibration and jitter measurement for a phase-locked loop. The method for measuring an oscillator gain of a phase-locked loop includes the steps of providing a varying code at an input end of the oscillator; outputting excess reference phase information by a reference phase integral path and outputting excess feedback phase information based on the varying code by a feedback phase integral path; and obtaining an estimated gain information of the oscillator based on the excess reference phase information and the excess feedback phase information.

Abstract: A current sensing circuit includes a current sensing unit, a feedback control unit and a digital output unit. The current sensing unit senses a current and produces a pulse signal according to at least one reference signal and at least one feedback signal. The current sensing unit includes a first capacitor set and a second capacitor set. The current sensing unit selects at least one capacitor in the first capacitor set and at least one capacitor in the second capacitor set according to the current value so as to adjust the precision of the current sensing circuit. The feedback control unit is coupled to the current sensing unit and produces the feedback signals according to a clock signal and the pulse signal. The digital output unit is coupled to the current sensing unit and outputs a digital signal according to the pulse signal.

Abstract: An integrated circuit comprises at least first and second frequency generating circuits, wherein each frequency generating circuit comprises a reference frequency source; a voltage controlled oscillator; and a feedback control circuit for controlling the voltage controlled oscillator to provide a desired output frequency signal. The output of the voltage controlled oscillator of the first frequency generating circuit is switched into the feedback control circuit of the second frequency generating circuit to provide a test signal for testing one or more components of the feedback control circuit of the second frequency generating circuit.

Abstract: A method and apparatus for identifying an islanding condition. In one embodiment, the method comprises altering a phase error response within a phase locked loop (PLL), and determining whether the islanding condition exists based on the altered phase error response.

Abstract: A method for verifying the bandwidth and phase of a digital power control system according to the present invention includes steps of: A. Disturbance Order Reading in which an A/D conversion unit receives an analog signal order and mix it with existing command components in a digital system unit; B. Phase Delay Compensation in which a phase lead compensator is designed that is based on the different sampling frequencies and time delay parameters of the digital system unit, and the phase lead compensator is added to the digital system unit; and C. System Measuring in which a mixed wave calculation unit and a supply unit are added to the digital system unit to make the analog command signal pass through the digital system unit and the mixed wave calculation unit to the supply unit and to further drive a power circuit.

Abstract: A circuit for testing phase detectors in a delay locked loop is provided. The circuit uses a second phase detector arranged to receive the signals entering a first phase detector. Particularly, the circuit is routed such that a signal entering the D input of the first phase detector is inputted into the clock input of the second phase detector, and a signal entering the clock input of the first phase detector is inputted into the D input of the second phase detector. The circuit is also coupled to a test controller located on-die or at a high volume manufacturing (HVM) tester.

Abstract: An integrated circuit for controlling a DC motor is disclosed. The integrated circuit includes at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the motor, the DPS being in signal communication with the motor for receiving a pair of signals having a quadrature relationship; and at least one programmable gain amplifier (PGA) electrically coupled to the motor, the PGA being configured to receive a feedback signal indicative of current flowing through the motor and to apply a second signal to the motor for adjusting the speed of the motor; and at least two analog-to-digital converters (A/D), one A/D being used to quantize the output of the PGA for an off-chip processor; and another A/D to provide motor reference position from an analog sensor, such as a potentiometer; and at least two digital-to-analog converters (D/A), one D/A used to set the motor voltage; and another D/A used to set the motor current limit.

Abstract: Provided are a delay time measurement circuit and method. Since the delay time measurement circuit and method according to the present invention use a delay chain having a feedback structure, a measurable delay time is not limited. In addition, the number of delay elements constituting the delay chain can be reduced, such that the delay time measurement circuit can be implemented in a small layout area.

Abstract: The specific phase position detection circuit detects first and second temporal positions which have respective desired phase offsets from an upper peak position and an lower peak position of an analog signal having periodicity. The specific phase position detection circuit then outputs phase signals indicating the detected first and second temporal positions.

Abstract: In a motor controller, if a failed electric current flow in any one of phases of a motor is detected, a motor control signal is generated, based on a phase other than the phase with the failed electric current flow, in such a manner that a motor electric current matches a required torque except for at a specific rotation angle corresponding to the phase with the failed electric current flow.

Abstract: A method of performing loadflow calculations for controlling voltages and power flow in a power network by reading on-line data of given/specified/scheduled/set network variables/parameters and using control means, so that no component of the power network is overloaded as well as there is no over/under voltage at any nodes in the network following a small or large disturbances.

Abstract: A feedback control device capable of continuously performing high-accuracy, stable control even in cases where any of multiple controllers for controlling a controlled system becomes incapable of control action. A controller (master controller) generates control data for stably controlling a heater by feedback control, controls the heater in accordance with the control data, and sends the control data to the other controller (slave controller). The slave controller receives the control data from the master controller but does not control the heater while the master controller is operating normally. If the master controller develops anomaly and becomes incapable of normal control action, the slave controller initiates feedback control of the heater in accordance with the control data received from the master controller immediately before the anomaly occurred, and controls the heater thereafter in accordance with control data generated thereby.

Abstract: The traveling wave excitation system phase shifter chassis method and device of the invention is compact, inexpensive, and versatile when compared to customary methods for generating traveling wave excitation signals that would require using an equivalent number of commercial function generators. The method and device of the invention produces up to 56 simultaneous sine waves that are phase shifted with respect to one another.

Abstract: The present invention is a method and apparatus for regulating current consumption and output current of a charge pump. According to some embodiments of the present invention, a first current coming into the charge pump and a second current coming into a driver of at least one of one or more stages of the charge pump is measured. A control loop may regulate one or more parameters of the charge pump and/or a load connected to the charge pump, such as by adjusting one or more of: a supply voltage; a stage's voltage; the stage's frequency and/or duty-cycle; and the number of stages.

Abstract: A feedback circuit for a display sign has a number of lights. A resistor is coupled in series with the lights. A voltage measuring circuit is coupled to the resistor.

Abstract: The specific phase position detection circuit detects first and second temporal positions which have respective desired phase offsets from an upper peak position and an lower peak position of an analog signal having periodicity. The specific phase position detection circuit then outputs phase signals indicating the detected first and second temporal positions.

Abstract: Replica output buffers, having the same input/output characteristic as that of an output buffer, respond to the rise of a TEST signal generated by a test pulse generating circuit and causes an output signal to rise at a through rate according to voltage of an SL_SET signal, and causes an output signal to fall at a through rate according to voltage of a CNT signal. A phase comparing circuit makes a comparison between phases of the signals output from the replica output buffers, and outputs an UP signal or Down signal with a length corresponding to a phase difference to a delay control circuit. The delay control circuit changes the voltage of the CNT signal according to the UP signal and the DOWN signal, and adjusts a through rate at which a signal output from the output buffer falls.

Abstract: An electrostatic capacitance detection circuit 10 comprises a DC voltage generator 11, an operational amplifier 14 of which non-inverting input terminal is connected to specific potential, an impedance converter 16, a resistance (R1) 12 connected between the DC voltage generator 11 and an inverting input terminal of the operational amplifier 14, a resistance (R2) 13 connected between the inverting input terminal of the operational amplifier 14 and an output terminal of the impedance converter 16, and a capacitor 15 connected between an output terminal of the operational amplifier 14 and an input terminal of the impedance converter 16. A capacitor to be detected 17 is connected between the input terminal of the impedance converter 16 and specific potential.

Abstract: A current sensing method and circuit for reading out a sensor cell, and a sensing apparatus comprising an array of sensor cells arranged along column lines and a current sensing readout circuit coupled to each column line. The sensor cell is configured to assert a sensor current indicative of a sensed value. In operation, an input node of the readout circuit is coupled to the sensor cell, typically by a column line of a sensor array that includes the sensor cell. Preferably, to read out the sensor cell, the sensor current flows from the sensor cell to the input node and in response, the readout circuit charges a capacitor to a voltage indicative of the sensed value while clamping the input node at a potential that is at least substantially fixed.

Abstract: A small capacity FET is coupled to a power MOSFET to sense voltage across the power MOSFET for determining current carried through the power MOSFET. The FET is turned on when the power MOSFET is turned on to obtain a sense voltage that is fed to a comparator to determine if the voltage across the power MOSFET exceeds a threshold voltage. The output of the comparator is used to shut off the drive for the power MOSFET if the threshold is exceeded. The voltage across the FET can be used with a temperature sense and knowledge of the FET RDSON to obtain a sense feedback of current through the power MOSFET. The FET is controlled with a delay to turn on after the power MOSFET is turned on, and turns off before the power MOSFET turns off.

Abstract: The specification discloses a system and related method for ensuring that power supply units operated in a parallel fashion evenly distribute the load among them. More particularly, the specification discloses a system and related method for correcting current sharing signals produced by each power supply unit for offsets induced by imperfections in the electronic circuitry that produces the current sharing signals.

Abstract: In accomplishing an LC-oscillation VCO circuit which is immune to frequency deviation and a frequency-hopping radio communication apparatus using the VCO circuit, a modulation semiconductor integrated circuit device is designed to control the LC-oscillation VCO directly with data to be transmitted thereby implementing the modulation and switch the carrier frequency for frequency hopping. The integrated circuit device includes a current adjusting circuit which varies the current value of a D/A conversion circuit for producing a control voltage of VCO in accordance with the carrier frequency so that the variation of a modulation control voltage of VCO has a characteristic that is opposite to the characteristic of modulation frequency deviation, thereby nullifying the modulation frequency deviation of VCO.

Abstract: An integrated circuit device having a self-resetting phase-locked loop (PLL) circuit. The PLL circuit generates an output clock signal having a first frequency in a first operating mode and a second frequency in a second operating mode, the second frequency being determined, at least in part, by a reference clock signal. A control circuit within the integrated circuit resets the PLL circuit by selecting the first operating mode for a predetermined time interval, then selecting the second operating mode.

Abstract: An apparatus for detecting a low impedance load on an output of a driver circuit electrically connected to a coil of a fluid dispensing gun. The driver circuit provides a plurality of output signals to the coil in response to respective drive signals. Each drive signal has a waveform commanding the dispensing gun to open, and the waveform has a higher magnitude initial peak period followed by a lower magnitude hold period. A feedback circuit provides a difference signal as a function of a difference between each drive signal and a feedback of a corresponding output signal. A diagnostic circuit is connected to the driver circuit and provides an error signal representing a low impedance error as a function of the difference signal crossing a threshold signal magnitude during an occurrence of the peak period of the drive signal.

Abstract: A method for detecting steady-state convergence of a signal compares a filtered version of the signal or its derivative to a threshold over a given time interval, and a measure of the signal variability is used to tune the filter behavior. In one implementation, the signal is filtered with a high-pass filter, and the cut-off frequency of the filter is adjusted inversely with respect to the measured variability of the signal. In another implementation, the signal derivative is filtered with a low-pass filter, and the cut-off frequency of the filter is adjusted in proportion to the measured variability of the signal. In each case, the variability of the signal is measured by computing a differential of the signal and then smoothing the differential.

Abstract: The specification discloses a system and related method for ensuring that power supply units operated in a parallel fashion evenly distribute the load among them. More particularly, the specification discloses a system and related method for correcting current sharing signals produced by each power supply unit for offsets induced by imperfections in the electronic circuitry that produces the current sharing signals.

Abstract: A method for detecting steady-state convergence of a signal compares a filtered version of the signal or its derivative to a threshold over a given time interval, and a measure of the signal variability is used to tune the filter behavior. In one implementation, the signal is filtered with a high-pass filter, and the cut-off frequency of the filter is adjusted inversely with respect to the measured variability of the signal. In another implementation, the signal derivative is filtered with a low-pass filter, and the cut-off frequency of the filter is adjusted in proportion to the measured variability of the signal. In each case, the variability of the signal is measured by computing a differential of the signal and then smoothing the differential.

Abstract: The error compensating system and method is used in electric power monitoring systems, e.g. protective relays, and includes a test unit for applying a test signal to the front end of a data acquisition section of the power monitoring system and a phase reference module which converts the test signal to a square wave having falling and rising edges corresponding to transitions between the positive and negative portions of the test signal. A programmable logic device determines the zero crossings of the sampled digital signal from the data acquisition system and then determines the time difference between a falling edge of the module output signal and the zero crossing of the sampled digital signal. The time difference is representative of the phase shift produced by the data acquisition components. A compensation circuit adjusts the digitally sampled signals with the amount of the determined phase shift.

Abstract: In accomplishing an LC-oscillation VCO circuit which is immune to frequency deviation and a frequency-hopping radio communication apparatus using the VCO circuit, a modulation semiconductor integrated circuit device is designed to control the LC-oscillation VCO directly with data to be transmitted thereby implementing the modulation and switch the carrier frequency for frequency hopping. The integrated circuit device includes a current adjusting circuit which varies the current value of a D/A conversion circuit for producing a control voltage of VCO in accordance with the carrier frequency so that the variation of a modulation control voltage of VCO has a characteristic that is opposite to the characteristic of modulation frequency deviation, thereby nullifying the modulation frequency deviation of VCO.

Abstract: A non-invasive method and apparatus accurately measures the time difference between two signal edges by optically detecting the emission from a ‘beacon device’ that is modulated as a function of time difference. Through the use of this modulation it is possible to perform timing measurement accurately. Embodiments of a voltage modulator circuit modulate timing information into emission intensity. The method and system of the present invention can be used in applications such as clock skew and pulse width measurements.

Abstract: A non-invasive method and apparatus accurately measures the time difference between two signal edges by optically detecting the emission from a ‘beacon device’ that is modulated as a function of time difference. Through the use of this modulation it is possible to perform timing measurement accurately. Embodiments of a voltage modulator circuit modulate timing information into emission intensity. The method and system of the present invention can be used in applications such as clock skew and pulse width measurements.

Abstract: A phase detector with a linear gain characteristic includes two exclusive-OR gates with inputs connected to an input signal and an inverted input signal and a reference signal in a phase locked loop. The outputs of the exclusive-OR gates are connected to a plurality of switches. The switches are connected to a plurality of resistors and the resistors are connected together to form an output signal. Switches and resistors are selected in complementary pairs by a gain select function to provide a linear gain characteristic for the output signal.

Abstract: A partial discharge measurement system is provided which comprises a digital peak detection circuit. The partial discharge measurement system digitizes and detects both positive and negative slopes of a signal from an electrical device being tested. The partial discharge measurement system controls the shape of pulse capture windows in accordance with different modes of operation, and controls the timing of pulse data capture depending on the mode of operation and the polarity of the signal.

Abstract: A breakdown voltage measurement system is provided which employs a digital peak detection circuit for peak voltage measurement. The breakdown voltage measurement system employs a voltage memory device for storing successive peak values obtained from the digital peak detection circuit. The breakdown voltage measurement system is programmable to commence searching of stored peak values following breakdown of a sample electrical device being tested to determine a voltage measurement immediately before the breakdown occurred.