Abstract: A semiconductor device or the like capable of preventing malfunction of a driver circuit is provided. In a driver circuit for driving a power device used for current supply, a transistor including an oxide semiconductor is used as a transistor in a circuit (specifically, for example, a level shift circuit) requiring a high withstand voltage. In addition, a transistor (for example, a silicon transistor or the like) capable of higher operation than a transistor including an oxide semiconductor is preferably used as a transistor in a circuit (specifically, for example, a buffer circuit, a flip-flop circuit, or the like) requiring a lower withstand voltage than the level shift circuit.

Abstract: A semiconductor device or the like capable of preventing malfunction of a driver circuit is provided. In a driver circuit for driving a power device used for current supply, a transistor including an oxide semiconductor is used as a transistor in a circuit (specifically, for example, a level shift circuit) requiring a high withstand voltage. In addition, a transistor (for example, a silicon transistor or the like) capable of higher operation than a transistor including an oxide semiconductor is preferably used as a transistor in a circuit (specifically, for example, a buffer circuit, a flip-flop circuit, or the like) requiring a lower withstand voltage than the level shift circuit.

Abstract: A single bit status register includes an input flip-flop, an asynchronous latch having an input coupled to an output of the input flip-flop, a comparator for comparing the outputs of the flip-flop and the latch, and an output stage which provides an error output when the comparator determines that the outputs of the flip-flop and the latch are not the same. In this fashion, it is known when a "read" of the status register is invalid due to the presence of the error output. Preferably, the register also includes a reset disabling mechanism which prevents the input flip-flop from being reset until a valid read has occurred. A n-bit status register includes n register sections, where each register section includes an input flip-flop, an asynchronous latch having an input coupled to an output of the input flip-flop, and a register section comparison mechanism for comparing the outputs of the flip-flop and the latch in that register section.