Including Three Or More Terminal Discrete Semiconductor Demodulator Device Patents (Class 329/369)
  • Patent number: 10951168
    Abstract: An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: March 16, 2021
    Assignee: STMicroelectronics SA
    Inventor: Lionel Vogt
  • Patent number: 10627430
    Abstract: A reduced-stage feedback-based envelope detector includes, for example, an input rectifier for rectifying a received modulated input signal and an amplifier for receiving the rectified modulated input signal at an input node. The amplifier compares the rectified modulated input signal with a reference signal, filters the rectified modulated input signal at the input node, and generates an envelope detection signal in response to the comparison and the filtering of the rectified modulated input signal. In an embodiment, the gain of the amplifier is independently determined from the bandwidth of the amplifier.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 21, 2020
    Inventors: Subhashish Mukherjee, Anoop Narayan Bhat
  • Patent number: 9160275
    Abstract: An envelope detection apparatus dynamically controlled in response to an input signal and an envelope detection method thereof are provided. The envelope detection apparatus includes an envelope detector configured to output an envelope of an input signal. The envelope detection apparatus further includes a detection band determination unit configured to determine a detection band based on the input signal. The envelope detection apparatus further includes a detection band controller configured to control a detection band of the envelope detector based on the determined detection band.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: October 13, 2015
    Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and Technology
    Inventors: Seong Joong Kim, Jae Sup Lee, Sang Gug Lee, Jae Seung Lee, Sok Kyun Han
  • Publication number: 20140118061
    Abstract: A demodulation apparatus comprises: an envelope detecting unit configured to receive a signal from the outside and detect an envelope signal from the received signal; a reference voltage generating unit configured to generate a reference voltage on the basis of the detected envelope signal; a comparator configured to output a pulse signal on the basis of the envelope signal detected by the envelope detecting unit and the reference voltage generated by the reference voltage generating unit; and an input signal adjusting unit connected with an envelope signal input terminal of the comparator to selectively adjust a magnitude of the envelope signal input to the comparator.
    Type: Application
    Filed: October 7, 2013
    Publication date: May 1, 2014
    Applicant: LSIS CO., LTD.
    Inventors: Chel Ho CHUNG, Young-Han KIM
  • Patent number: 8508293
    Abstract: An ASK demodulator comprises a rectification circuit which receives and rectifies an ASK signal to generate a rectified current; an active load circuit is coupled to the rectification circuit and receives the rectified current and present an impedance which is inversely proportional to at least a part of the rectified current when a frequency of a base band signal meets a preset condition; a comparator is coupled to the rectification circuit and the active load circuit and receives a reference voltage and a voltage generated based on, at least in part, the rectified current and the impedance, and compares the reference voltage and the generated voltage to generate a demodulated signal.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: August 13, 2013
    Assignee: Beken Corporation
    Inventors: Jiazhou Liu, Dawei Guo, Yangeng Wang
  • Publication number: 20130194036
    Abstract: An envelope detection apparatus dynamically controlled in response to an input signal and an envelope detection method thereof are provided. The envelope detection apparatus includes an envelope detector configured to output an envelope of an input signal. The envelope detection apparatus further includes a detection band determination unit configured to determine a detection band based on the input signal. The envelope detection apparatus further includes a detection band controller configured to control a detection band of the envelope detector based on the determined detection band.
    Type: Application
    Filed: November 21, 2012
    Publication date: August 1, 2013
    Inventors: Seong Joong KIM, Jae Sup LEE, Sang Gug LEE, Jae Seung LEE, Sok Kyun HAN
  • Patent number: 8339194
    Abstract: A new demodulator with low power consumption and high gain which is suitable for CMOS integration is provided. The demodulator makes use of a MOS configured in a “common-source” status so as to achieve a desirable gain.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: December 25, 2012
    Assignee: Beken Corporation
    Inventors: Jiazhou Liu, Dawei Guo
  • Patent number: 8022754
    Abstract: A demodulation circuit, including: an input terminal (IN) inputting a current amplitude modulated signal; a first transistor (101) connected to the input terminal; a capacitance (105) connected to a control terminal of the first transistor; a diode (102) connected between the input terminal and the control terminal of the first transistor; and a first current source (104) applying a current of the input terminal, is provided.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: September 20, 2011
    Assignee: Fujitsu Limited
    Inventors: Daisuke Yamazaki, Andrzej Radecki
  • Patent number: 7907006
    Abstract: According to one embodiment, a threshold adjusting apparatus for a clocked comparator, the clocked comparator comparing an input signal with a threshold in accordance with a clock, the threshold adjusting apparatus comprises an output detection module configured to detect an output from the clocked comparator with the threshold while changing the threshold and a setting module configured to set the threshold when the output detection module detects a change in the output from the clocked comparator as an adjusted threshold.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: March 15, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeyasu Iwata, Toshifumi Yamamoto, Takashi Minemura, Toshiyuki Umeda
  • Patent number: 7855596
    Abstract: A modulation ratio enhancement circuit increases the modulation ratio of a current signal which is ASK-modulated with signal data. A branch unit, an average value detection unit, a comparator and a buffer constitute a demodulation unit so that the signal data is demodulated from a current signal of which the modulation ratio is increased by the modulation ratio enhancement circuit.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: December 21, 2010
    Assignee: Fujitsu Limited
    Inventors: Daisuke Yamazaki, Kunihiko Gotoh
  • Patent number: 7839210
    Abstract: A method and a circuit for detecting a radio-frequency signal, including at least one first MOS transistor with a channel of a first type, having its gate coupled to an input terminal capable of receiving said signal; a circuit for biasing the first transistor, capable of biasing it to a level lower than its threshold voltage; and a circuit for determining the average value of the current in the first transistor.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: November 23, 2010
    Assignee: STMicroeletronics (Rousset) SAS
    Inventors: Gilles Bas, Marc Battista
  • Patent number: 7800436
    Abstract: A shunt regulator performs a control so as to stabilize a voltage obtained by rectifying the radio frequency signal output from an antenna unit at a prescribed voltage value. A signal extraction unit extracts the information signal from a bypass current sent by the shunt regulator for the control when the voltage fluctuates.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: September 21, 2010
    Assignee: Fujitsu Limited
    Inventor: Daisuke Yamazaki
  • Publication number: 20100164724
    Abstract: An exemplary amplitude shift keying (ASM) demodulator and a radio frequency identification (RFID) system using the same are provided. The ASM demodulator is adapted to demodulate an alternating current input signal and generate a demodulated envelope signal. The ASM demodulator includes a signal input terminal group, an input rectifier circuit, a current mirror circuit electrically coupled to the input rectifier circuit, an output stage electrically coupled to the current mirror circuit, and a low pass filter electrically coupled to the output stage. The input rectifier circuit is electrically coupled to the signal input terminal group and adapted to perform a rectifying operation applied to the alternating current input signal. The input rectifier circuit includes a plurality of electrically coupled transistors and a gate electrode of each of the transistors is unconnected with a source electrode and a drain electrode itself.
    Type: Application
    Filed: July 10, 2009
    Publication date: July 1, 2010
    Inventors: Yuan-Jiang Lee, Yueh-Hua Yu, Yi-Jan Chen, Yu-Hsuan Li
  • Publication number: 20090243716
    Abstract: A demodulation circuit, including: an input terminal (IN) inputting a current amplitude modulated signal; a first transistor (101) connected to the input terminal; a capacitance (105) connected to a control terminal of the first transistor; a diode (102) connected between the input terminal and the control terminal of the first transistor; and a first current source (104) applying a current of the input terminal, is provided.
    Type: Application
    Filed: June 10, 2009
    Publication date: October 1, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Daisuke YAMAZAKI, Andrzej Radecki
  • Patent number: 7589586
    Abstract: A high frequency signal detection circuit includes an input terminal for a high frequency signal to be detected, a switch transferring the high frequency signal as intermittent ringing signal to a first node in response to a pulse signal whose frequency is lower than that of the high frequency signal, a transistor amplifying the signal at the first node, and outputting to a second node, a bias generator generating a bias voltage by which the transistor is operated in its weak inversion region, a resonant circuit outputting the bias voltage to the first node, and resonating the high frequency signal, a capacitor removing a high frequency component of the signal at the second node; and a judgment circuit judging whether or not the high frequency signal is inputted by detecting the signal at the second node, which has the same frequency as the pulse signal.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: September 15, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Hiroyuki Toda
  • Publication number: 20090153240
    Abstract: A comparator has a differential input stage, a current source coupled to the differential input stage for providing a tail current to one side of the differential input stage, and a differential load coupled to the differential pair and having at least one diode coupled load transistor per differential side. A load current through either one of the at least one diode coupled load transistor on either differential side is mirrored with a current mirror configuration to provide a current be fed to a respective node, each node being coupled to a respective variable biasing current source and a respective other side of the differential input stage, so as to provide a variable positive feedback to the differential input stage.
    Type: Application
    Filed: August 27, 2008
    Publication date: June 18, 2009
    Applicant: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
    Inventor: Ruediger Ganz
  • Publication number: 20080169873
    Abstract: A high frequency signal detection circuit includes an input terminal for a high frequency signal to be detected, a switch transferring the high frequency signal as intermittent ringing signal to a first node in response to a pulse signal whose frequency is lower than that of the high frequency signal, a transistor amplifying the signal at the first node, and outputting to a second node, a bias generator generating a bias voltage by which the transistor is operated in its weak inversion region, a resonant circuit outputting the bias voltage to the first node, and resonating the high frequency signal, a capacitor removing a high frequency component of the signal at the second node; and a judgment circuit judging whether or not the high frequency signal is inputted by detecting the signal at the second node, which has the same frequency as the pulse signal.
    Type: Application
    Filed: November 21, 2007
    Publication date: July 17, 2008
    Inventor: Hiroyuki Toda
  • Patent number: 7277687
    Abstract: An AM demodulator using totem pole complementary metal oxide semiconductor transistors having a feedback to provide a common gate voltage of approximately half that across the transistors in the totem pole. The AM demodulator used in a hearing assistance device and in a programmer of a hearing assistance device.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: October 2, 2007
    Assignee: Starkey Laboratories, Inc.
    Inventor: John David Terry
  • Patent number: 6580902
    Abstract: Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal are described herein. Briefly stated, such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a demodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.
    Type: Grant
    Filed: April 16, 1999
    Date of Patent: June 17, 2003
    Assignee: ParkerVision, Inc.
    Inventors: David F. Sorrells, Michael J. Bultman, Robert W. Cook, Richard C. Looke, Charley D. Moses, Jr.
  • Patent number: 5936462
    Abstract: An amplitude-modulated carrier signal is demodulated by passage through a limiting amplifier that converts the amplitude-modulated carrier signal to a signal of constant amplitude, and also produces a received signal strength indicator signal. The received signal strength indicator signal is used as the demodulated signal.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: August 10, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Akihiro Muraishi
  • Patent number: 5459434
    Abstract: A detector amplifier includes a first stage, a second stage and a low voltage supply. The first stage has a first input for receiving a first input signal, and an output for outputting a first output signal, and amplifies and/or demodulates the first input signal to form the first output signal. The second stage is coupled in series to the first stage and has a first input for receiving the first output signal, a second input for receiving a second input signal, and an output for outputting a second output signal. The second stage amplifies and/or demodulates the first output signal and the second input signal to form the second output signal. The low-voltage supply is coupled in series with the first and the second stage for supplying a DC current to the stages.
    Type: Grant
    Filed: August 8, 1994
    Date of Patent: October 17, 1995
    Inventors: Rene Liger, Pierre Rochon
  • Patent number: 5418449
    Abstract: The disclosure relates to the servo-control of an electronic circuit that calls for the detection of the power delivered at its output. The disclosed device is essentially constituted by a field-effect transistor with zero bias V.sub.DS mounted between the ground and a matching network at output of the circuit. This transistor behaves either like a capacitor or like a diode. A low-pass filter, connected between the transistor and the network, delivers a detection voltage V.sub.det.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: May 23, 1995
    Assignee: Thomson-CSF Semiconducteurs Specifiques
    Inventors: Gerard Pataut, Stefan Dietsche
  • Patent number: 5126683
    Abstract: A detection circuit of amplitude modulated signals comprises a first bipolar transistor having a base connected to an input terminal, a collector connected to a first voltage source providing a first power voltage and an emitter; a second bipolar transistor having a base, a collector connected to the first voltage source, and an emitter which is coupled commonly to the emitter of the first bipolar transistor; an output terminal connected commonly to the emitter of the first bipolar transistor and the emitter of the second bipolar transistor for providing an output signal; a biasing circuit connected to the base of the first bipolar transistor and to the base of the second bipolar transistor for biasing the first and second bipolar transistor; a control circuit having an input terminal connected to the base of the first bipolar transistor for producing a control signal in response to an amplitude modulated signal supplied to the input terminal; and a variable current source having a first end connected to the
    Type: Grant
    Filed: September 25, 1990
    Date of Patent: June 30, 1992
    Assignee: Fujitsu Limited
    Inventors: Katsuya Ishikawa, Yasuhiro Hashimoto, Chikara Tsuchiya
  • Patent number: 4985685
    Abstract: A detector circuit comprises demodulating means for demodulating an input signal in accordance with a carrier wave applied to the demodulating means, current attenuating means coupled with the demodulating means and for attenuating a signal from the demodulating means while keeping the information contained in the signal intact, and capacitor means, coupled with the output of the current attenuating means, for smoothing a waveform of an output signal of the current attenuating means.
    Type: Grant
    Filed: November 28, 1989
    Date of Patent: January 15, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Hara, Yoshio Wada
  • Patent number: 4890066
    Abstract: Envelope detector comprising a differential amplifier (A), a full-wave rectifier circuit and a smoothing filter (AF), which differential amplifier (A) converts an input voltage into a pair of current signals in phase opposition and which full-wave rectifier circuit comprises a pair of half-wave rectifiers (HWR1, HWR2) for half-wave rectifying the said pair of current signals, coupled to a first combining stage (S) for combining the output signals of the two half-wave rectifiers (HWR1, HWR2) with like polarity, which first combining stage (S) supplies a full-wave rectified signal. In order to reduce d.c. offsets, the detector comprises a frequency-dependent negative feedback loop which comprises a second combining stage (D) coupled to the outputs (R.sub.o1, R.sub.o2) of the pair of half-wave rectifiers (HWR1, HWR2) for combining the output signals of the pair of half-wave rectifiers (HWR1, HWR2) with opposite polarity, said second combining stage (D) being negatively fed back to the input (I.sub.
    Type: Grant
    Filed: August 29, 1988
    Date of Patent: December 26, 1989
    Assignee: U.S. Philips Corporation
    Inventors: Willibrordus G. M. M. Straver, Ernst H. Nordholt