Positive And Negative Feedback Patents (Class 330/104)
  • Patent number: 9819310
    Abstract: Apparatus and methods for multi-mode power amplifiers are provided herein. In certain configurations, a wireless device includes a multi-mode power amplifier including a plurality of amplification paths electrically connected in parallel with one another. The plurality of amplification paths includes a first amplification path including an input stage of a first stage type and an output stage of a second stage type, and a second amplification path including an output stage of the second stage type. The first stage type provides non-inverting gain and the second stage type provides inverting gain. The wireless device further includes a transceiver that provides a radio frequency signal to the multi-mode power amplifier, and that operates the multi-mode power amplifier in a selected power mode chosen from a plurality of power modes based on selectively activating one or more of the plurality of amplification paths.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: November 14, 2017
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Andy Cheng Pang Wu, Younkyu Chung
  • Patent number: 9787256
    Abstract: An amplifier circuit having an improved inter-stage matching network and improved performance. In one embodiment, an RF signal source having an output impedance ZSOURCE is approximately impedance matched through an inductive tuning circuit to a power amplifier having an input impedance ZPA. The inductive tuning circuit includes a tunable capacitor element C1 and inductive elements L1, L2, which may be fabricated as stacked conductor coils. Since the capacitance of C1 is tunable, impedance matching is available over a broad range of RF frequencies. Also provided are DC isolation between the RF signal source and the power amplifier, coupling of a voltage source to the output of the RF signal source through L1, and coupling of a bias voltage to the input of the power amplifier through L2.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: October 10, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Neil Calanca
  • Patent number: 8604873
    Abstract: Achievement of robust stability of a power amplifier (PA) that allows the sharing of the ground between the driver stages and the output stage is shown. A controlled amount of negative feedback is used to neutralize the local positive feedback that results from the driver-to-output stage ground sharing in the signal path, for example, a radio frequency (RF) signal path. The solution keeps a strong drive and a good performance of the PA. Exemplary embodiments are shown for the PA positive feedback neutralization. A first embodiment uses a ground signal divider while another embodiment uses a ground signal divider weighting technique.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: December 10, 2013
    Assignee: RF Micro Devices (Cayman Islands), Ltd.
    Inventors: Baker Scott, George Maxim, Stephen Franck, Chu Hsiung Ho
  • Patent number: 8558288
    Abstract: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: October 15, 2013
    Assignee: Life Technologies Corporation
    Inventors: Jonathan M. Rothberg, Wolfgang Hinz, Kim L. Johnson
  • Patent number: 8497739
    Abstract: There is provided a single-differential converting circuit that can reduce the variations in the input voltage of an operational amplifier sufficiently, made by changes in the voltages input from the exterior, while maintaining the function as the amplifier. The single-differential converting circuit is configured to include: an operational amplifier 104 provided with an inverting input terminal 104a and a noninverting input terminal 104c, for respectively receiving an input signal and a signal indicative of a reference voltage, a noninverting output terminal 104b and an inverting output terminal 104d having opposite polarities to each other; and a positive feedback impedance element 103a connected between one of the two input terminals and one, of the output terminals, having a same polarity with the above one of the two input terminals.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: July 30, 2013
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Kazuo Koyama
  • Patent number: 8476981
    Abstract: A differential amplifier including an input of a balanced type relative to a reference potential; a balanced output; first and second bipolar transistors mounted in common emitter configuration, emitters of the first and second transistors linked by two feedback impedances in series; and a perfect current generator, wherein an impedance Zg at the terminals of the current generator is connected between a common point of the two feedback impedances and the reference potential, the input is connected to a base of the first transistor, a base of the second transistor is linked to the reference potential to form, with a base of the first transistor, the unbalanced input, the balanced output is produced by collectors of the first and second transistors through an impedance matching stage of the output, a correction feedback impedance Zcorr, wherein Zcorr=2·Zg, connects the collector of the second transistor and the base of the first transistor.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: July 2, 2013
    Assignee: Thales
    Inventors: Remi Corbiere, Bruno Louis, Vincent Petit
  • Publication number: 20130147548
    Abstract: A linear amplifier that comprises a signal input terminal that receives an input signal having a first common mode voltage, a voltage amplifier having a non-inverting input terminal that receives a second common mode voltage, a first and a second input resistance connected in series from the signal input terminal to the inverting input terminal of the voltage amplifier, a feedback resistance connected between the inverting input terminal and the output terminal of the voltage amplifier, and a constant current source. The constant current source supplies a constant current to a middle node between the first and the second input resistances. The constant current generates a voltage drop, which is equal to a difference between the first and the second common mode voltages, across the first input resistance. Accordingly, the common mode voltage of the output signal is directly determined by the second common mode voltage.
    Type: Application
    Filed: December 7, 2012
    Publication date: June 13, 2013
    Applicant: KAWASAKI MICROELECTRONICS, INC.
    Inventor: KAWASAKI MICROELECTRONICS, INC.
  • Patent number: 8446217
    Abstract: An amplifying circuit arranged for converting an input signal into an amplified output signal comprising: an input node (11) at an input side of said circuit for receiving said input signal (pi); an output node (9) at an output side of said circuit for outputting said amplified output signal (io); a first gain element (M1) connected between said input and output nodes and provided for converting an input voltage taken from said input signal into a current for forming said amplified output signal; a negative feedback loop (3) over said first gain element, said negative feedback loop having first elements (5, 6) arranged for providing input matching; and a positive feedback loop (2) over said first gain element, said positive feedback loop having second elements (7, 8) arranged for providing additional input matching and gain enhancement of said first gain element.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: May 21, 2013
    Assignee: IMEC
    Inventor: Sumit Bagga
  • Patent number: 8344920
    Abstract: Methods and apparatus are provided for calibrating a pipeline analog-to-digital converter including one or more serially connected analog-to-digital pipeline stages and a back-end analog-to-digital converter.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: January 1, 2013
    Assignee: Hittite Microwave Norway AS
    Inventor: Bjornar Hernes
  • Publication number: 20120274399
    Abstract: A device implementing a scheme for reduction of pop-up noise is disclosed. The device comprises an audio sub-system (100) having an integrator (112) for amplifying an input signal (133) and a modulation circuit (114) including one or more comparators. The audio subsystem (100) is further provided with a feedback loop (142) across the integrator (112) and the modulation circuit (114) to calibrate an offsets outputs of the integrator (112) and the modulation circuit (114). The feedback loop (142) includes an integrator-offset loop (202) across the integrator (112) to calibrate an offset (136) in the output of the integrator (112), and an offset calibration loop (302) across the modulation circuit (114) to calibrate an offset (140) in the output of the modulation circuit (114).
    Type: Application
    Filed: November 30, 2009
    Publication date: November 1, 2012
    Inventors: Ankit Seedher, Raja J. Prabhu, Shyam S. Somayajula
  • Publication number: 20120126889
    Abstract: In one embodiment, an apparatus an amplifier configured to receive an asymmetric signal. A first resistance is coupled between an input node and an output node of the amplifier, the input node receiving the asymmetric signal. A second resistance is coupled to the input node of the amplifier. The second resistance includes a linear resistor. A third resistance is coupled to the second resistance. The third resistance is varied to adjust an amount of asymmetric correction provided by the amplifier to correct the asymmetric signal at the output node. The amount of asymmetric correction is a function of the first resistance and a combination of the second resistance and the third resistance.
    Type: Application
    Filed: November 8, 2011
    Publication date: May 24, 2012
    Inventors: Steve Fang, Qiang Tang, Myung Jae Yoo
  • Publication number: 20120068766
    Abstract: A sample-and-hold amplifier (400) having a sample phase of operation and a hold phase of operation. The sample-and-hold amplifier comprising one or more sampling components (404, 406) configured to sample input signals during the sample phase of operation, and provide sampled input signals during the hold phase of operation, and an amplifier (402) configured to pre-charge the output (416, 418) of the sample-and-hold amplifier (400) during the sample phase of operation, and buffer the sampled input signal during the hold phase of operation.
    Type: Application
    Filed: March 17, 2011
    Publication date: March 22, 2012
    Applicant: NXP B.V.
    Inventors: Berry Anthony Johannus Buter, Hans Van de Vel
  • Patent number: 8093944
    Abstract: A line driver includes an output terminal set for outputting an output signal, a differential amplifier for amplifying an input signal, a series resistor set coupled between the differential amplifier and the output terminal set, a negative-feedback resistor set coupled to the differential amplifier, a feedback variable resistor set coupled between the differential amplifier and the output terminal set, and an adjusting unit coupled to the feedback variable resistor set. The adjusting unit is operable to adjust resistances of the feedback variable resistor set according to the output signal.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: January 10, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventor: Su-Liang Liao
  • Publication number: 20110234312
    Abstract: A circuit includes an amplifier that defines a positive input terminal, a negative input terminal, a positive output terminal and a negative output terminal. The circuit also includes a first positive feedback path between the positive input terminal and the positive output terminal of the amplifier. Further, the circuit includes a second positive feedback path between the negative input terminal and the negative output terminal of the amplifier. The first positive feedback path and the second positive feedback path compensate the amplifier.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 29, 2011
    Applicant: Texas Instruments Incorporated
    Inventors: Ashish Lachhwani, Preetam Charan Anand Tadeparthy, Rakesh Kumar
  • Patent number: 7724104
    Abstract: Constant and accurate signal gain systems based on controlling oscillator loop gain. A constant gain positive feedback network and an amplifier form an oscillator. Only when the oscillator loop gain is at least one does the oscillator produces an AC signal. Negative feedback of the oscillator's AC signal level is used to keep the loop gain close to or at the value of one by controlling the loop gain of the oscillator circuit. By maintaining the loop gain of the oscillator circuit substantially constant the signal gain is also maintained substantially constant.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: May 25, 2010
    Inventor: Fred A. Mirow
  • Patent number: 7701284
    Abstract: A line driver includes: a differential amplifier for amplifying an input signal to generate an output signal; first and second series resistors coupled respectively to output terminals of the differential amplifier and through which the output signal is output; first and second negative-feedback resistors each coupled between a respective input terminal and a respective output terminal of the differential amplifier; first and second positive-feedback variable resistors each coupled between a respective input terminal of the differential amplifier and a respective one of the first and second series resistors; and an adjusting unit coupled to the first and second positive-feedback variable resistors to adjust a resistance thereof with reference to the output signal.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: April 20, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventors: Su-Liang Liao, Ming-Cheng Chiang
  • Patent number: 7683715
    Abstract: According to an aspect of the present invention, a stage of an amplifier contains a positive feedback loop in addition to a negative feedback loop to maintain the bias currents at a desired level in the active components providing the output of the amplifier. The positive feedback loop senses the finite gain (i.e., less than the ideal infinite gain) of the negative feedback loop and compensates for the finite gain. Due to the use of the positive feedback, the duration and extent of deviation of the bias currents from the desired level is reduced, thereby minimizing the distortions in the output of the amplifier. In an embodiment, the stage corresponds to a class AB stage.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: March 23, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Ravpreet Singh
  • Publication number: 20090322420
    Abstract: According to an aspect of the present invention, a stage of an amplifier contains a positive feedback loop in addition to a negative feedback loop to maintain the bias currents at a desired level in the active components providing the output of the amplifier. The positive feedback loop senses the finite gain (i.e., less than the ideal infinite gain) of the negative feedback loop and compensates for the finite gain. Due to the use of the positive feedback, the duration and extent of deviation of the bias currents from the desired level is reduced, thereby minimizing the distortions in the output of the amplifier. In an embodiment, the stage corresponds to a class AB stage.
    Type: Application
    Filed: June 27, 2008
    Publication date: December 31, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Ravpreet Singh
  • Patent number: 7605650
    Abstract: A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the described examples, the positive feedback is provided either by connecting a capacitor from the output to the input of the first stage amplifier or by connecting a shunt transistor in parallel with an input transistor and driving the transistor from the output of the first stage amplifier. The substantially increased gain resulting from the positive feedback allows the gain of the switched capacitor amplifier to be set by the ratio of the capacitance of an input capacitor to the capacitance of a feedback capacitor. The amplifier also includes switching transistors for periodically discharging the input capacitor and the feedback capacitor.
    Type: Grant
    Filed: March 29, 2008
    Date of Patent: October 20, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Leonard Forbes
  • Patent number: 7459971
    Abstract: The present invention provides an amplifier circuit comprising a differential amplifier and a negative feedback loop circuit, in which a positive feedback loop circuit having a gain smaller than a gain of the negative feedback loop circuit is formed inside the negative feedback loop circuit.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: December 2, 2008
    Assignee: Sony Corporation
    Inventors: Katsuhisa Daio, Tomoyuki Hiro
  • Patent number: 7459980
    Abstract: In some embodiments an apparatus includes an amplifier, a first inverter having an input coupled to an output of the amplifier, and a second inverter having an input coupled to an output of the first inverter and an output, where the output of the second inverter is fed back to an input of the amplifier. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: December 2, 2008
    Assignee: Intel Corporation
    Inventor: Ken Drottar
  • Publication number: 20080186093
    Abstract: A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the described examples, the positive feedback is provided either by connecting a capacitor from the output to the input of the first stage amplifier or by connecting a shunt transistor in parallel with an input transistor and driving the transistor from the output of the first stage amplifier. The substantially increased gain resulting from the positive feedback allows the gain of the switched capacitor amplifier to be set by the ratio of the capacitance of an input capacitor to the capacitance of a feedback capacitor. The amplifier also includes switching transistors for periodically discharging the input capacitor and the feedback capacitor.
    Type: Application
    Filed: March 29, 2008
    Publication date: August 7, 2008
    Applicant: Micron Technology, Inc.
    Inventor: Leonard Forbes
  • Patent number: 7365597
    Abstract: A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the described examples, the positive feedback is provided either by connecting a capacitor from the output to the input of the first stage amplifier or by connecting a shunt transistor in parallel with an input transistor and driving the transistor from the output of the first stage amplifier. The substantially increased gain resulting from the positive feedback allows the gain of the switched capacitor amplifier to be set by the ratio of the capacitance of an input capacitor to the capacitance of a feedback capacitor. The amplifier also includes switching transistors for periodically discharging the input capacitor and the feedback capacitor.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: April 29, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Leonard Forbes
  • Patent number: 7265624
    Abstract: The present invention provides an amplifier circuit comprising a differential amplifier and a negative feedback loop circuit, in which a positive feedback loop circuit having a gain smaller than a gain of the negative feedback loop circuit is formed inside the negative feedback loop circuit.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: September 4, 2007
    Assignee: Sony Corporation
    Inventors: Katsuhisa Daio, Tomoyuki Hiro
  • Patent number: 7012466
    Abstract: A load responds to a voltage-to-current converter including a differential amplifier. A sensing resistor is series connected with the load and first and second feedback resistors, respectively included in first and second voltage dividers having taps connected to non-inverting and inverting inputs of the amplifier. One divider is connected between a first terminal of the sensor resistor and one voltage responsive input terminal of the converter. Another divider is connected between the second terminal of the sensor resistor and a second converter input terminal, that can be grounded or voltage responsive. The feedback resistors have the same value that is much greater than the sensor resistor value. The first divider can be connected to the first or second terminal of the sensor resistor and vice versa for the second divider.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: March 14, 2006
    Inventor: Mauro Cerisola
  • Patent number: 6985053
    Abstract: In order to provide a negative resistance circuit which is not influenced by means of change of temperature and source voltage, etc., operates stably and has simple circuit construction, a first stage circuit of the negative resistance circuit is a collector-emitter dividing type amplifying circuit comprising of a npn transistor and a second stage circuit thereof is an emitter earth type amplifying circuit comprising of a pnp transistor. A collector output of the pnp transistor is connected to a base of the npn transistor to constitute a positive feedback path and is divided and is connected to an emitter of the npn transistor to constitute a negative feedback path. An amplification factor A of the emitter earth type amplifying circuit and voltage dividing ratio ? is set to be (1+A?)<A.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: January 10, 2006
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 6967530
    Abstract: A circuit for a power amplifier is disclosed which amplifies and outputs an audio signal by amplifying an input audio signal using first and second differential circuits, and driving a push-pull output transistor with the outputs from the first and second differential circuits. The circuit includes a signal generating part generating a disconnection timing signal for disconnecting a bias current reducing activation currents of the first and second differential circuits based on a switch control signal, and positive feedback loops of the first and second differential circuits. A switch part is disposed in each of the positive feedback loops of the first and second differential circuits, disconnecting the positive feedback loops in response to the disconnection timing signal. A bias part stops the operation of the first and second differential circuits by reducing the activation currents of the first and second differential circuits by reduction of the bias currents.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: November 22, 2005
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Jun-Ichi Omata, Yuji Yamanaka, Tomomi Oda
  • Patent number: 6954123
    Abstract: Selectivity Q of a tuning circuit is maximized by using a negative resistance circuit that is not influenced significantly by changes in conditions such as temperature, source voltage, etc. The tuning circuit operates stably and is constituted by a series resonance circuit and the negative resistance circuit connected thereto. The negative resistance circuit can be a C-E dividing type circuit including a npn transistor as a first stage circuit and an emitter earth type amplifying circuit including a pnp transistor as a second stage circuit. A collector output of the pnp transistor is connected to an emitter of the npn transistor to constitute a negative feedback circuit and the collector output is divided and connected to a base of the npn transistor to constitute a positive feedback circuit. Selectivity Q is improved by the negative resistance circuit provided by the negative feedback circuit.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: October 11, 2005
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 6920336
    Abstract: Broadband driver for signals that are transmitted in different frequency ranges, comprising: (a) a first broadband driver circuit (19) for driving first signals having signal frequencies that lie in a first frequency range; (b) a second broadband driver circuit (24) for driving second signals having signal frequencies that lie in a second frequency range; (c) where at least one of the two broadband driver circuits (19) has a frequency-dependent positive-feedback circuit (44) for impedance synthesis of a frequency-dependent output impedance (Zout) of the broadband driver circuit (19), and where the output impedance (Zout) has a different value in the first frequency range than in the second frequency range.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: July 19, 2005
    Assignee: Infineon Technologies AG
    Inventor: Thomas Ferianz
  • Patent number: 6870447
    Abstract: A tuning circuit using a negative resistance circuit for compensating an equivalent series resistance component thereof is provided. The negative resistance circuit has simple circuit construction and design and adjustment thereof is easy. The tuning circuit comprises a series resonance circuit and a negative resistance circuit connected to the series resonance circuit in series. In the negative resistance circuit, a first transistor constitutes an inverse amplifier by providing a resistor in an emitter circuit thereof and a second transistor constitutes an emitter follower circuit. A positive feedback circuit is constituted by feeding back an output of the emitter follower circuit to an emitter circuit of the first transistor and a negative feedback circuit is constituted by feeding back an output terminal to a base circuit of the first transistor. Thus a negative resistance is produced between this base input terminal and an earth.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: March 22, 2005
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 6822510
    Abstract: An improved power-off, loop-through return-loss characteristic for a current feedback operational amplifier is provided by adding a positive feedback capacitor between the input and output of the operational amplifier. The positive feedback capacitor results in a negative capacitance input impedance for the operational amplifier that cancels stray capacitances at the input.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: November 23, 2004
    Assignee: Tektronix, Inc.
    Inventor: Daniel G. Baker
  • Patent number: 6600366
    Abstract: Differential line driver circuit for driving a line signal output via a signal line.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: July 29, 2003
    Assignee: Infineon Technologies AG
    Inventor: Thomas Ferianz
  • Patent number: 6600367
    Abstract: An electronic amplifier providing very low distortion which includes an output stage with an output error correction stage containing two amplifiers and wherein there are at least four local negative feedback paths, an output of the first amplifier being connected to an input of output stage transistor buffers or output stage transistors through a first network, an output of the second amplifier being connected to an input of output stage transistor buffers or output stage transistors through a second network, where components of the first and second amplifier the local negative feedback paths, first and second networks and output stage transistor buffers are selected to form substantially second order local dominant pole. Also disclosed is the supply of power to said first and second amplifiers from a floating power supply means coupled to either an or the output of the output stage so that the voltage of the floating power supply will follow substantially an output voltage of the output stage.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: July 29, 2003
    Assignee: BHC Consulting Pty Ltd.
    Inventor: Bruce Halcro Candy
  • Patent number: 5856758
    Abstract: A line driver with positive feedback reduces the output signal amplitude excursion required for driving a communication line, and enables the driver's output impedance to be synthesized using a reduced component value, thereby achieving a reduction in power loss through the output resistor, while simultaneously matching the effective electrical value of the driver's output impedance to the line. The line driver includes an operational amplifier having differential polarity inputs and an output. An output resistor, whose value is a fraction of the line impedance, is coupled between the amplifier output and an output node coupled to the line. A negative feedback resistor is coupled between the amplifier output and an inverting input. A further resistor is coupled between the amplifier output and a non-inverting input.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: January 5, 1999
    Assignee: Adtran, Inc.
    Inventors: Daniel M. Joffe, Robert E. Gewin
  • Patent number: 5684433
    Abstract: In an amplifier circuit arrangement in which series resistive feedback is utilized in the main amplifier to minimize distortion, and a feedback amplifier is provided in a path from the output of the arrangement to the series feedback path effectively to boost the value of the feedback resistor, a further amplifier is arranged to provide positive feedback to the resistive load circuit of the main amplifier effectively to boost the value of the resistive load.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: November 4, 1997
    Assignee: Plessey Semiconductors Limited
    Inventors: Arshad Madni, Nicholas Paul Cowley, Ian Garth Watson
  • Patent number: 5398004
    Abstract: A wideband low noise amplifier is provided which includes an input for receiving an input signal and an output for providing an amplified output signal which may vary over a wide frequency range while exhibiting minimum noise interference. The amplifier includes a first amplification stage having a first bipolar transistor with a base connected to the input, an emitter coupled to ground and a collector. A second amplification stage is provided which has second and third Darlington-connected bipolar transistors. The second and third transistors each have a base, collector and emitter with the emitter of the second transistor connected to the base of the third transistor. A first feedback path which includes a first feedback resistor is coupled between each of the collectors of the second and third transistors and the base of the second transistor. The collector of the first transistor is also connected to the base of the second transistor.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: March 14, 1995
    Assignee: TRW Inc.
    Inventor: Kevin W. Kobayashi
  • Patent number: 5384530
    Abstract: A bootstrap voltage reference circuit having an amplifier with a positive feedback network including a non-linear device which operates as a current source. The non-linear device may be an n-type negative resistance device such as a tunnel diode. The circuit is operable for generating a predetermined reference voltage as the difference between the signal applied to the positive input and a signal generated by the negative feedback network and applied to the negative input approaches zero.
    Type: Grant
    Filed: August 6, 1992
    Date of Patent: January 24, 1995
    Assignee: Massachusetts Institute of Technology
    Inventor: Randall J. Pflueger
  • Patent number: 5374966
    Abstract: A video amplifier having a reduced noise figure is realized by eliminating the need for a resistive matching termination at the input of the amplifier. A negative feedback loop reduces the effective input impedance of the amplifier by generating an active impedance at the input of the amplifier. Because the input impedance of the amplifier is actively matched to the output impedance of the video signal generator, a noise-generating resistive termination is unnecessary, and the noise figure of the overall impedance-matched amplifier is significantly reduced.
    Type: Grant
    Filed: April 15, 1993
    Date of Patent: December 20, 1994
    Assignee: Westinghouse Electric Corporation
    Inventor: Benjamin F. Weigand
  • Patent number: 5157347
    Abstract: Bridge amplifier circuit including a linear amplifier stage (3) which in single-ended configuration drives a load (13). Once the output voltage (U.sub.0) at the output (7) of the amplifier stage (3) has reached the maximum or minimum output swing limit, the voltage on the load terminal (14) remote from the output (7) is either reduced or increased by a switch circuit (15) in response to control signals (36) originating from control means (37) in dependence on the input signal (U.sub.i) and/or the output signal (U.sub.0). The switch circuit (15) includes a bidirectional switch (16) arranged as two controllable diodes (90, T.sub.11) connected in anti-parallel and having very little forward bias. Compensating voltage jumps at the output (7) of the amplifier stage (3), which require a high slew rate, are avoided in this manner.
    Type: Grant
    Filed: January 17, 1992
    Date of Patent: October 20, 1992
    Assignee: U.S. Philips Corporation
    Inventors: Lambertus H. Geerdink, Hendrik Boezen
  • Patent number: 4916409
    Abstract: An audio signal conditioning system comprising a power supply for providing a direct current having a predetermined voltage; input gain control device for receiving the audio sound output signals and for controlling gain; a first transistor amplifier connected to the input gain control, the first transistor providing a first amplified output signal from the collector thereof; a second transistor amplifier connected to the first transistor amplifier for receiving amplified signals from the first transistor amplifier and providing a second amplified output signal from the collector thereof; a negative feedback circuit between the first transistor amplifier and the second transistor amplifier for transmitting negative feedback signals from the emitter of the second transistor amplifier to the base of the first transistor amplifier and a regenerative feedback circuit and an associated tone control circuit between the first transistor amplifier and the second transistor amplifier for transmitting regenerative feed
    Type: Grant
    Filed: June 15, 1988
    Date of Patent: April 10, 1990
    Inventor: Daniel L. Tracy
  • Patent number: 4858094
    Abstract: Improved load regulation is provided in a switched mode power supply having an integrator, with a controlled reference signal connected thereto, a comparator circuit and a square wave generator, connected to the terminals of an AND circuit, and AND circuit connected to a power driver outputting to a transformer having two secondary windings. A current sensing resistor connected to the power driver is fed back to the comparator where this current level is compared with the integrator output. A first secondary winding is connected through a diode to the load with a capacitor connected across the load and a second secondary winding is connected in a feedback line to the integrator with a series diode, a capacitor is connected across the second secondary winding with a voltage divider connected across the second secondary line in parallel with the capacitor. The above arrangement is for current mode topology and an alternate arrangement is shown for voltage mode topology.
    Type: Grant
    Filed: October 18, 1988
    Date of Patent: August 15, 1989
    Assignee: Allied-Signal Inc.
    Inventor: Francis M. Barlage
  • Patent number: 4706281
    Abstract: Battery feed circuits function to supply a predetermined current to the communication pair and include circuitry to counteract the effects of balanced longitudinal signals which appear on the communication pair. Prior art battery feed circuits use either expensive matched power resistors or matched and tracking current sources to provide both the dc current and the necessary balance. The subject battery feed circuit separates the two functions: a pair of poorly matched inexpensive power resistors provide the basic dc current; and associated pair of low power electronic circuits supply compensation signals to provide the necessary balance. The compensation signals are applied to the power resistors in a manner to obtain precision resistor (.+-.0.1%) characteristics from the inexpensive (.+-.5%) power resistors.
    Type: Grant
    Filed: April 30, 1984
    Date of Patent: November 10, 1987
    Assignees: American Telephone and Telegraph Company, AT&T Information Systems Inc.
    Inventor: Richard J. Cubbison, Jr.
  • Patent number: 4684886
    Abstract: An automatic equalizer for an electronic measuring instrument using a transducer to measure a physical quantity. A signal amplifier in the instrument has a positive feedback application point and a negative feedback application point. The automatic equalizer has a plurality of stages, each comprising an amplifier that draws its input from the compensated output of the signal amplifier. Each equalizer stage is biased to operate over a different range of output signal levels, and the amount of feedback supplied by each stage back to the positive and negative feedback application points is separately adjustable so as to equalize a different segment of the transducer response curve. The required bias signal level for each equalizer is independent of the response characteristics of the transducer and therefore can be determined solely with reference to the range of magnitudes of the output signal.
    Type: Grant
    Filed: May 17, 1985
    Date of Patent: August 4, 1987
    Inventor: James H. Doyle
  • Patent number: 4630046
    Abstract: A broadband switching network in matrix form composed of a plurality of rows and a plurality of columns, and including a plurality of crosspoint switching circuits each having an input and an output and each associated with a respective row and a respective column; a plurality of input circuits each associated with a respective row and connected to the input of each switching circuit associated with the respective row; and a plurality of output circuits each associated with a respective column and connected to the output of each switching circuit associated with the respective column. Each crosspoint switching circuit includes a transistor connected in common emitter configuration and control elements connected for applying to the emitter of the transistor a potential controlling the switching state of the crosspoint switching circuit and each input circuit and output circuit is a decoupling circuit.
    Type: Grant
    Filed: December 31, 1984
    Date of Patent: December 16, 1986
    Assignee: ANT Nachrichtentechnik GmbH
    Inventor: Hans-Martin Rein
  • Patent number: 4397368
    Abstract: In a solenoid actuated device for controlling the oil supplied to a power steering unit of a motor car, a driving circuit is provided to pass current through the solenoid. The driving circuit comprises a comparator supplied with an analogue control signal proportional to the running speed of the motor car, a power amplifier including an output transistor which supplies exciting current to the solenoid coil in response to the output of the comparator. A positive feedback resistor is connected between the output of the comparator and the input thereof to which the analogue signal is applied, and a negative feedback resistor is connected between the output of the power amplifier another input of the comparator thereby ON-OFF controlling the output transistor to pass pulse current through the solenoid coil.
    Type: Grant
    Filed: February 21, 1979
    Date of Patent: August 9, 1983
    Assignee: Jidosha Kiki Co., Ltd.
    Inventor: Sadao Takeshima
  • Patent number: 4302726
    Abstract: A current source in which the output current from an output amplifier stage (2) is controlled by an input signal, originating in a signal source (11), to an input amplifier stage (1) incorporates, additionally to a negative feedback path from the current input path of the output stage (2) to the input amplifier (1), monitoring means (5) in the signal input path to the output amplifier (2) and control means (4) in an input path to the input amplifier (1). Monitoring means (5) monitors the current flow in the input path to the output amplifier (2) and applies, via control means (4) a signal to the input amplifier (1) such that the dependence of the current flow in the current output path on the gain of the output stage (2) is reduced. A circuit is described, as well as an application to driving a telephone subscriber line and using two current sources working in push-pull mode.
    Type: Grant
    Filed: July 10, 1979
    Date of Patent: November 24, 1981
    Assignee: The General Electric Company Limited
    Inventor: David E. Shobbrook
  • Patent number: 4125813
    Abstract: A sample and hold circuit is disclosed which employs a matched pair of operational amplifiers as a decoupling circuit to isolate the output of the sample and hold circuit from the sampling capacitor. Prior art decoupling circuits employ a simple isolation amplifier which has a tendency to charge the sampling capacitor with the isolation amplifier input bias and leakage currents. The disclosed decoupling circuit employs one of a pair of matched operational amplifiers as a self-compensating isolation amplifier which dynamically generates the bias and leakage currents found at its input while isolating the sample and hold output from the sampling capacitor. The other operational amplifier is connected in series between the isolation amplifier and the sample and hold output and functions to cancel the input bias current signal generated by the self-compensating isolation amplifier.
    Type: Grant
    Filed: June 9, 1977
    Date of Patent: November 14, 1978
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Richard J. Cubbison, Jr.
  • Patent number: 4110677
    Abstract: A voltage regulator circuit including an operational amplifier having supply voltage terminals connected to a source of unregulated supply voltage and a two-terminal, essentially zero temperature coefficient, semiconductor bandgap voltage reference circuit connected in a negative feedback path between the output terminal and one input terminal of the amplifier. The amplifier provides a constant current source for the bandgap voltage reference circuit, and the amplifier and reference circuit cooperate to establish a regulated output voltage at the amplifier output terminal. A resistive divider network is connected in a positive feedback path between the output and a second input terminal of the amplifier to establish the value of the regulated voltage within a range of values between the bandgap voltage and the unregulated supply voltage.
    Type: Grant
    Filed: October 12, 1977
    Date of Patent: August 29, 1978
    Assignee: Beckman Instruments, Inc.
    Inventors: Attila D. Boronkay, Charles G. Axen
  • Patent number: 4091333
    Abstract: A transconductance amplifier circuit including two operational amplifiers, as shown in the accompanying drawing, is disclosed. The gain of the amplifier circuit is determined by the resistances R1, R2, R3 and R4. The scale factor relating the output current i.sub.out to the input voltage e.sub.in is determined by the setting of the switches S1, S2, and S3, which adjust the amount of resistance between the output current terminal I.sub.o and the output terminal of the second operational amplifier A2. For R1/R2 = 1; R3/R4 = 1; and switch S1 closed i.sub.out = e.sub.in /R5. This transconductance amplifier circuit provides common mode rejection between the input voltage and the output current.
    Type: Grant
    Filed: July 25, 1977
    Date of Patent: May 23, 1978
    Assignee: Valhalla Scientific Incorporated
    Inventor: Guy Carlyle Thrap
  • Patent number: 4088961
    Abstract: An operational amplifier driver circuit for supplying an undistorted ac signal to a resistive load connected across a balanced pair of twisted transmission lines where the balanced lines have common mode noise signals thereon due to the presence of substantial noise of an external, uncontrolled nature. The driver circuit includes a pair of operational amplifiers interconnected to utilize the common mode noise signals in feedback paths thereof whereby the operational amplifiers are able to operate in their linear ranges even in the presence of high levels of common mode signals on the balanced lines, thereby compensating for the effects of the common mode noise signals on the balanced lines.
    Type: Grant
    Filed: July 1, 1977
    Date of Patent: May 9, 1978
    Assignee: GTE Sylvania Incorporated
    Inventor: Albert H. Ashley