With D.c. Reinsertion Circuit Patents (Class 330/11)
  • Patent number: 8901998
    Abstract: A current-voltage converter with a current reflector, for which the input current includes a fixed component and a variable component, includes an input for the current to be converted, an output for the converted voltage, two constant current sources each connected between the output and a respective reference voltage, at least one MOSFET transistor mounted in series with each constant current source, and a resistor for converting the current into a voltage, arranged between the output and ground. The gate of each MOSFET transistor is connected to one of the reference voltages. The input for the current to be converted is connected to the output through one of the MOSFET transistors. The converted further includes, for each MOSFET transistor, means for re-injecting into at least one of the current sources, a current equal to the current absorbed in the gates of the MOSFET transistors.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: December 2, 2014
    Assignee: Devialet
    Inventors: Mathias Moronvalle, Pierre-Emmanuel Calmel
  • Patent number: 8633764
    Abstract: An apparatus comprises an amplifier circuit comprising at least one output node and a common-mode restoration circuit capacitively coupled to the at least one output node of the amplifier circuit. The common-mode restoration circuit is configured to introduce at least one common-mode restoring signal onto the output node, wherein the at least one common-mode restoring signal transitions in correspondence with an operation interval of the amplifier circuit and thereby compensates for a common-mode voltage drop on the at least one output node of the amplifier circuit. In one example, the amplifier circuit may comprise a current-integrating amplifier circuit, and the operation interval may comprise an integration interval.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: January 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ankur Agrawal, John F. Bulzacchelli, Thomas H. Toifl
  • Patent number: 8494184
    Abstract: An electro-acoustic transducer or a device into which an electro-acoustic transducer is incorporated has at least two audio signal conductors through which the electro-acoustic transducer or device may be coupled to another device to convey analog audio signals representing sounds at a time when the other device places a relatively low DC bias voltage across the at least two audio signal conductors, and to be operated as a digital serial bus to exchange pieces of digitally-encoded data concerning the electro-acoustic transducer at a time when the other device places a relatively high DC bias voltage across the at least two audio signal conductors.
    Type: Grant
    Filed: July 18, 2010
    Date of Patent: July 23, 2013
    Assignee: Bose Corporation
    Inventor: Paul G. Yamkovoy
  • Patent number: 8494185
    Abstract: A device into which an electro-acoustic transducer is incorporated has at least two audio signal conductors through which the device may be coupled to another device to convey analog audio signals representing sounds at a time when the other device places a relatively low DC bias voltage across the at least two audio signal conductors, and to be operated as either a digital serial bus to exchange pieces of digitally-encoded data concerning the electro-acoustic transducer or as a trigger to cause the electro-acoustic transducer to be bypassed to enable another electro-acoustic transducer to be tested at a time when the other device places a relatively high DC bias voltage across the at least two audio signal conductors.
    Type: Grant
    Filed: July 18, 2010
    Date of Patent: July 23, 2013
    Assignee: Bose Corporation
    Inventor: Paul G. Yamkovoy
  • Patent number: 8451052
    Abstract: An input stage for an instrumentation system may include a resistor coupled between an input terminal and a summing node, and an amplifier arranged to maintain the voltage at the summing node. In anther embodiment, an instrumentation input system may include an input stage to receive a signal to be measured, and a variable gain amplifier having an input coupled to an output of the input stage, wherein the variable gain amplifier comprises two or more gain stages. A variable gain amplifier may include an attenuator having an input and a series of tap points and a series of low-inertia switches to steer outputs from the attenuator to an output terminal.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: May 28, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Patent number: 8098091
    Abstract: In a method and an amplifier for the compensation of unlinearities e.g. of the class D type, wherein an audio signal is pulse-width modulated, e.g. with a carrier wave signal in the form of a triangular signal to provide a pulse-width modulated small-signal, the so-called multiplicative error signals, which occur prior to the provision of a pulse-width modulated great-signal (7), are detected in a detector (10)). It is noted that the carrier wave signal could be analog as well as digital. The signal from the detector, which is derived on the basis of differences between the pulse widths of the small-signals and the pulse widths of the great-signals, is used for changing the carrier wave signal so that the amplifier gets a constant gain in the entire audio range and is thereby linearized.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: January 17, 2012
    Assignee: Texas Instruments Denmark
    Inventors: Niels Anderskouv, Lars Risbo, Thomas Morch
  • Patent number: 7986183
    Abstract: An amplifying circuit includes: a waveform modifying unit which changes the signal value in the second section in such a manner so as to reduce the difference between the signal strength of a DC component of the input signal and the limit value that limits the variation range of the signal value in the first section; a DC component removing unit which removes the DC component of the input signal after the input signal has been modified by the waveform modifying unit; and an amplifying unit which amplifies the input signal whose DC component has been removed.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: July 26, 2011
    Assignee: Fujitsu Limited
    Inventor: Hironobu Hongo
  • Patent number: 7888998
    Abstract: An analog error amplifier includes an amplifier circuit and a replica bias circuit that together produce an output signal representing a difference between an input signal and a reference signal. The amplifier circuit produces the output signal in response to the input signal and a bias signal provided by the replica bias circuit. The bias signal may establish a reference threshold of a basic amplifier in the amplifier circuit. The replica bias circuit produces the bias signal in response to the reference signal and drives the bias signal to be equal to the reference signal. The replica bias circuit may include a plurality of amplifier stages. The bias signal produced by a single replica bias circuit may be provided to a plurality of amplifier circuits to provide a plurality of error amplifiers for a single reference signal.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: February 15, 2011
    Assignee: International Business Machines Corporation
    Inventor: John F. Ewen
  • Publication number: 20100271120
    Abstract: According to one general aspect, an apparatus may include a terminal configured to receive an analog input signal. In various embodiments, the apparatus may also include a multistage amplifier configured to amplify the analog input signal by an amount of gain. In some embodiments, the apparatus may include a distributed threshold adjuster interspersed between the stages of the multistage amplifier configured to adjust the DC voltage of the analog input signal to facilitate a decision by an analog-to-digital converter (ADC). In one embodiment, the apparatus may include the ADC configured to convert the amplified analog input signal to a digital output signal.
    Type: Application
    Filed: October 20, 2009
    Publication date: October 28, 2010
    Applicant: Broadcom Corporation
    Inventors: Afshin Momtaz, Namik Kocaman, Bharath Raghavan
  • Patent number: 7619667
    Abstract: A solid-state image device including pixels arranged two-dimensionally, the pixels each including a photoelectric converter for converting incident light into an electric signal, is provided. The solid-state image device includes an output amplifier configured to amplify a photoelectric conversion output from each of the pixels, and a reference voltage amplifier configured to output a reference voltage. The solid-state image device selectively outputs the photoelectric conversion output and the reference voltage.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: November 17, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Seiichirou Sakai, Toru Koizumi
  • Patent number: 7432761
    Abstract: It is desirable that some voltage can be supplied as emergency backup even upon occurrence of abnormality such as a failure. The amplifier circuit in a semiconductor device supplies an output signal having a voltage produced by amplifying an input voltage Vin from a variable voltage source to one end of a coil load, and supplies a predetermined fixed voltage of 0V, for example, to the other end of the coil load to rotate the coil load with the voltage difference between these output signals, thus performing loading control of a CD tray and a DVD tray. The semiconductor device clamps the voltage of the output signal to a predetermined non-zero voltage so that a sufficient drive voltage can be obtained even if a loading control terminal T1 is grounded, thus realizing emergency backup loading control of the tray.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: October 7, 2008
    Assignee: Rohm Co., Ltd.
    Inventors: Shinsuke Takagimoto, Koji Miyamoto
  • Publication number: 20070285159
    Abstract: A level-shifting amplifier is provided for level-shifting an input signal with a voltage magnitude that exceeds a supply voltage of the amplifier. In operation, the amplifier has an input impedance of greater than 100 MOhms.
    Type: Application
    Filed: June 13, 2006
    Publication date: December 13, 2007
    Inventor: James Copland Moyer
  • Patent number: 7088174
    Abstract: A method and apparatus to provide slice adjustment and offset cancellation in a high frequency limiting amplifier is described.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: August 8, 2006
    Assignee: Intel Corporation
    Inventor: Kevin W. Glass
  • Patent number: 7039124
    Abstract: An apparatus and method for compensating for an analog quadrature modulation (AQM) error in a linearization apparatus for AQM-modulating a digital predistorted signal and outputting the AQM-modulated signal through a high-power amplifier. In the apparatus and method, a gain/phase error estimator predicts a gain/phase imbalance error caused by AQM on the predistorted signal. A Direct Current (DC) offset estimator predicts a DC offset for a feedback signal from the high-power amplifier. An error compensator compensates for the digital predistorted signal for a DC offset signal output from the DC offset estimator, and then compensates for a gain/phase error output from the gain/phase error estimator.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: May 2, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seung-Hwan Lee
  • Patent number: 7005915
    Abstract: Two bridge type transducers are coupled in series with their outputs each driving one of a pair of differential amplifiers, with the outputs tied together in a push-pull configuration. In further embodiments, push-pull operation is obtained by matching amplifier gain components and using current mirrors. Lower voltage operation may be achieved by simple diode level shifting of the transducer outputs. In one embodiment, the transducers comprise Hall effect sensors.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: February 28, 2006
    Assignee: Honeywell International Inc.
    Inventors: Wayne T. Kilian, Jason M. Chilcote
  • Patent number: 6809596
    Abstract: Described are a circuit and system to provide an output signal in response to composite input signal comprising an AC signal component and a DC signal component. An amplifier provides an amplified voltage signal in response to a voltage representative of the composite signal. A filter may provide a filtered voltage signal having a magnitude that is representative of a magnitude of the DC signal component in response to the amplified voltage signal. A DC signal removal circuit may substantially remove at least a portion of the DC signal component from an input terminal in response filtered voltage signal.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: October 26, 2004
    Assignee: Intel Corporation
    Inventors: Shivakumar Seetharaman, Kursad Kiziloglu, Cindra W. Abidin, Georgios S. Asmanis
  • Patent number: 6774715
    Abstract: An alternating current filter circuit for a BiCMOS differential amplifier has a circuit that computes a base current of the BiCMOS differential amplifier and a circuit that generates an offset current based upon the computing.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: August 10, 2004
    Assignee: Xanoptix Inc.
    Inventors: Ted Wyman, Fouad Kiamilev
  • Patent number: 6700443
    Abstract: The invention relates to a method of amplifying an input signal having a DC component and an AC component. The method includes the steps of: comparing the input signal with a reference value, generating an intermediate signal by subtracting from the input signal a correction signal resulting from the comparison step, rectifying the intermediate signal, evaluating a mean value of the rectified intermediate signal, and multiplying the input signal by the mean value. The invention allows a reduction in the sensitivity of the amplifier to the DC component of the input signal.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: March 2, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Eric Bernard Marie Francois Desbonnets, Guillaume Lebailly
  • Patent number: 6657488
    Abstract: A slice and offset circuit is provided that uses a digital integrator in the feedback loop of the offset cancellation circuitry. A slice circuit receives an indication of a desired slice voltage and supplies a signal to specify the slice level, which is combined with a sensed offset level of the amplifier. The feedback loop includes a low pass filter that receives the combined signal indicative of the offset and the slice level. The low pass filter includes the digital integrator circuit that includes an up/down counter that counts in a direction determined according to a digital signal having a ones-density indicative of a value of the combined signal with respect to a reference signal, thereby generating a feedback signal that cancels offset and adjusts for slice.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: December 2, 2003
    Assignee: Silicon Laboratories, Inc.
    Inventors: Eric T. King, Michael H. Perrott, Douglas F. Pastorello
  • Patent number: 6608525
    Abstract: The operational transconductance amplifier comprises a MOS field-effective transistor that controls the mutual conductance. The central voltage measurement circuit and the voltage addition circuit shift a gate voltage of the MOS field-effective transistor by an amount equal to the deviation of a source voltage of the MOS field-effective transistor caused by an input offset voltage Voff.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: August 19, 2003
    Assignee: Fujitsu Limited
    Inventor: Yoshihiro Kizaki
  • Patent number: 6603354
    Abstract: A method and apparatus to generate an optimum common-mode voltage in analog differential circuits are described. A first output voltage is generated as a function of a power supply voltage and a positive saturation voltage in a differential amplifier circuit A second output voltage is then generated as a function of a negative saturation voltage in the differential amplifier circuit. An optimum common-mode level output voltage is then calculated as an average of said first output voltage and said second output voltage to obtain a linear output range of said differential amplifier circuit.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: August 5, 2003
    Inventor: Ion E. Opris
  • Patent number: 6580315
    Abstract: A low-power solution for maintaining an amplifier common-mode output voltage, regardless of whether the amplifier is on or off, that does not degrade the performance of the amplifier through the use of a passgate in the signal path.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: June 17, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Jeremy R. Kuehlwein
  • Patent number: 6577187
    Abstract: A powered transducer preamplifier includes a preamplifier circuit that DC couples the preamplifier input with the preamplifier output. A biasing circuit is coupled to the preamplifier input to apply a bias voltage to power the transducer, and a DC level shifting circuit is DC coupled to the signal path of the preamplifier circuit between the input and the output to compensate for this bias voltage. The DC level shifting circuit avoids the use of reactive components, and thereby reduces phase distortion. A variety of DC level shifting circuits can be used, including a bridge circuit having four matched resistors and an inverter DC coupled between the nodes of the bridge.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: June 10, 2003
    Assignee: UpState Audio
    Inventor: Matthew M. Lesko
  • Publication number: 20020121928
    Abstract: The invention relates to improvements to the operation of a broadcast data receiver (BDR) and, in particular, to the provision of a video data amplifier and driver circuit for the processing of a received video data signal. The circuit includes a means for generating at least one compensatory value and preferably a multiplication factor. The compensatory value is added to the received video data signal as it passes through the circuit to form a combined signal. The combined signal can also be multiplied. The level of the compensatory value can alter with reference to changes in the environment of the operation of the circuit so as to take into account and minimise changes affecting the operation of the circuit and on the video signal.
    Type: Application
    Filed: February 7, 2002
    Publication date: September 5, 2002
    Applicant: PACE MICRO TECHNOLOGY PLC.
    Inventor: Victor Fielding
  • Publication number: 20020109545
    Abstract: An electronic circuit stabilizes an ultrahigh input impedance amplifier by altering the amplifier's input potential. This input potential includes both the desired input signal and the amplifier's input bias current. With an amplifier having an input port and a guard, both the input port and the guard will have the same input potential. Accordingly, the stabilizing circuit of the present invention provides the input potential at the guard to an electronic device which separates the input signal from the input bias current. This creates a corrective signal. The corrective signal is then used through a feedback path to alter the input potential so that the desired input signal can be fed into the amplifier without adverse consequences from the input bias current.
    Type: Application
    Filed: February 13, 2001
    Publication date: August 15, 2002
    Inventor: Michael Andrew Krupka
  • Patent number: 6335641
    Abstract: An automatic input threshold selector includes a maximum value level decision circuit, and an input threshold setting circuit. The maximum value level decision circuit decides, among m+1 level layers defined by m maximum value decision levels, a level layer to which the maximum value of an input signal belongs. The input threshold setting circuit sets an input threshold by selecting one of n input threshold candidates in response to the level layer to which the input signal maximum value belongs. These circuits are implemented as a simple combination of a voltage comparator, logic gates and the like. This makes it possible to solve a problem of a conventional automatic input threshold selector in that its circuit scale and power consumption is rather large because it includes a peak-hold circuit and a bottom-hold circuit.
    Type: Grant
    Filed: January 3, 2000
    Date of Patent: January 1, 2002
    Assignees: Mitsubishi Electric System LSI Design Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takaaki Tougou
  • Patent number: 6232816
    Abstract: A signal level monitoring circuit for outputting either voltage or current corresponding to an input signal level, includes a variable gain unit for obtaining a predetermined output level without being dependent on a gain, when the input signal level is a predetermined reference input level; and an offset adding unit for outputting a predetermined reference output level by adding an offset level to the output level of the variable gain means, when the input signal level is the predetermined reference input level. According to the present invention, it is possible to adjust precisely and surely the gain and the offset voltage based on simple adjusting steps in a short time and only once.
    Type: Grant
    Filed: August 25, 1998
    Date of Patent: May 15, 2001
    Assignee: Fujitsu Limited
    Inventor: Tomio Ueda
  • Patent number: 5999045
    Abstract: An amplification circuit comprising a device for compensating for its input current. The amplification circuit includes an amplifier and a capacitor located on the input side of the amplifier. The input-current compensation device consists of a current generator, generating a current Ig, a switch and a device for measuring the average current charging or discharging the capacitor during the time that the switch is open. The current Ig is such that: Average current=Ia-Ig, where Ia is the input current of the amplifier. The value of the average current is close to zero. The value of the current Ig which the current generator must output, so as to make the average current close to zero, is calculated using the device for measuring the average current. The invention particularly applies to a circuit for restoring the DC component of a video signal.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: December 7, 1999
    Assignee: Thomson Broadcast Systems
    Inventors: Claude Claverie, Patrick Hardy, Stephane Hergault
  • Patent number: 5801867
    Abstract: A dc-coupled receiver for a shared optical system includes an input feedback amplifier circuit which establishes a dc reference baseline voltage level for incoming packets of data. A pair of sample-and-hold circuits are connected in parallel to receive and sample signals from the feedback amplifier circuit when no data is being transmitted and at the initial edge of incoming packets of data. A voltage divider circuit receiving signals from the sample-and-hold circuits establishes a dc slicing level for each incoming packet of data. An output feedback circuit can be added to compensate for offset error without affecting the performance of the sample-and-hold circuitry.
    Type: Grant
    Filed: March 20, 1996
    Date of Patent: September 1, 1998
    Assignee: Ericsson Raynet
    Inventors: William L. Geller, David M. Arstein, William F. Ellersick
  • Patent number: 5587681
    Abstract: In a D.C. restoration circuit for a digital FM radio receiver, in which demodulated signals may be presented at the output of the demodulator as low-level differential signals superimposed on a variable D.C. level, the differential signal paths are capacitively coupled to the inputs of a comparator, and the voltage excursions at these inputs are clamped when the voltage between the inputs exceeds a predetermined value.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: December 24, 1996
    Assignee: Plessey Semiconductors Limited
    Inventor: Ian G. Fobbester
  • Patent number: 5585756
    Abstract: An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: December 17, 1996
    Assignee: University of Chicago
    Inventor: Xucheng Wang
  • Patent number: 5576658
    Abstract: There is disclosed a rectangular filter which has a simple configuration and is capable of producing an improved rectangular wave. An input step wave is differentiated by a differentiator circuit and amplified by a first amplifier. The output from the amplifier is inverted by an inverting amplifier having a gain of -1. The output from the first amplifier is integrated by an integrator circuit having a time constant equal to the time constant of the differentiator circuit. The output from the inverting amplifier and the output from the integrator circuit are summed up by an adding circuit. The input signal is faithfully reproduced at the output of the adding circuit. After a given time passes since the input signal has been applied, the capacitor of the integrator circuit is shorted out. In this way, a rectangular wave is obtained. There is also disclosed a filter amplifier comprising this rectangular filter and a gated integrator for integrating the output from the rectangular filter for a predetermined time.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: November 19, 1996
    Assignees: JEOL Ltd., JEOL Engineering Co. Ltd.
    Inventors: Kazuo Hushimi, Masahiko Kuwata
  • Patent number: 5430766
    Abstract: A dc-coupled packet mode digital data receiver, for use with an optical bus uses peak detectors to adaptively establish an instantaneous logic threshold at the beginning of a data burst. A dc compensator, responsive to outputs of the peak detectors, shunts dc or low frequency currents, corresponding to "dark level" optical signals, from the input of the receiver.
    Type: Grant
    Filed: August 22, 1994
    Date of Patent: July 4, 1995
    Assignee: AT&T Corp.
    Inventors: Yusuke Ota, Robert G. Swartz
  • Patent number: 5426389
    Abstract: A device for restoring DC and non-zero average components of a serially transmitted binary signal which has been AC coupled. The device comprises an input port for the binary signal, a clamping circuit, a feedback network, a summing node, and an output port. The input port includes a capacitor for coupling the binary signal to the summing node and the clamping circuit. The feedback network includes an input and an output which are also connected to the summing node. The clamping circuit clamps the positive and negative peaks of the AC coupled binary signal which exceed a predetermined range. The feedback network latches the AC coupled binary signal and produces a current signal. For a binary signal which is within the predetermined range, the clamping circuit exhibits a very high input impedance, thereby causing the current signal to charge the coupling capacitor and produce a voltage which is added to the AC coupled binary signal at the summing node.
    Type: Grant
    Filed: January 21, 1993
    Date of Patent: June 20, 1995
    Assignee: Gennum Corporation
    Inventor: Stephen Webster
  • Patent number: 5059918
    Abstract: A controllable amplifier, which has two symmetrical outputs, at which two output signals mirror-symmetrical with respect to each other are present, is used for amplification of a burst signal. To achieve the largest possible eye opening of the signals to be fed to a comparator, a predetermined d.c. voltage difference for the formation of matched signals is adjusted for both output signals. After this, the arithmetic mean values of the two matched signals are formed and are fed to a second comparator. The output value of the second comparator is fed to an integrator, to which a reference voltage is also fed. In case of a deviation of the mean values of the two matched signals from each other, the amplifier is adjusted in a compensating direction by the integrator.
    Type: Grant
    Filed: October 2, 1990
    Date of Patent: October 22, 1991
    Assignee: ke Kommunikations Elektronik
    Inventors: Martin Brahms, Andreas Hennig, Andreas Timmermann
  • Patent number: 5051708
    Abstract: In order to boost the output power of a first amplifier (A1) a second amplifier (A2) can increase the supply voltage difference across the first amplifier (A1). However, variations of the supply voltage difference result in comparatively high distortion. In order to minimize this distortion while maintaining the output power, a signal-follower circuit generates a direct voltage lever which tracks a first output signal of the first amplifier, for which purpose the signal-follower circuit is driven by a third amplifier, which compares the first output signal with a reference signal.
    Type: Grant
    Filed: June 18, 1990
    Date of Patent: September 24, 1991
    Assignee: U.S. Philips Corp.
    Inventors: Hendrik Boezen, Pieter Buitendijk, Rudolf W. Mathijssen
  • Patent number: 4736391
    Abstract: A binary data receiver data modulated light signals and applies them to a photodetector for producing electrical data signals which are amplified and applied to a data decision circuit. The data decision circuit compares the instantaneous value of the amplified data signals with a fixed threshold to determine if a logic high or low level is received. A portion of the signal path between the photodetector and the data decision circuit is ac coupled, whereby the moment-to-moment variations of duty cycle of the signal due to the information content of the data causes variations in the peak excursions of the signal which may adversely affect the data decisions or processing of the data. Open-circuit correction of the average value is accomplished by a correction signal generator which receives an ac coupled data sample, and rectifies both positive-going and negative-going excursions relative to ground to produce positive and negative average value signals.
    Type: Grant
    Filed: July 22, 1986
    Date of Patent: April 5, 1988
    Assignee: General Electric Company
    Inventor: Stefan A. Siegel
  • Patent number: 4714828
    Abstract: An optoelectronic transducer is proposed which includes a PIN diode (2) that delivers a current that is proportional to a light signal that is received. The diode is connected to the input of an inverting amplifier (4) that delivers a voltage signal v.sub.s. A negative feedback means of the transfer impedance type (6) is connected across the inverting amplifier. The transducer further includes a stabilizing means (8) for the amplifier gain and a temperature drift compensating means (10) for compensating for the drift in amplifier temperature. The stabilizing means (8) includes a detector (26, 28, 32) for the high peak of the signal v.sub.s, and the temperature drift compensating means (10) includes a filter means (38) for producing the means value v.sub.m of the signal v.sub.s, and a comparator (40) that receives the signals v.sub.s and v.sub.m and delivers a signal that reproduces the interference of the light signal that has been received.
    Type: Grant
    Filed: March 14, 1986
    Date of Patent: December 22, 1987
    Assignee: Bull S.A. (Societe Anonyme)
    Inventors: Claude Bacou, Rene Baptiste, Henri Feissel, Gilbert Takats, Christian Cabrol
  • Patent number: 4603303
    Abstract: In an amplifier including an AC amplifier, its operation level shifts according to input waveforms. When a positive input signal is, for example, inputted, the circuit feeds out a synthesized signal to the amplifier in which signal a positive and negative portions are symmetry and have a time difference. The circuit compensates an operating level of the amplifier so that it amplifies a small signal to keep always a zero level of the signal being constant in spite of various signal waveforms and amplitudes whereby a linearity of the amplifier is improved and fluctuations of a dynamic range thereof are eliminated.
    Type: Grant
    Filed: May 7, 1985
    Date of Patent: July 29, 1986
    Assignee: Iwatsu Electric Co., Ltd.
    Inventors: Keishi Matsuno, Masafumi Souma, Atsushi Minegishi, Yoshihito Seki
  • Patent number: 4599571
    Abstract: In an amplifier including an AC amplifier, its operation level shifts according to input waveforms. This invention describes a circuit to eliminate the level shift. An output of the AC amplifier is fed to a level shift detector, wherein the level shift is detected to provide an error signal to a pulse width modulation circuit. In this circuit, a pulse of a pulse width corresponding with the level shift is generated and fed to a preamplifier, wherein the input waveform and the pulse are synthesized to be fed back to the AC amplifier. This feed back loop clamps a zero level of the input waveforms.
    Type: Grant
    Filed: May 7, 1985
    Date of Patent: July 8, 1986
    Assignee: Iwatsu Electric Co., Ltd.
    Inventor: Keishi Matsuno
  • Patent number: 4463317
    Abstract: A frequency modulation detector, includes an FM (frequency modulation) demodulator, an adder responsive to first and second signals for maintaining a constant D.C. level output signal, the first signal being the FM signal, and a feedback circuit connected to the adder for comparing the D.C. output level of the adder with a reference signal level to produce the second signal.
    Type: Grant
    Filed: August 12, 1981
    Date of Patent: July 31, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Hiromi Kusakabe
  • Patent number: 4374362
    Abstract: An electronic interface circuit for coupling a source of analog signals to a measuring and/or recording device whereby the time varying component of the analog signal can be separated from any steady-state component, such as a DC bias, which may be present, allowing further signal processing on the time varying component only. The interface circuit comprises a servo control device having both a digital feedback loop and an analog feedback loop. Upon closure of a manually operable switch, a timer is initiated which first actuates the digital feedback loop wherein a digital number is generated which is proportional to the deviation of the signal output from a summing amplifier from a zero volt level. This digital number is applied through a digital-to-analog converter to the summing amplifier along with a second feedback signal obtained by sampling the output from the summing amplifier at a time subsequent to the digital correction operation.
    Type: Grant
    Filed: February 17, 1981
    Date of Patent: February 15, 1983
    Assignee: Sys-Tec, Inc.
    Inventors: George K. Sutherland, Thomas J. Thielen
  • Patent number: 4366440
    Abstract: A feedback amplifier is configured as a contrast compressor for video signals including a reference blanking level. A feedback resistance is divided into two resistors coupled at a juncture. Contrast compression is accomplished by a diode coupled to the juncture and to a voltage source which may be adjusted to vary the point of onset of compression. The diode current perturbs the operating point of the amplifier, thereby producing a condition in which the blanking level at the output is other than zero volts. This is undesirable as it may affect following circuits adversely or require further setup. A clamp is coupled to the inverting input terminal for offsetting the perturbation of the amplifier operating point caused by the diode current.
    Type: Grant
    Filed: October 31, 1980
    Date of Patent: December 28, 1982
    Assignee: RCA Corporation
    Inventors: Charles L. Olson, Lucas J. Bazin
  • Patent number: 4363977
    Abstract: A device for discriminating between two values of a signal using DC offset compensation including an automatic gain control circuit, a peak detector circuit and a feedback path from the peak detector circuit to the input circuit of the automatic gain control circuit. The value of the feedback current is regulated so that the maximum value of one of the same polarity signals and the opposite polarity signal coincides with the minimum value of the other of the two signals.
    Type: Grant
    Filed: February 20, 1981
    Date of Patent: December 14, 1982
    Assignee: Fujitsu Limited
    Inventors: Toshitaka Tsuda, Kazuo Murano, Kazuo Yamaguchi, Takafumi Chujo, Norio Murakami, Motohide Takahashi
  • Patent number: 4336615
    Abstract: An AM broadcast transmitter uses a PWM modulator that requires a pulse width filter. It has been found that the filter load varies over the modulation cycle resulting in distortion. To overcome this problem, a varying voltage is applied to an RF driver stage during portions of the modulation cycle.
    Type: Grant
    Filed: October 2, 1980
    Date of Patent: June 22, 1982
    Assignee: RCA Corporation
    Inventors: Richard F. Abt, William L. Behrend
  • Patent number: 4323852
    Abstract: A fast recovery audio amplifier for use in electrophysiology and other neurological tests and techniques relating to nerve and muscle functions. The fast recovery amplifier recovers from overload in less than one millisecond, thus enabling its use in clinical electrophysiology to record time lapses from stimulus to response of less than several milliseconds. The amplifier achieves fast recovery primarily because it eliminates input and interstage coupling capacitors so that the feed-forward path from electrode to output is strictly a DC amplifier.
    Type: Grant
    Filed: November 29, 1979
    Date of Patent: April 6, 1982
    Assignee: University of Iowa Research Foundation
    Inventor: D. David Walker
  • Patent number: 4319197
    Abstract: An AC coupled amplifier system is protected from overloading input signals by means of a "bootstrap" circuit which provides a compensation signal substantially matching the overscale portion of such input signal and applies that compensation signal to the coupling capacitor as an offset in order to prevent excessive charge accumulation on that capacitor. A voltage controlled current source serves as a signal range limiter in the circuit and responds to overscale input signals by causing a circuit loop opening and forcing loop closure in a secondary feedback circuit from which the extent of input signal overscale is determined. The matching compensation signal is then derived from such determination. The protection circuit further provides a reset function to account for extended overscale input signal levels.
    Type: Grant
    Filed: January 16, 1980
    Date of Patent: March 9, 1982
    Assignee: Keuffel & Esser Company
    Inventor: James R. Trummer
  • Patent number: 4237424
    Abstract: Input pulses are coupled through a delay network to a pulse amplifier. The amplifier includes feedback circuitry for correcting its output to a particular baseline level, generally zero volts. Within the amplifier feedback path is a gate, which is normally closed. Input pulses are also coupled to a pulse detector; whenever an input pulse is detected, the baseline gate in the amplifier feedback path is open, and the dynamic feedback operation is temporarily inhibited. During this time, the most recent previous level of baseline correction is retained.
    Type: Grant
    Filed: August 18, 1978
    Date of Patent: December 2, 1980
    Assignee: Ortho Diagnostics, Inc.
    Inventor: Irving L. Weiner
  • Patent number: 4227155
    Abstract: A pre-amplifier for photomultiplier tubes includes means to compensate for the combined dark current and noise output of a photomultiplier tube without inducing a noise dependent offset voltage at the pre-amplifier output. A feedback amplifier and a compensating network, including a capacitor, cooperate to monitor the pre-amplifier output and during this time to maintain the feedback amplifier in a linearly responsive state while charging the capacitor to an amount necessary to clamp the average value of the most negative excursion of the pre-amplifier output to ground.
    Type: Grant
    Filed: August 14, 1978
    Date of Patent: October 7, 1980
    Assignee: Abbott Laboratories
    Inventor: Jesse P. Lerma
  • Patent number: 4178558
    Abstract: A DC level clamping circuit comprising a differential amplifier circuit constituted by a pair of transistors, a signal source, a first capacitor connected between the signal source and a first input terminal of the amplifier circuit, a second capacitor connected between the ground and a second input terminal of the amplifier circuit and having substantially the same capacity as the first capacitor, a pulse generator, a DC power source and first and second switching elements. The first switching element is connected between the DC power source and the first input terminal of the amplifier circuit, and the second switching element between the DC power source and the second input terminal of the amplifier circuit. These switching elements are controlled by the pulses from the pulse generator in a similar manner.
    Type: Grant
    Filed: September 26, 1978
    Date of Patent: December 11, 1979
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Yoshitake Nagashima, Kazumasa Noyori, Hideki Moriyama