Nonlinear Impedance Element In Loop Path Patents (Class 330/110)
  • Patent number: 11005438
    Abstract: An apparatus includes a Transimpedance Amplifier (TIA), an input interface and input masking circuitry. The TIA is configured to convert input current pulses into output voltage pulses. The input interface is configured to receive a control signal indicative of one or more time intervals. The input masking circuitry is configured to prevent the input current pulses from saturating the TIA during the one or more time intervals indicated by the control signal.
    Type: Grant
    Filed: November 18, 2018
    Date of Patent: May 11, 2021
    Assignee: APPLE INC.
    Inventor: Ido Luft
  • Patent number: 10992275
    Abstract: An automatic gain control circuit of a transimpedance amplifier includes a transimpedance amplifier TIA1, a transimpedance amplifier TIA2, an NMOS transistor Q1, an NMOS transistor Q2, an error amplifier U3, and a bias current source Ib. An input terminal and an output terminal of the transimpedance amplifier TIA1 are connected to a drain and a source of the NMOS transistor Q1, respectively. An input terminal and an output terminal of the transimpedance amplifier TIA2 are connected to a drain and a source of the NMOS transistor Q2, respectively. An output terminal of the bias current source Ib is connected to a positive input terminal of the error amplifier U3 and the drain of the MOS transistor Q2.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: April 27, 2021
    Assignee: XIAMEN UX HIGH-SPEED IC CO., LTD.
    Inventor: Shaoheng Lin
  • Patent number: 10965212
    Abstract: In an embodiment, an SMPS comprises a half-bridge, and a driver configured to drive the half-bridge based on a PWM signal. The SMPS further comprising a first circuit coupled between the output of the driver and a control terminal of a high-side transistor of the half-bridge, wherein the first circuit is configured to maintain the first transistor on when the PWM signal has a duty cycle that is substantially 100%.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: March 30, 2021
    Assignee: STMICROELECTRONICS (ALPS) SAS
    Inventor: Patrik Arno
  • Patent number: 10771016
    Abstract: An amplifier circuit including an input amplifier, an output amplifier and a diode device is provided. The output amplifier is coupled to the input amplifier and outputs an output voltage. The diode device is coupled between an output end and an input end of the output amplifier. When a voltage difference between the output end and the input end of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: September 8, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chia-Wei Su, Ju-Lin Huang, Keko-Chun Liang
  • Patent number: 10734958
    Abstract: A line receiver is described. The line receiver may be configured to receive signals transmitted via a communication channel, such as a metal trace on a printed circuit board or a cable. The receiver may comprise a buffer and circuitry for enhancing the trans-conductance gain of the buffer. By enhancing the trans-conductance gain of the buffer, linearity may be improved and susceptibility to process and temperature variations may be limited. Enhancement of the trans-conductance gain may be performed using feedback circuitry coupled to the buffer. The receiver may further comprise mirror circuitry configured to provide a desired current to the load. The receiver may further comprise a gain stage for setting the gain of the receiver to a desired level.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: August 4, 2020
    Assignee: MediaTek Inc.
    Inventors: Ramy Awad, Tamer Ali
  • Patent number: 10536159
    Abstract: The disclosed technology relates to a method for improving performance of a feedback circuit comprising an amplifier and a feedback network, wherein the feedback circuit has at least one tunable component. In one aspect, the method comprises measuring first amplitude values at an input of the amplifier and second amplitude values at an output of the amplifier, estimating a linear open-loop gain of the amplifier based on both the amplitude values, estimating a linear finite gain error based on the estimated gain and the second amplitude values, subtracting the linear finite gain error from the first amplitude values to derive a set of samples containing second error information, deriving an signal-to-noise-plus-distortion ratio estimate based on the variance of the set of samples and a variance of the second amplitude values, and adjusting the feedback circuit in accordance with the signal-to-noise-plus-distortion ratio estimate.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: January 14, 2020
    Assignee: IMEC vzw
    Inventors: Benjamin Hershberg, Ewout Martens, Jan Craninckx
  • Patent number: 10483922
    Abstract: A photoelectric conversion device is provided. The device comprises a light receiving element, first and second transimpedance amplifiers configured to receive a signal of the light receiving element and output a voltage, a differential operation amplifier configured to perform a differential amplification for outputs of the first and second transimpedance amplifiers and a switching unit. The switching unit includes an output switching unit configured to switch connections between a first state where the light receiving element and the first transimpedance amplifier are connected and a second state where the light receiving element and the second transimpedance amplifier are connected, and a capacitance adjusting unit connected to an input terminal of each of the first and second transimpedance amplifiers and configured to adjust a capacitance value of the first and transimpedance amplifier and/or a capacitance value of the second transimpedance amplifier.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: November 19, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanori Shibata, Hirotaka Shiomichi
  • Patent number: 10432081
    Abstract: A waveform shaping circuit includes a first parallel circuit including a first capacitance element and a first resistance element coupled in parallel with each other, a positive pulse voltage being applied to a first terminal of the first capacitance element and a second terminal of the first resistance element, a gate terminal of a field-effect transistor being electrically coupled to a third terminal of the first capacitance element and a fourth terminal of the first resistance element, a first Zener diode having a first anode coupled to the third terminal and the fourth terminal, and a second parallel circuit including a second capacitance element and a second resistance element coupled in parallel with each other, a first cathode of the first Zener diode being coupled to a fifth terminal of the second capacitance element and a sixth terminal of the second resistance element.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: October 1, 2019
    Assignee: FUJITSU LIMITED
    Inventor: Tatsuya Hirose
  • Patent number: 10298180
    Abstract: This application provides a control circuit, a control method, and an electronic device the control circuit comprising: a first control sub-circuit configured to receive a first power supply signal from a first power supply sub-circuit in an electronic device that includes the control circuit and output a first control signal; a second control sub-circuit configured to receive a second power supply signal from a second power supply sub-circuit in the electronic device and output a second control signal under control of the first control signal, wherein the second control signal is used to control a functional sub-circuit in the electronic device to be disabled during power-on and power-off process of the electronic device.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: May 21, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., K-TRONICS (SUZHOU) TECHNOLOGY CO., LTD.
    Inventor: Songlin Liu
  • Patent number: 10263567
    Abstract: An amplifier circuit includes a first transistor; a first resistor to which a first potential is applied, the first resistor being connected to an emitter of the first transistor; a second resistor to which a second potential is applied, the second resistor being connected to a collector of the first transistor; and a signal control circuit configured to apply, to a base of the first transistor, a voltage that has been level-shifted based on an average value of a voltage at the collector of the first transistor, the signal control circuit being provided between the collector and the base of the first transistor.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: April 16, 2019
    Assignee: FUJITSU COMPONENT LIMITED
    Inventor: Hideki Oku
  • Patent number: 9923519
    Abstract: A power amplifier apparatus may include an amplifier configured to amplify an input signal and a delay transferring circuit connected between an input terminal and an output terminal of the amplifier, the delay transferring circuit configured to delay the input signal to transfer the delayed input signal to the output terminal of the amplifier.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: March 20, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Gyu Suck Kim
  • Patent number: 9871495
    Abstract: Systems and methods for providing thermal compensation for amplifiers are described. In some embodiments, an electronic circuit may include a main amplifier and a thermal compensation circuit coupled to the main amplifier, the thermal compensation circuit configured to adjust a gain of the main amplifier at a first range of frequencies relative to the gain of the main amplifier at a second range of frequencies. For example, the thermal compensation circuit may be configured to reduce a self-heating effect within the main amplifier when the main amplifier is in operation, such that the first range of frequencies is lower than the second range of frequencies.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: January 16, 2018
    Assignee: Texas Instruments Incorporated
    Inventor: Joseph Giacomini
  • Patent number: 9768686
    Abstract: Embodiments described herein describe a switching power converter that includes a switch, an inductor, a diode, and a controller that generates a control signal to turn on and turn off the switch. The controller generates the control signal by generating a reference signal, integrating a difference between a voltage value of the generated reference signal, and a voltage difference between voltage values of the switching node and the second output terminal, and generating the control signal by processing the integrated voltage difference.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: September 19, 2017
    Assignee: Dialog Semiconductor Inc.
    Inventor: Andrey B. Malinin
  • Patent number: 9397658
    Abstract: A gate drive circuit drives a control terminal of a power transistor and comprises: a drive terminal for electrically coupling the control terminal, a first reference source, a first switch arranged between the first reference source and the control terminal, a switch control circuit and a measurement circuit. The first switch is switched-on to turn-off the power transistor. The switch control circuit switches-off the first switch during a transition period to a fully off-state. The measurement circuit outputs a control signal to the switch control circuit in response to a value of a voltage at the control terminal measured when a discharge current flowing to the drive terminal has been reduced to a predetermined threshold, for switching-on the first switch if the measured value is smaller than a threshold voltage.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: July 19, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Thierry Sicard, Philippe Perruchoud
  • Patent number: 9331633
    Abstract: A system for adaptively eliminating intermods from a spectrum generated by combining two or more signals in a component or circuit includes a sampler for sampling an output signal of the component or circuit, a signal source for generating a conversion signal having a frequency matched to a target intermod of the spectrum, and a cancellation circuit to generate a cancellation phasor. The cancellation circuit is configured to receive the generated conversion signal and the sampled output signal and generate a cancellation phasor therefrom having a phase and amplitude configured to cancel the target intermod. A combining network can combine the cancellation phasor into the component or circuit to cancel the target intermod from the spectrum.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: May 3, 2016
    Assignee: ANRITSU COMPANY
    Inventor: Stephen Andrew Robertson
  • Patent number: 9253564
    Abstract: This document discusses, among other things, systems and methods including a depletion-mode switch configured to pass an audio signal from an input to an output in a low-impedance state when a power source is below a threshold and to isolate the input from the output in a high-impedance state when the power source is above the threshold and a noise-cancelation circuit configured to receive the audio signal from the input and to provide a modulated audio signal at the output when the power source is above the threshold.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: February 2, 2016
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Seth M. Prentice
  • Patent number: 9225297
    Abstract: A protection module (4) for a RF-amplifier (2) is efficient against overvoltage due to load impedance mismatch when said RF-amplifier is connected to a load RF-element (3). The protection module comprises a branch with at least one diode-like operating component (D1, D2, . . . , Dn) and a resistor (R2) which starts conducting when a RF-signal on a transmission link (6) between the RF-amplifier and the load RF-element is higher than a threshold set by the diode-like operating component. Such protection may be implemented in MOS technology only.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: December 29, 2015
    Assignee: ST-ERICSSON SA
    Inventor: Vincent Knopik
  • Patent number: 9166540
    Abstract: A system includes a weighting element, a transconductance circuit, a feedback loop, and an auxiliary loop. In some implementations, the transconductance circuit may accept an input and provide a first portion of an output for amplification at a variable amplification level to generate an amplifier output. The feedback loop may provide a portion of the amplifier output as a first feedback to the input. The first feedback may be associated with an impedance that may vary with the amplification level. The auxiliary loop may provide a second feedback to the input to reduce the dependence of the impedance on the amplification level.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: October 20, 2015
    Assignee: Broadcom Corporation
    Inventors: Giuseppe Cusmai, Vijayaramalingam Periasamy, Xi Chen, Ramon Alejandro Gomez
  • Patent number: 8890051
    Abstract: A photodetecting device 1 includes a photodiode PD and an integrating circuit 10. The integrating circuit 10 includes an amplifier circuit 20, a capacitive element C, a first switch SW1, and a second switch SW2. The second switch SW2 is provided between a reference potential input terminal to which a reference potential Vref is input and a terminal of the capacitive element C on the inverting input terminal side of the amplifier circuit 20, and the second switch is opened or closed according to the level of a second reset signal Reset2, and is capable of applying the reference potential Vref to the terminal of the capacitive element. Thus, an integrating circuit and a photodetecting device capable of achieving both low power consumption and high speed can be realized.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: November 18, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Haruhiro Funakoshi, Shinya Ito
  • Publication number: 20140125407
    Abstract: An apparatus for limiting the bandwidth of an amplifier provides for the design of an input impedance, a feedback impedance, and a load impedance such that the load impedance is proportional to the sum of the input impedance and feedback impedance. A sampling circuit has a load impedance including a resistor and capacitor in series to reduce the effective amplifier transconductance, which decreases bandwidth without increasing noise density or making this circuit more difficult to drive than a conventional circuit.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ronald A. Kapusta, Youn-Jae Kook
  • Patent number: 8497462
    Abstract: A trans-impedance amplifier (TIA) with an adjustable bandwidth is disclosed. The TIA of the present invention includes the amplifying stage and the emitter follower stage arranged in the downstream of the amplifying stage. The transistor in the amplifying stage includes a diode in the emitter thereof to provide a substantial emitter level to the transistor. This diode is biased by another current source with a variable function. The operating point of the diode, in particular, the differential resistance thereof, is variable by the current source, which adjusts the bandwidth of the TIA without affecting the phase characteristic of the TIA.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: July 30, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Yoshiyuki Sugimoto
  • Patent number: 8405455
    Abstract: An amplifier circuit and method are described for linearizing the gain of a voltage or current feedback amplifier that is non-linear.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: March 26, 2013
    Assignee: EADS North America, Inc.
    Inventor: John R. Coupland
  • Publication number: 20120162000
    Abstract: A switched capacitor circuit, which is operable in two or more kinds of operation modes including a first and second operation modes, includes an amplifier and two or more internal capacitors with switches for controlling connection/disconnection of the capacitor. In the first operation mode that precedes the second operation mode, the switched capacitor circuit generates the first analog output voltage by using the first internal capacitor connected between an input terminal and output terminal of the amplifier by using its switches, the other internal capacitances connected between an input terminal of the amplifier and each analog input voltage supply by using its switches. In the second operation mode, the switched capacitor circuit generates the second analog output voltage with larger feedback factor of the amplifier than it in the first operation mode, by removing some of the internal capacitors, except the first internal capacitor, from the first operation mode.
    Type: Application
    Filed: March 2, 2012
    Publication date: June 28, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Kunihiko GOTOH
  • Patent number: 8085175
    Abstract: The present invention provides an advanced adaptive predistortion linearization technique to dramatically reduce nonlinear distortion in power amplifiers over a very wide instantaneous bandwidth (up to 2 GHz) and over a wide range of amplifier types, input frequencies, signal types, amplitudes, temperature, and other environmental and signal conditions. In an embodiment of the invention, the predistortion linearization circuitry comprises (1) a higher-order polynomial model of an amplifier's gain and phase characteristics—higher than a third-order polynomial model; (2) an adaptive calibration technique; and (3) a heuristic calibration technique. The higher-order polynomial model is generated by introducing, for example, a plurality of multi-tone test signals with varying center frequency and spacing into the power amplifier. From the power amplifier's corresponding output, the nonlinearities are modeled by employing a higher-order curve fit to capture the irregularities in the nonlinear transfer function.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: December 27, 2011
    Assignee: V Corp Technologies, Inc.
    Inventor: Scott R. Velazquez
  • Publication number: 20110194004
    Abstract: An amplifying/digitizing circuit with a signal amplifying capability and a comparator capability is provided. The amplifying/digitizing circuit includes an amplifier having an input end and an output end, and a control circuit. The control circuit is coupled to the input end and the output end of the amplifier. When the amplifying/digitizing circuit is operated under an amplifying mode, the control circuit has a first configuration to receive a first input signal and makes the amplifier generate an output voltage at the output end according to the first input signal and an amplification factor. When the amplifying/digitizing circuit is operated under an ADC mode, the control circuit has a second configuration to receive a second input signal and makes the amplifier generate a comparison result according to the second input signal and the output voltage.
    Type: Application
    Filed: February 8, 2010
    Publication date: August 11, 2011
    Inventors: Shih-Feng Chen, Ping-Hung Yin
  • Patent number: 7952427
    Abstract: A signal amplifier circuit includes peak value holding circuit 11 receiving positive-phase input signal, peak value holding circuit 12 receiving negative-phase input signal, adder 13 adding the positive-phase input signal and output signal of peak value holding circuit 12, adder 14 adding the negative-phase input signal and output signal of the peak value holding circuit 11, non-inverting amplifier 15 amplifying output signal of adder 13, non-inverting amplifier 16 amplifying output signal of adder 14, peak value holding circuit 21 receiving positive-phase output signal of non-inverting amplifier 15, peak value holding circuit 22 receiving negative-phase output signal of non-inverting amplifier 16, adder 23 adding the positive-phase output signal and output signal of peak value holding circuit 22, adder 24 adding the negative-phase output signal and output signal of peak value holding circuit 21, and differential amplifier 29 amplifying difference between output signals of adders 23 and 24.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: May 31, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Takeshi Nagahori
  • Publication number: 20110068860
    Abstract: The detection circuit comprises a photodiode connected to an input of a capacitive transimpedance amplifier. The circuit comprises an anti-blooming circuit connected between the input and an output of the capacitive trans-impedance amplifier. The anti-blooming circuit comprises a field effect transistor connected between the input and output of the capacitive trans-impedance amplifier. The transistor is of pMOS type when the input of the capacitive transimpedance amplifier is connected to a cathode of the photodiode. The transistor is of nMOS type when the input of the capacitive transimpedance amplifier is connected to an anode of the photodiode.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 24, 2011
    Applicant: SOCIETE FRANCAISE DE DETECTEURS INFRAROUGES - SOFRADIR
    Inventor: Laurent BAUD
  • Publication number: 20110032031
    Abstract: An amplifier circuit includes an amplifier unit that amplifies a signal received by an input terminal and outputs the amplified signal to an output terminal, a feedback capacitor that is connected between the input terminal of the amplifier and the output terminal, and a controller that varies a capacitance in the feedback capacitor for a certain period when a potential of the output terminal in the amplifier unit becomes higher or lower than a certain potential.
    Type: Application
    Filed: June 11, 2010
    Publication date: February 10, 2011
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tadashi JAHANA
  • Patent number: 7876152
    Abstract: A level-shifting amplifier is provided for level-shifting an input signal with a voltage magnitude that exceeds a supply voltage of the amplifier. In operation, the amplifier has an input impedance of greater than 100 MOhms.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: January 25, 2011
    Assignee: Monolithic Power Systems, Inc.
    Inventor: James Copland Moyer
  • Patent number: 7855598
    Abstract: An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: December 21, 2010
    Inventor: Jeffrey Arnold
  • Patent number: 7800439
    Abstract: A preamplifier circuit for processing a signal provided by a radiation detector includes a transimpedance amplifier coupled to receive a current signal from a detector and generate a voltage signal at its output. A second amplification stage has an input coupled to an output of the transimpedance amplifier for providing an amplified voltage signal. Detector electronics include a preamplifier circuit having a first and second transimpedance amplifier coupled to receive a current signal from a first and second location on a detector, respectively, and generate a first and second voltage signal at respective outputs. A second amplification stage has an input coupled to an output of the transimpedance amplifiers for amplifying the first and said second voltage signals to provide first and second amplified voltage signals.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: September 21, 2010
    Assignee: Ut-Battelle, LLC
    Inventors: Richard A. Riedel, Alan L. Wintenberg, Lloyd G. Clonts, Ronald G. Cooper
  • Publication number: 20100214277
    Abstract: The present invention provides an output circuit that can suppress a voltage drop in an output section of the output circuit and that can suppress a phase delay of an output signal which is feedbacked to an input section of the output circuit. An AC component of a data signal output from an output terminal of an operational amplifier to which an input signal is input, is negatively feedbacked via a capacitor, and is input to an inverting input terminal of the operational amplifier. A DC component of the data signal output from the output terminal, is lowered its potential by a second protective resistor to the same potential as the input signal and is output as an output signal to data lines via respective output pads, and is output to an inverting input terminal of the operational amplifier via a first protective resistor.
    Type: Application
    Filed: February 22, 2010
    Publication date: August 26, 2010
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Koji Yamazaki, Kenichi Shiibayashi, Atsushi Hirama
  • Patent number: 7733174
    Abstract: An apparatus is provided. The apparatus includes an amplifier, differential amplifiers, and FETs. The amplifier has an intermediate node and an output node, and the amplifier is adapted to receive an audio signal. Each differential amplifier amplifies the difference between an output voltage from the output node with a reference voltages. The FETs are coupled in series with one another between a first and a second voltage, and each FET receives an output from at least one of the differential amplifiers. Additionally, the intermediate node is coupled to a node between at least two FETs.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: June 8, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Arun Kumar Sharma, Ryan Erik Lind, Ronnie A. Bean
  • Patent number: 7702301
    Abstract: A method of reducing distortion in the output of an amplifier is provided. The method comprises subtractively combining an error signals with the appropriate phase shift with input signals to be amplified. The error signal being generated by subtractively combining a fed-forward portion of the input signal with a portion of the fed-back amplified output signal, and signal processing applied to it between its generation and application to correcting the input signal in the baseband domain. The error therefore being down-converted, filtered, and up-converted in the feedback path. The filtered baseband error signal components providing inputs to a controller which adjusts active elements of the amplification and feedback path in order to minimize the distortion within the output of the amplifier.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: April 20, 2010
    Assignee: Sige Semiconductor Inc.
    Inventors: Gordon G. Rabjohn, Johan Grundlingh
  • Patent number: 7683710
    Abstract: An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: March 23, 2010
    Inventor: Jeffrey Arnold
  • Patent number: 7680468
    Abstract: A method of reducing distortion in the output of an amplifier is provided. The method comprises subtractively combining an error signals with the appropriate phase shift with input signals to be amplified. The error signal being generated by subtractively combining a fed-forward portion of the input signal with a portion of the fed-back amplified output signal, and signal processing applied to it between its generation and application to correcting the input signal in the baseband domain. The error therefore being down-converted, filtered, and up-converted in the feedback path. The filtered baseband error signal components providing inputs to a controller which adjusts active elements of the amplification and feedback path in order to minimize the distortion within the output of the amplifier.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: March 16, 2010
    Assignee: SIGE Semiconductor Inc.
    Inventors: Gordon G. Rabjohn, Johan Grundlingh
  • Patent number: 7667176
    Abstract: The apparatus and method provide a readout technique and circuit for increasing or maintaining dynamic range of an image sensor. The readout technique and circuit process each pixel individually based on the magnitude of the readout signal. The circuit includes a gain amplifier amplifying the readout analog signal, a level detection circuit for determining the signal's magnitude, a second gain amplifier applying a gain based on the signal magnitude and an analog-to-digital converter digitizing the signal and a circuit for multiplying or dividing the signal. The method and circuit allow for a lower signal-to-noise ratio while increasing the dynamic range of the imager.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: February 23, 2010
    Assignee: Aptina Imaging Corporation
    Inventors: Espen A. Olsen, Jorgen Moholt
  • Publication number: 20090278598
    Abstract: A method and apparatus for modifying interactions between an electrical generator and a nonlinear load is described. One illustrative embodiment receives a main control signal at a control input of an engine of the electrical generator, the main control signal controlling at least one of output power, output current, and output voltage delivered by the electrical generator to the nonlinear load, the engine being one of a power amplifier and a converter; measures the impedance of the nonlinear load; and feeds to the electrical generator a compensation signal corresponding to the measured impedance, the compensation signal rendering a transfer function of the output power of the electrical generator with respect to the main control signal substantially insensitive to variations in the impedance of the nonlinear load to stabilize the output power of the electrical generator.
    Type: Application
    Filed: June 29, 2009
    Publication date: November 12, 2009
    Inventor: Gideon van Zyl
  • Publication number: 20090231031
    Abstract: A level-shifting amplifier is provided for level-shifting an input signal with a voltage magnitude that exceeds a supply voltage of the amplifier. In operation, the amplifier has an input impedance of greater than 100 MOhms.
    Type: Application
    Filed: February 23, 2009
    Publication date: September 17, 2009
    Inventor: James Copland Moyer
  • Patent number: 7573126
    Abstract: The present invention alters the frequency response of an optoelectronic device to match a driver circuit that drives the optoelectronic device. The optoelectronic device is formed on a first substrate. A matching circuit is also formed on the first substrate and coupled to the optoelectronic device to change its frequency response. The matching circuit provides a precise and repeatable amount of inductance to an optoelectronic device.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: August 11, 2009
    Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventor: Peter Henry Mahowald
  • Patent number: 7547889
    Abstract: The present invention discloses a photon detection device that is adapted to detect at least one packet of photons. The photon detection device may include a photon-sensitive element having an output, an amplifier; and a non-linear feedback (NLF) element. The photon-sensitive element generates charges upon the engagement of at least one photon packet therewith. An increase from a first number of charges in the photon-sensitive element to a second number of charges, results in a corresponding increase of a first reset time required to reset the first number of charges to a respective second reset time required to reset the second number of charges in the photon-sensitive element, whereby the reset time is non-linear to with respect to an increase in the charges. Additional and alternative embodiments are described and claimed.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: June 16, 2009
    Assignee: CSEM Centre Suisse D'Electronique Et De Microtechnique SA
    Inventors: Michael Lehmann, Rolf Kaufmann, Max Erick Busse-Grawitz
  • Patent number: 7511572
    Abstract: A level-shifting amplifier is provided for level-shifting an input signal with a voltage magnitude that exceeds a supply voltage of the amplifier. In operation, the amplifier has an input impedance of greater than 100 MOhms.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: March 31, 2009
    Assignee: Monolithic Power Systems, Inc.
    Inventor: James Copland Moyer
  • Patent number: 7492221
    Abstract: A feedback control loop around a gain element controls the output signal of said gain element responsive to an input or reference signal, and is additionally responsive to a non-linear feedback signal. The feedback loop of this invention comprises computation means for exponentiating a signal representing the output of the gain element to generate said non-linear feedback signal. The control loop of invention provides exceptional transient response when used for driving reactive loads.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: February 17, 2009
    Assignee: Lawson Labs, Inc.
    Inventors: Thomas E. Lawson, William H. Morong
  • Patent number: 7459972
    Abstract: An amplifier system includes a first amplifier, a second amplifier, a first capacitance, and a first transistor. The first amplifier has an input and an output. The second amplifier has an input that communicates with the output of the first amplifier. The first capacitance has one end that communicates with the input of the first amplifier. The first transistor has a control terminal, a first terminal that communicates with the output of the first amplifier, and a second terminal that communicates with another end of the first capacitance.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: December 2, 2008
    Assignee: Marvell World Trade Ltd.
    Inventors: Farbod Aram, Sehat Sutardja
  • Patent number: 7449670
    Abstract: An amplifier circuit according to the present invention includes: a first operational amplifier having a negative input terminal, a positive input terminal, and an output terminal; a photodiode connected to the negative input terminal; a first resistor inserted between the output terminal and the negative input terminal; and a second resistor inserted between the output terminal and the positive input terminal, in which the amplifier circuit outputs current from the output terminal via the second resistor.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: November 11, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Yamaguchi, Shinichi Miyamoto, Tetsuo Chato, Yasufumi Shirakawa, Yuzo Shimizu
  • Publication number: 20080218259
    Abstract: A method for digitally processing audio signals to emulate the effects of vacuum tube amplifiers and preamplifiers, musical instrument amplification systems, and distortion effects. By use of a parametrically-controlled non-linear transfer function, non-linear filters, feedback elements, and power-law function models, the dynamic behavior and distortion effects of tube amplification stages are simulated. This provides users with the capability to reproduce the desired sounds of vintage and modern tube amplifier systems and effects with the conveniences and control associated with digital signal processing systems and software.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 11, 2008
    Inventor: Marc Nicholas Gallo
  • Patent number: 7385446
    Abstract: A level-shifting amplifier is provided for level-shifting an input signal with a voltage magnitude that exceeds a supply voltage of the amplifier. In operation, the amplifier has an input impedance of greater than 100M Ohms.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: June 10, 2008
    Assignee: Monolithic Power Systems, Inc.
    Inventor: James Copland Moyer
  • Patent number: 7332971
    Abstract: A Gigabit/s transimpedance amplifier system includes a forward-path amplifier section with a very large bandwidth and an overall frequency-selective feedback section which is active only from DC to low frequencies. The forward-path of the amplifier comprises a regulated cascode for receiving the input signal, a regulated cascode for receiving the feedback signal, a single-ended to differential converter and an output buffer. Stability and frequency selection is achieved by a bandwidth-limited operational amplifier in the feedback path. The Miller multiplication of a capacitive means in the operational amplifier creates a low-frequency pole and stabilizes the feedback loop and thereby limits the frequency range of the feedback.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: February 19, 2008
    Assignee: Agency for Science, Technology and Research
    Inventors: Uday Dasgupta, Chun Geik Tan
  • Patent number: 7317351
    Abstract: A low noise amplifier (LNA) is discussed. In implementations, a LNA may include a feedback section coupled to a transistor. The feedback section may have a resistive portion including a buffer and a resistor. A capacitor may be connected in parallel with the resistor. In additional implementations, an integrated circuit may include a second transistor connected to the drain of the first transistor. A feedback section may be coupled across the first and second transistors. The feedback section may include a buffer, a resistor and a capacitor connected in series, so that the terminal of the buffer is connected to the drain of the second transistor while the terminal of the resistor is connected to a source on the first transistor.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: January 8, 2008
    Assignee: Intel Corporation
    Inventor: Stewart S. Taylor
  • Patent number: 7297917
    Abstract: The apparatus and method provide a readout technique and circuit for increasing or maintaining dynamic range of an image sensor. The readout technique and circuit process each pixel individually based on the magnitude of the readout signal. The circuit includes a gain amplifier amplifying the readout analog signal, a level detection circuit for determining the signal's magnitude, a second gain amplifier applying a gain based on the signal magnitude and an analog-to-digital converter digitizing the signal and a circuit for multiplying or dividing the signal. The method and circuit allow for a lower signal-to-noise ratio while increasing the dynamic range of the imager.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: November 20, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Espen A. Olsen, Jorgen Moholt