Abstract: A circuit for matching impedance and regulating a voltage of a high radio frequency line across a low voltage device that includes a differential input port, the high radio frequency lines, an internally routed line, a singled ended peak detection circuit, and a single-ended programmable variable impedance using a single-ended programmable variable impedance. The differential input port receives a differential high radio frequency signal using driver buffers. The internally routed line boosts the received differential high-frequency RF signal. The single-ended peak detection circuit detects peak voltages of the differential high-frequency RF signal. Depending on the peak value obtained at the output of the single-ended peak detection circuit, the single-ended programmable variable impedance that matches the impedance of each of high radio frequency lines and regulates the voltage of high radio frequency lines across said low voltage device to a pre-defined voltage.

Abstract: An amplifier circuit comprising: an amplifier; an output limiter for providing a variable impedance comprising: a first and second limiter terminal; a transistor comprising a conduction channel; a first resistor coupled in parallel with the conduction channel; and a capacitor coupled in series with the conduction channel between the conduction channel and the first or second limiter terminal; and a feedback control unit comprising a comparator block configured to provide a control signal to the output limiter based on a comparison of the amplifier output signal and a setting voltage; wherein: the first limiter terminal is coupled to the amplifier input or output; the second limiter terminal receives a reference voltage; and wherein receipt of the control signal at the transistor provides for a variable impedance for the amplifier circuit dependent on the amplifier output signal.

Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.

Abstract: System and methods of measuring nonlinear interference (NLI) on a per-span basis in an optical system with a plurality of spans are provided. The method includes steps of varying power based on phase sensitive detection method on a span under test of the plurality of spans; observing total noise, at an optical receiver, from all of the plurality of spans; and isolating noise for the span under test from the total noise based on the varying power. The optical system can be in-service with one or more traffic-carrying channels, and the varying power is small enough on the span under test which does not impact the one or more traffic-carrying channels.

Abstract: A wireless communication apparatus includes a signal terminal which receives a transmitting signal, N antenna elements, where N is an integer greater than or equal to 2, a first amplifier including first input and output terminals, and N second amplifiers including N second input and output terminals coupled to the N antenna elements, respectively. The first amplifier amplifies the transmitting signal received from the signal terminal via the first input terminal with a gain which is weighted and adjustable according to a first weight. The N second amplifiers amplify the amplified transmitting signal received from the second output terminal via the N second input terminals with gains which are weighted and adjustable according to N second weights. The amplified transmitting signal, amplified by the N second amplifiers, is output to the N antenna elements via the N second output terminals.

Abstract: An optical reception device includes a coefficient update section which optimizes a dispersion coefficient used in compensation of wavelength dispersion of a received signal obtained by receiving an optical signal according to a coherent detection method and a phase rotation amount used in compensation of a nonlinear optical effect of the received signal, and a transmission characteristic estimation section which estimates a transmission characteristic of a transmission line by using the optimized dispersion coefficient and the optimized phase rotation amount.

Abstract: Doherty radio frequency (RF) amplifier circuitry includes an input node, an output node, a main amplifier path, and a peaking amplifier path. The main amplifier path is coupled between the input node and the output node and includes a main amplifier. The peaking amplifier path is coupled in parallel with the main amplifier path between the input node and the output node, and includes a peaking amplifier and a peaking variable gain preamplifier between the input node and the peaking amplifier. The peaking variable gain preamplifier is configured to adjust a current provided to the peaking amplifier.

Abstract: A feedforward echo cancellation device includes: a first impedance circuit for responding to a transmission current to output a first current to a node; an echo cancellation current generating circuit for drawing an echo cancellation current from the node; a circuit module that is coupled to the echo cancellation current generating circuit and the node has a first impedance value adjusted based on a system convergence index of a communication device, where the first impedance value is used to determine a gain of a programmable gain amplifier in the communication device; and a second impedance circuit for responding to the transmission current to output a second current to the node, where a second impedance value of the second impedance circuit is adjusted based on the first impedance value of the circuit module accordingly. Specifically, the node is coupled to an input terminal of the programmable gain amplifier.

Abstract: A circuit includes a first biasing voltage source, a second biasing voltage source, a first resistor device coupled between the first biasing voltage source and a first terminal of the circuit, a second resistor device coupled between the second biasing voltage source and a second terminal of the circuit, a third resistor device coupled between the second biasing voltage source and a third terminal, a first capacitor coupled between the third terminal and ground, and an amplifier having an input coupled to the second terminal and an output coupled to a circuit output.

Abstract: A reference voltage generator is disclosed that may provide a plurality of reference voltages. A reference voltage generator may include a voltage divider, a multiplexer coupled to the voltage divider, an operational amplifier that may receive a voltage from the multiplexer, and a plurality of resistors that may receive an output from the operational amplifier. The reference voltages may be provided from output terminals coupled to the resistors. A reference voltage generator may include a voltage divider, two multiplexers coupled to the voltage divider, an operational amplifier coupled to each multiplexer, and a plurality of resistors coupled between the outputs of the two operational amplifiers. Reference voltages may be provided from output terminals coupled to the resistors.

Abstract: Technologies relating to RRAM-based crossbar array circuits and more specifically to reducing row switch resistance error of in crossbar array circuits are disclosed. An example apparatus includes: a first Op-amp including a first inverting Op-amp input, a first non-inverting Op-amp input, and a first Op-amp output; a row switch device including a row switch input and a row switch output; a crossbar array including a row wire, a column wire, and a cross-point device connected between the row wire and the column wire. The row switch input is connected to the first Op-amp output; the row switch output is connected to the first inverting Op-amp input; and the row switch output is connected to the row wire.

Abstract: A broadband amplifier assembly is provided that includes a fixed gain amplifier coupled to an adjustable attenuator which is further coupled to a power amplifier. The adjustable attenuator includes a plurality of attenuation cells directly coupled in series between the input and the output of the adjustable attenuator.

Abstract: Provided is a variable resistance circuit in which the resistance value of the variable resistance circuit can be accurately adjusted, by reducing the error in the change amount of the resistance value of the variable resistance circuit due to the on-resistances of switch circuits even if the switch circuits that each bypass a resistor included in a ladder resistor circuit are switched between an OFF state and an ON state. This variable resistance circuit includes: a ladder resistor circuit including a plurality of resistors; a first switch circuit connected in series to one end of one resistor of the plurality of resistors; and a second switch circuit connected in parallel to a series circuit of the one resistor and the first switch circuit. When one of the first and second switch circuits is turned on, the other of the first and second switch circuits is turned off.

Abstract: An electromagnetic coupler includes a first transmission line connecting an input port to an output port and a second transmission line adjacent the first transmission line and connecting a coupled port to an isolation port. The electromagnetic coupler provides a coupled signal at the coupled port, which is representative of an input signal at the input port. The amplitude of the coupled signal is related to the amplitude of the input signal by a coupling factor. A tuning element is electromagnetically coupled to at least one of the first and second transmission lines. An adjustable impedance is coupled between the tuning element and a reference node. Varying resistive impedance components causes an adjustment to the coupling factor and reactive impedance components provide frequency filtering effects.

Abstract: Methods and systems for calibrating a receiver utilizing a noise signal generated by a power amplifier associated with a transmitter are provided. A calibration method or mode includes generating a noise signal with a power amplifier associated with a transmitter of the transceiver; processing the noise signal with the receiver to generate a received signal; and calibrating the receiver based at least on the received signal.

Abstract: The present disclosure provides a simplified, multiple-gain, front-end circuit for analog-to-digital converter systems. In an example, a front-end circuit for an analog-to-digital converter (ADC) can include first and second input amplifiers configured to receive an input signal, and a gain selection circuit coupled to the first input amplifier and the second input amplifier; the gain selection circuit comprising a plurality resistor strings, each resistor string including a plurality of resistors coupled in series, and wherein each string includes a first end node coupled to an output of the first input amplifier and a second end node coupled to an output of the second input amplifier.

Abstract: Noise reduction methods and systems for reducing unwanted sounds in signals received from an arrangement of microphones are disclosed, the method including the steps of: sensing sound sources distributed around a specified target direction by way of an arrangement of microphones to produce left and right microphone output signals; determining the magnitude or power of the left and right microphone signals; attenuating the signals based on the difference of the magnitudes or powers or values derived from the magnitudes or powers of the left and right microphone signals.

Abstract: A signal processor for a hearing device with an implantable stimulator having two or more electrodes for emitting electric charge pulses to neural-fibers of an individual. The processor has a signal path comprising an input circuit adapted to receive an acoustic-signal from the surroundings and provide at least one corresponding input audio-signal; a filter bank adapted to provide at least one band-limited audio-signal in dependence on the at least one input audio-signal; and a noise filter adapted to attenuate undesired signal components in the at least one band-limited audio-signal and to provide at least one corresponding noise-filtered signal. The processor is characterized in that the portion of the signal path preceding the noise filter neither causes an effective level compression nor an effective level expansion of the at least one noise-filtered signal when the at least one noise-filtered signal is derived from an acoustic signal having a level within the comfortable acoustic range.

Abstract: Electromagnetic coupler systems including built-in frequency detection, and modules and devices including such. One example of an electromagnetic coupler system include an electromagnetic coupler having an input port, an output port, a coupled port, and an isolation port, the electromagnetic coupler including a main line extending between the input port and the output port, and a coupled line extending between the coupled port and the isolation port, the electromagnetic coupler being configured to produce a coupled signal at the coupled port responsive to receiving an input signal at the input port. An adjustable termination impedance is connected to the isolation port. A frequency detector is connected to the adjustable termination impedance and to the coupled port, and configured to detect a frequency of the coupled signal and provide an impedance control signal to tune the adjustable termination impedance based on the frequency of the coupled signal.

Abstract: A programmable gain amplifier may include: (a) a differential amplifier having first and second input terminals and first and second output terminals, the differential amplifier providing an output signal of the programmable gain amplifier across the first and second output terminals of the differential amplifier; (b) a first set of one or more resistors coupling the first output terminal of the differential amplifier to the first input terminal of the differential amplifier; (c) a second set of one or more resistors coupling the first input terminal of the differential amplifier to a first input terminal of the programmable gain amplifier; and (d) a first set of one or more switches each connected in parallel with one or more resistors in the first or second set of resistors. The first set of switches may include two or more individually programmable switches. Each of the switches may be implemented by an input-signal independent switch disclosed herein.

Abstract: An electromagnetic coupler includes a first transmission line connecting an input port to an output port. A second transmission line adjacent the first transmission line connects a coupled port and an isolation port. The electromagnetic coupler provides a coupled signal at the coupled port, which is representative of an input signal at the input port. The amplitude of the coupled signal is related to the amplitude of the input signal by a coupling factor. A tuning element is provided adjacent to the first or second transmission line and is coupled to an impedance. Varying impedance values cause an adjustment to the coupling factor and reactive impedance values provide frequency filtering effects.

Abstract: An attenuation circuit with stages having constant dB steps between stages is provided. The attenuation circuit can be configured as a ladder network using resistors having three different values. A first resistor can be connected between the last stage of the attenuation circuit and ground and have a first predetermined resistance. One or more second resistors can be connected in each stage and have a second predetermined resistance based on the first predetermined resistance and the dB step between stages. One or more third resistors can be connected in parallel to the first resistor for the remaining stages and have a third predetermined resistance based on the first predetermined resistance and the dB step between stages.

Abstract: A finger biometric sensing device may include drive circuitry for generating a drive signal and an array of finger biometric sensing pixel electrodes cooperating with the drive circuitry and generating a detected signal based upon placement of a finger adjacent the array. The detected signal may include a drive signal component and a sense signal component superimposed thereon. A gain stage may be coupled to the array and drive signal nulling circuitry may be coupled to the gain stage for reducing the drive signal component from the detected signal. The drive signal nulling circuitry may include a first digital-to-analog converter (DAC) generating an inverted scaled replica of the drive signal for the gain stage. Error compensation circuitry includes a memory storing error compensation data and a second DAC coupled in series with the first DAC compensating an error in the inverted scaled replica based upon the error compensation data.

Abstract: A printed circuit board antenna and a printed circuit board are disclosed. The printed circuit board antenna includes a feeding part having at least one first branch; a coupling interdigital part having at least one second branch, where a gap is formed between the first branch and the second branch; a grounding part, where a gap is formed between the grounding part and the feeding part, a gap is formed between the grounding part and the coupling interdigital part, an opening is provided on the grounding part, and a feeding point of the feeding part extends out from the opening. The embodiments of the present invention resolve a problem of relatively low efficiency when high-frequency bandwidth of an antenna is relatively wide, implementing that efficiency meets a product requirement in an entire range of bandwidth.

Abstract: An analog-to-digital converter arrangement may include an analog amplifier with variable gain; an analog-to-digital converter; a digital reconstruction element including elements to reduce an influence of transients during a change of the variable gain of the analog amplifier.

Abstract: An antenna structure includes a feed portion, a ground portion, a connecting portion, a first metallic sheet, a second metallic sheet, and a coupling portion. The connecting portion is electrically connected to the feed portion. The first metallic sheet is electrically connected to the ground portion. The second metallic sheet is spaced apart from the first metallic sheet and is electrically connected to the connecting portion. The coupling portion is coupled to the connecting portion and spaced apart from the first metallic sheet.

Abstract: Disclosed examples include programmable gain amplifier (PGA) circuits with an operation amplifier circuit having a first amplifier input and a second amplifier input including a plurality of second input nodes, a resistor array including a plurality of resistor sections connected in series with one another between the amplifier output and a reference voltage node, and a trim select circuit coupled between the second amplifier input and the resistor array circuit to deliver a feedback voltage signal to each individual one of the second input nodes from a given selected one of a plurality of the tap points of the resistor array circuit according to a trim code to provide analog gain trimming by interpolation.

Abstract: A wireless communication apparatus includes an amplifying unit that amplifies an input signal that includes signals with different frequencies of a first frequency and the second frequency; a measuring unit that measures a level of inter modulation distortion generated in a signal obtained by the input signal being amplified by the amplifying unit; a determining unit that determines whether the level of the inter modulation distortion measured by the measuring unit is equal to or greater than a regulation value that is previously stored; and a control unit that decreases, when a result of the determination obtained by the determining unit indicates that the level of the inter modulation distortion is equal to or greater than the regulation value, a level of a signal input to the amplifying unit.

Abstract: A current controlling device includes: a first resistive circuit arranged to selectively conduct a first current to a first output terminal from a first input terminal; and a second resistive circuit arranged to selectively conduct a second current to a second output terminal from the first input terminal; wherein when the first resistive circuit conducts the first current to the first output terminal and when the second resistive circuit does not conduct the second current to the second output terminal, the first input terminal has a first input impedance; when the first resistive circuit does not conduct the first current to the first output terminal and when the second resistive circuit conducts the second current to the second output terminal, the first input terminal has a second input impedance substantially equal to the first input impedance.

Abstract: It is possible to enable automatic on/off switching of a pad and to prevent frequent occurrence of on/off switching of a pad even when a user carries out fine manipulation. A level adjustment device includes a pad which attenuates a signal by a predetermined level, an amplifier which is provided at the back of the pad to adjust the level of the signal with a variable amplification rate or attenuation rate, and a level adjustment unit which, when the pad is off, uses only the amplifier and, when the pad is on, uses the amplifier and the pad to adjust the level of the acoustic signal. The setting of a level adjustment value by the level adjustment unit is received, when the level adjustment value reaches a predetermined switching point Tsw, the on/off of the pad is switched, and when an instruction is issued to start a performance mode, the value of the switching point Tsw is changed so as to be away from the level adjustment value at the point of time of the instruction.

Abstract: A system, method and apparatus tracks targets (e.g., tumors) during treatment (e.g., radiation therapy) using a radar motion sensor by generating a microwave signal, radiating the microwave signal to a subject, and receiving a modulated microwave signal from the subject. The modulated microwave signal is processed to provide a subject motion information using a sensor having an arctangent-demodulation microwave interferometry mode. A location of a target on or within the subject is determined based on the subject motion information and a three-dimensional model for the subject and the target. One or more control signals are generated based on the location of the target, and the treatment device is controlled using the one or more control signals to treat the target on or within the subject.

Abstract: A device includes a multi-mode low noise amplifier (LNA) having a first amplifier stage, and a second amplifier stage coupled to the first amplifier stage, the second amplifier stage having a plurality of amplification paths configured to amplify a plurality of carrier frequencies, the first amplifier stage configured to bypass the second amplifier stage when the first amplifier stage is configured to amplify a single carrier frequency.

Abstract: A variable gain amplifier circuit (200) comprising an amplifier element (202) having an input (208, 210) and an output (220, 222); a feedback loop (224, 226) having a feedback impedance (228, 230) connected between the input (208, 210) and output (232, 234) of the amplifier element (202); an input branch (212, 214) having an input resistance connected between an input of the variable gain amplifier circuit and the input (208, 210) of the amplifier element (202); and a plurality of switches for selecting a gain of the variable gain amplifier circuit (200); characterised in that the variable gain amplifier circuit (200) further comprises an intermediate element (204) having an input and an output, the input being connected to a node between one of the switches and the feedback impedance (228, 230), such that the output can provide a signal which can be used to attenuate a signal component in the output (220, 222) of the amplifier element (202) caused by a non-linearity in the plurality of switches.

Abstract: A high performance digitalized Programmable Gain Amplifier (PGA). In prior art circuit, a dual-ladder DAC is employed for gain control, the back gate leakage of NMOS resistors in the fine ladder conquers fine ladder nominal current and it produces non-monotonic gain scallop. Two new art design techniques: (1) adaptively control the fine ladder; and (2) use dummy PMOS brunch device leakage compensates for the NMOS resistor device leakage, are proposed so that the non-monotonic scallops are substantially eliminated and 13-bit resolution/accuracy PGA has been achieved.

Abstract: An amplification circuit, which may be in a receive path of a communication device, includes an amplifier including at least a first amplification device and a switchable attenuation circuit. The switchable attenuation circuit includes one or more switches and a plurality of attenuation devices and is operable to provide different levels of attenuation to an input signal prior to input to the amplifier depending on the status of the one or more switches. The attenuation devices may be capacitors, wherein the capacitors may be arranged to form a capacitive divider with a level of attenuation dependent on the status of the switches. The switchable attenuation circuit may be a switched capacitive attenuation ladder of n stages, n being any integer, each ladder stage including a capacitive divider. The amplification circuit may also include a switch, which when closed provides an unattenuated path for the input signal to the amplifier input.

Abstract: A variable gain amplifier circuit is provided. The circuit includes an operational amplifier for amplifying and outputting an input signal according to a cutoff frequency and a gain, a feedback resistor for changing a first resistance according to a first digital control code value which determines the cutoff frequency, and an input resistor for changing a second resistance according to a second digital control code value which is determined based on a difference of the first digital control code value and a gain code value. The gain is determined by a ratio of the first resistance and the second resistance and linearly changes on a decibel (dB) basis according to the first digital control code value, the cutoff frequency is inversely proportional to the first resistance and linearly changes on a log scale, and the variable gain can be easily set using the control code.

Abstract: A linear amplifier that comprises a signal input terminal that receives an input signal having a first common mode voltage, a voltage amplifier having a non-inverting input terminal that receives a second common mode voltage, a first and a second input resistance connected in series from the signal input terminal to the inverting input terminal of the voltage amplifier, a feedback resistance connected between the inverting input terminal and the output terminal of the voltage amplifier, and a constant current source. The constant current source supplies a constant current to a middle node between the first and the second input resistances. The constant current generates a voltage drop, which is equal to a difference between the first and the second common mode voltages, across the first input resistance. Accordingly, the common mode voltage of the output signal is directly determined by the second common mode voltage.

Abstract: A variable gain amplifier has an attenuator having an input and a series of tap points, and a series of low-inertia switches, each switch coupled to a corresponding one of the tap points to steer outputs from the attenuator to an output terminal. An amplifier has an input cell, a load coupled to an output of the input cell, a buffer having an input coupled to the load, a feedback network coupled between an output of the buffer and the input cell, and a variable filter cell coupled to the input cell.

Abstract: A direct current-to-direct current (‘DC/DC’) converter for delivering a load to an electrical component, the DC/DC converter including: a coupled inductor, wherein the coupled inductor receives a source input voltage level and a outputs an output voltage level; a transient winding; and a variable impedance switch coupled to the transient winding, the variable impedance switch configured to operate by adjusting a delivered resistance level in dependence upon a change in the load to be delivered to the electrical component by the DC/DC converter.

Abstract: An output buffer circuit capable of enhancing stability includes an operational amplifier, a capacitive load and an output control unit. The operational amplifier has a positive input terminal, a negative input terminal and an output terminal, and generates an output voltage to the output terminal according to an input voltage received by the positive input terminal. The output control unit is coupled between the output terminal of the operational amplifier and the capacitive load, and is utilized for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to form a signal output path and for adjusting impedance of the signal output path when the signal output path is formed. The output control unit comprises a plurality of output switches for individually turning on or off the electrical connection between the output terminal and the capacitive load of the operational amplifier.

Abstract: Exemplary embodiments are directed to a transmitter with a power amplifier and a switched output matching circuit implementing a plurality of output paths for a plurality of operating modes is described. The power amplifier receives an input RF signal and provides an amplified RF signal. An output matching network performs impedance transformation from low impedance at the power amplifier output to higher impedance at the matching network output. The plurality of output paths are coupled to the output matching network. Each output path provides a different target output impedance for the power amplifier and routes the amplified RF signal from the power amplifier to an antenna when that output path is selected. Each output path may include a matching network coupled in series with a switch. The matching network provides the target output impedance for the power amplifier when the output path is selected. The switch couples or decouples the output path to/from the power amplifier.

Abstract: A bidirectional matching network is disclosed. In an exemplary embodiment, an apparatus includes a first matching circuit connected in a first signal path between a node and a first amplifier, the first matching circuit configured to translate an off-state impedance of the first amplifier to a first translated off-state impedance. The apparatus also includes a second matching circuit connected in a second signal path between the node and a second amplifier. The second matching circuit configured to translate an off-state impedance of the second amplifier to a second translated off-state impedance. The second translated off-state impedance is configured to reduce power loss associated with a first signal flowing in the first signal path and the first translated off-state impedance is configured to reduce power loss associated with a second signal flowing in the second signal path.

Abstract: A circuit for amplifying the power of signal, the circuit comprising a power amplifier, a transformer and a load; wherein the transformer comprises a primary inductor and a secondary inductor, the first inductor being coupled to, and capable of being driven by, the power amplifier, and the secondary inductor coupled to, and capable of driving, the load; wherein a first one of the primary and secondary inductors is a variable inductor whose inductance is variable responsive to a control input in order to change the output power of the amplifier.

Abstract: The present disclosure provides a signal processing apparatus including: a short-circuiting controlling section configured to control whether or not the input side of a resistor connected between an input terminal and an output terminal and the output terminal are to be short-circuited in response to a signal level of a signal inputted from the input terminal; and a connection controlling section configured to control whether or not a resistor member is to be connected between the output terminal and a reference potential in response to the signal level of the signal, wherein at least one of the short-circuiting controlling section and the connection controlling section includes a plurality of switches disposed in parallel to each other for changing over a state thereof between open and closed states at signal levels different from each other.

Abstract: Embodiments of apparatuses, methods, and systems for a radio frequency amplification circuit providing for fast loadline modulation are generally described herein. Other embodiments may be described and claimed.

Abstract: Provided is an analog amplifier for amplifying an analog signal and an analog filter, and in particular, an apparatus and method for controlling gain and cutoff frequency of the variable gain amplifier and the variable cutoff frequency filter that is capable of changing the gain and cutoff frequency. The variable resister includes a plurality of resister segments in the variable resister and, when a plurality of resistance candidates for the variable resister are arranged in order of size, the resistance candidates form a geometric series.

Abstract: Techniques for optimizing a cascade gain device comprising at least two gain stages are disclosed. A first noise figure associated with the first gain stage is incrementally increased by a plurality of noise figure increments determined based, at least in part, on a minimum noise figure and a maximum noise figure associated with the first gain stage. At each of the plurality of noise figure increments, at least a gain value that corresponds to the noise figure increment is calculated. One of the plurality of noise figure increments and the corresponding gain value is selected as an optimum noise figure of the first gain stage and an optimum gain value of the first gain stage respectively. Parameters of an inter-stage matching network associated with the first gain stage are configured based on the optimum noise figure and the optimum gain of the first gain stage.

Abstract: An amplifier includes an amplifying element that amplifies an input signal; an output terminal that outputs the signal amplified by the amplifying element; a matching circuit disposed in series between the amplifying element and the output terminal, and performing impedance matching; an impedance converter disposed in series between the amplifying element and the matching circuit or between the matching circuit and the output terminal; and a first resonator and a second resonator connected at the ends of the impedance converter.

Abstract: A variable gain amplifier, to amplify an audio input signal to output an audio output signal at an adjustable gain, includes an operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal to output the audio output signal; an attenuation-rate adjustable feedback circuit to feed back the audio output signal from the output terminal of the operational amplifier to the inverting input terminal of the operational amplifier as a feedback signal, and attenuate the audio output signal and output the feedback signal to the inverting terminal; and an attenuation-rate adjustable attenuator to attenuate the audio input signal for output it as an attenuated signal to the non-inverting input terminal of the operational amplifier. Settings of the attenuation rates of the feedback circuit and the attenuator are combined and a resolution of level of the audio output signal is increased.

Abstract: A passive frequency divider in a CMOS process. More specifically, an electrical distributed parametric oscillator to realize a passive CMOS frequency divider with low phase noise. Instead of using active devices, which are the main sources of noise and power consumption, an oscillation at half of the input frequency is sustained by the parametric process based on nonlinear interaction with the input signal. For example, one embodiment is a 20 GHz frequency divider utilizing a CMOS varactor and made in a 0.13 ?m CMOS process. In this embodiment: (i) without any dc power consumption, 600 mV differential output amplitude can be achieved for an input amplitude of 600 mV; and (ii) the input frequency ranged from 18.5 GHz to 23.5 GHz with varactor tuning. In this embodiment, the output phase noise is almost 6 dB lower than that of the input signal for all offset frequencies up to 1 MHz. Also, a resonant parametric amplifier with a low noise figure (NF) by exploiting the noise squeezing effect.