Abstract: Disclosed herein are a passive equalizer and a high-speed digital signal transmission system, including first and second impedances connected in series to a first transfer line, third and fourth impedances connected in series to a second transfer line, a first inductor connected in parallel between the first impedance and the second impedance, a second inductor connected in parallel between the third impedance and the fourth impedance, and a resistor connected in series between the first inductor and the second inductor.
April 21, 2014
Date of Patent:
July 28, 2015
SAMSUNG ELECTRONICS CO., LTD.
Eak Hwan Song, Young Kun Kwon, Won Seob Kim, Hark Byeong Park, Hyun Sik Yun, Eun Seok Hong, Chul Soon Hwang
Abstract: A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.
Abstract: A coupling apparatus (1) having a mains connection (2) for connection to a low-voltage mains power supply system, and having an appliance connection (3) for connection of any appliance for transmitting and/or receiving an RF signal has a voltage converter (5) and a high-pass filter (6.1, 6.2). The voltage converter converts the mains voltage which is present at the mains connection to a very-low voltage, which is suitable for supplying the appliance connected to the appliance connection. Inductances (4.3 to 4.6) of suitable size are interposed in the appropriate connecting lines as low-pass filters for decoupling the RF signal path from the supply signal path, and for suppressing undesirable, radio-frequency signal components in the supply voltages. RF signals which are transmitted or are to be transmitted via the low-voltage mains power supply system are coupled from the mains connection via the high-pass filter to the appliance connection, and from the appliance connection to the mains connection.