With T, H, Or Pi Network In Coupling Circuit Patents (Class 330/176)
  • Patent number: 10003313
    Abstract: An amplification circuit has a field effect transistor, an input side matching circuit, an output side matching circuit, a capacitor, and a resistor. The input side matching circuit is connected between an input port and the source terminal of the field effect transistor and outputs an input signal that changes with a bias voltage as a center value. The output side matching circuit is connected between an output port and the drain terminal of the field effect transistor. The capacitor is connected between the gate terminal of the field effect transistor and a first reference voltage source. The resistor is connected between the gate terminal of the field effect transistor and the first reference voltage source.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: June 19, 2018
    Inventor: Masaru Sato
  • Patent number: 9828118
    Abstract: A pilot assistance device includes information sources for determining automatically, in real time, a current vertical load factor of the aircraft, a computation unit for computing automatically, in real time, a flight director value using the current vertical load factor and a target vertical load factor representing a vertical load factor desired for the aircraft in the parabolic flight, the flight director value being computed in such a way as to be equal to a reference value when the current vertical load factor becomes equal to the target vertical load factor, and a display unit for presenting automatically, in real time, on a load factor scale, displayed on a screen of the cockpit of the aircraft, an indicator representative of the flight director value, computed by the computation unit, and an indicator indicating the reference value.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: November 28, 2017
    Assignee: Airbus Operations SAS
    Inventor: St├ęphane Walter
  • Patent number: 9419563
    Abstract: A two-stage RF amplifier is provided. The first stage is a common-emitter transistor arrangement with a purely reactive degeneration impedance and an output impedance with a reactive component matched in frequency response to the degeneration impedance. The second stage is a buffer amplifier. The first amplifier can be designed for high gain which is flat over frequency by virtue of the reactive degeneration impedance. The first amplifier provides input matching, and the buffer provides output matching, with decoupling between the input and output.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: August 16, 2016
    Assignee: NXP B.V.
    Inventors: Gian Hoogzaad, Alexander Simin, Hasan Gui
  • Patent number: 4891536
    Abstract: An electronic switching arrangement is shown to consist of an effective balanced pi configuration using series and shunt FETs and transformer coupling so that the impedances seen by such FETs are optimized.
    Type: Grant
    Filed: December 27, 1988
    Date of Patent: January 2, 1990
    Assignee: Raytheon Company
    Inventor: Ernest I. Fox
  • Patent number: 4199730
    Abstract: 1.
    Type: Grant
    Filed: September 28, 1949
    Date of Patent: April 22, 1980
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Virgil R. Beck