Abstract: A dual-output and dual-mode supply modulator, a two-stage power amplifier using the same, and a supply modulation method therefor are provided. In order to improve the performance of a two-stage power amplifier used in a transmitter of a wireless communication system, the dual-output and dual-mode supply modulator according to the present invention may simultaneously supply an envelope tracking signal to a main amplification stage of the two-stage power amplifier and an average power tracking signal to an auxiliary amplification stage thereof. To this end, the dual-output and dual-mode supply modulator according to the present invention outputs two supply voltages and supports two operation modes.

Abstract: An envelope tracking power supply and transmitter control circuitry are disclosed. The transmitter control circuitry receives a first envelope power supply control signal and a second envelope power supply control signal. The envelope tracking power supply operates in one of a group of operating modes, which includes a first operating mode and a second operating mode. During both the first operating mode and the second operating mode, a first envelope power supply signal is provided to a driver stage based on the first envelope power supply control signal. During the first operating mode, a second envelope power supply signal is provided to a final stage based on the first envelope power supply control signal. However, during the second operating mode, the second envelope power supply signal is provided to the final stage based on the second envelope power supply control signal.

Abstract: A radio frequency (RF) power amplifier (PA) amplifying transistor of an RF PA stage and an RF PA temperature compensating bias transistor of the RF PA stage are disclosed. The RF PA amplifying transistor includes a first array of amplifying transistor elements and a second array of amplifying transistor elements. The RF PA temperature compensating bias transistor provides temperature compensation of bias of the RF PA amplifying transistor. Further, the RF PA temperature compensating bias transistor is located between the first array and the second array. As such, the RF PA temperature compensating bias transistor is thermally coupled to the first array and the second array. The RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using the RF PA amplifying transistor.

Abstract: An amplifier comprises a main amplification stage and an auxiliary amplification stage. An input of the main amplification stage and an input of the auxiliary amplification stage are coupled to a common node, and an output of the main amplification stage is coupled to an output node. During activation, before power is supplied to the main amplification stage, the output node is coupled to a reference voltage (VREF). A quiescent voltage is then established at the common node by coupling power to the auxiliary amplification stage. Only then is power coupled to the main amplification stage and the reference voltage (VREF) de-coupled from the output node.

Abstract: A power amplifier (10) comprises: an A/D converter (11) for converting, to a time discrete signal, an envelope signal included in a high-frequency modulated signal and including only an amplitude modulated component of the high-frequency modulated signal; a switching amplifier (12) for amplifying the output signal of the A/D converter (11); a low-pass filter (13) for removing high frequency noise from the output signal of the switching amplifier (12); a plurality of high-frequency power amplifiers (15-1 to 15-n) for receiving the output signal of the low-pass filter (13) as a power supply and for amplifying a carrier signal included in the high-frequency modulated signal; and a power controller (14) for adjusting the average power of the output signal of the power amplifier (10) by controlling the total gains of the plurality of high-frequency power amplifiers (15-1 to 15-n).

Abstract: An amplifier circuit (100) has an input stage (OP1) and an output stage (Q1, Q2) operating with different supply voltages and different quiescent voltages. The output stage has a feedback input connected to receive a feedback signal from the output of the output stage. A biasing circuit (602) applies a bias signal (Ioff) to said input stage at an operating level appropriate to establish a quiescent output voltage different from a ground reference level of the input stage.

Abstract: A power amplifier system includes a first power amplifier, a second harmonic generator, a phase shifter, and first and second adders. The first power amplifier amplifies a primary input signal. The second harmonic generator outputs a second harmonic by using a split part (signal) of the primary input signal as an input. The phase shifter adjusts a phase of the second harmonic. The first adder sums together a split signal of the primary input signal and an output of the phase shifter, thereby to produce an output. The second power amplifier uses the output of the first adder as an input. The second adder sums together an output of the first amplifier and an output of the second power amplifier, thereby to produce an output.

Abstract: An apparatus including cascaded amplification stages adapted to be biased by a common DC current to generate an amplified output signal from an input signal. A first amplification stage includes a routing network to substantially double an input voltage signal, and a first transconductance gain stage to generate a first current signal from the input voltage signal. A second amplification stage includes a resonator to convert the first current signal into a second voltage signal, and a second transconductance gain stage to generate a second current signal from the first current signal. A third amplification stage includes a current gain stage to generate a third current signal from the second current signal, and a load through which the third current signal flows to generate the output signal.

Abstract: The present invention provides a method and an apparatus for assessing a capability, for example, linearity of an amplifier, such as that of a power amplifier including a radio frequency amplifier. In one embodiment, the method comprises defining a first figure of merit for a power amplifier based on a loss of linearity relative to a predefined linearity requirement for the power amplifier and/or defining a second figure of merit based on the first figure of merit and dependent upon a minimum frequency within a predefined frequency band for the power amplifier, characterizing the linearity thereof. In this manner, using a test setup, for digital mobile communication networks deploying one or more higher order modulation schemes with complex wireless transmission that results in non-constant envelope signals, linearity of power amplifiers in transceivers, such as a mobile station or a base station, may be sufficiently described.

Abstract: An input stage receives a differential input signal at first and second input nodes and provides a differential output current at first and second output nodes. The differential output current includes a component taken from the input nodes through first and second impedances, and an additional component generated in response to a sample of the voltage of the differential input signal. A transconductance cell having cross-coupled inputs may generate the additional component of the output current.

Abstract: Sets of power amplifier branches (which comprise an RF/microwave amplifier stage) are power combined within each stage and each set of power amplifier branches are biased in different classes of operation by bias circuits possessing different impedance characteristics such that the fundamental frequency components present at the output are in-phase with one another and the IMD3 components are anti-phase over a broad range of power levels. The RF input signal is provided by the output of the previous stage of the RF/microwave amplifier. The output of each stage is formed by power combining sets of these power amplifier branches, each of which are separately biased, so the fundamental components are additive resulting in the maximum possible output power and the IM3 components cancel partially or completely.

Abstract: An inductor for a substrate of a circuit board includes a first electrical conductive layer and a second electrical conductive layer. The second electrical conductive layer is disposed over the first electrical conductive layer and is electrically connected to the first electrical conductive layer. The width or projecting area of the first electrical conductive layer is less than the width or projecting area of the second electrical conductive layer respectively.

Abstract: Briefly, in accordance with one embodiment of the invention, a calibration circuit may detect a difference between first and second outputs of a differential output programmable gain amplifier to determine a dc offset at the differential output. In the event an offset is detected, a differential gain of the programmable gain amplifier may be adjusted until the offset is adjusted, or eliminated, to an acceptable predetermined value.

Abstract: A method of controlling output power in a power amplifier having a driver stage and an output stage. The driver current is measured and the output stage biased in dependence upon the measured driver current.

Abstract: A system is provided for substantially reducing variation in AM to PM distortion of a power amplifier caused by variations in RF drive power and temperature. The system includes power control circuitry and power amplifier circuitry. The power amplifier circuitry includes an input amplifier stage and at least one additional amplifier stage coupled in series with the input amplifier stage. The power control circuitry provides a first supply voltage to the input amplifier stage based on a control signal such that the first supply voltage has a predetermined DC offset with respect to the control signal. The first supply voltage is provided such that the predetermined DC offset substantially reduces variations in the AM to PM distortion of the power amplifier due to variations in radio frequency (RF) drive power.

Abstract: A ferroelectric memory device includes a plurality of wordlines and a plurality of plate lines, the wordlines and the plate lines being alternately formed at regular intervals in one direction; a plurality of sub bitlines and a plurality of main bitlines, the sub bitlines and the main bitlines alternately formed at regular intervals to cross the wordlines and the plate lines; a plurality of sub cell arrays connected with the wordlines, the sub bitlines and the plate lines, having cells in directions defined by a plurality of rows and columns, the cells in the direction of the rows being arranged every two columns and the cells in the direction of the columns being arranged every two rows, respectively; and switching elements each operating between one of the sub bitlines and one of the main bitlines by an externally applied bitline switch signal of a constant pulse type to selectively connect the sub bitline with the main bitline.

Abstract: An amplifier circuit configuration includes a data line for transmitting a data signal. The data line is connected to a data signal input of an amplifier by way of a switching device. The amplifier includes a control circuit for controlling an input resistance of the amplifier with a terminal for a control signal. The terminal for the control signal of the control circuit is connected, parallel to the switching device, to the data line. As a consequence, a switching device, which is connected between the data line and the amplifier, has only little influence on the dynamic response when reading out a data signal.

Abstract: A method and a circuit for high-efficiency linear RF-power amplification over a wide range of amplitudes from zero to peak output includes a final RF-power amplifier operating at or near saturation, an RF driver amplifier, a high-level amplitude modulator for the final amplifier, preferably a high-level amplitude modulator for the driver amplifier, and a means for determining the supply-voltage input to the final amplifier and for controlling the amplitude of the drive. The means for determining the supply-voltage input and for controlling the amplitude acts so that the final amplifier drive varies from a minimum level to peak as the desired transmitter output varies from zero to peak. The transmitter is preferably of the envelope-elimination-and-restoration type or the envelope-tracking type.

Abstract: An RF power amplifier system is disclosed having a modulated voltage supply and fault monitoring thereof. The modulated DC voltage supply receives an input voltage as well as a modulating signal, such as an audio signal, to provide a modulated voltage which has been amplitude modulated in accordance with the amplitude variations of the modulating signal. Circuitry is provided for providing a variable reference signal which has a magnitude that varies with that of the modulating signal. A fault comparator compares the modulated signal with the variable reference signal and provides a fault signal dependent upon the comparison.

Abstract: A C-band transmit-receive module for an active aperture radar is provided employing gallium arsenide chips preferably manufactured by the Multifunction Self-Aligned Gate process and employing both open and closed loop error correction for both phase and amplitude to correct for errors due to temperature, power supply variations, operating bandwidth and phase states.In a second embodiment a power output amplifier is provided employing predriver, driver and power amplifier stages wherein the power amplifier or the power amplifier and the driver may be switched out of the circuit if not needed. The bias on the amplifier may also be lowered if not needed. This is done to increase efficiency and reduce temperature.In both embodiments class B amplifier are preferred.

Abstract: A signal is amplified with a plurality of amplifiers, each amplifier having a reference port, a reference node coupled to the reference port, and a signal port, and each amplifier being supplied by a power source with operating potential with respect to the reference node that is coupled to the reference port of that amplifier. The amplifiers are cascaded in a manner selected so that the output of a first amplifier (which receives the signal to be amplified at its input port) drives the reference node of a second amplifier, and the reference node of the first amplifier provides an input at the signal port of the second amplifier, whereby the first and second amplifiers are directly coupled together to amplify the applied signal.

Abstract: Disclosed is an amplifier wherein, in order to prevent the mixing of hum and other noise from the ground potential of the amplifier, the driving power supply circuit of the amplifier is separated from the ground potential into a floating state. In addition, the overall capacity of the power supply is reduced.

Abstract: An audio amplifier which processes mainly dynamic signals and which is provided with a plurality of amplifying systems each having a preamplifier and a main amplifier. A plurality of power sources are used to separately supply electric power to the respective amplifying systems, resulting in elimination of transient crosstalk.

Abstract: Integrated circuitry for selectively introducing capacitance and for controlling the transconductance transfer function of one or more amplifiers includes concatenated differential amplifiers with one or more pairs of switchable capacitive components differentially connected across outputs of the differential amplifiers to facilitate operation over a wide range of operating frequencies under control of external signals.