Artificial Line Patents (Class 330/57)
  • Patent number: 11108362
    Abstract: A Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and first and second peaking amplifier dies. The RF signal splitter divides an input RF signal into first, second, and third input RF signals, and conveys the input RF signals to splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier dies each include one or more additional power transistors configured to amplify, along first and second peaking signal paths, the second and third input RF signals to produce amplified second and third RF signals. The dies are coupled to the substrate so that the RF signal paths through the carrier and one or more of the peaking amplifier dies extend in substantially different (e.g., orthogonal) directions.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: August 31, 2021
    Assignee: NXP USA, Inc.
    Inventors: Elie A. Maalouf, Margaret A. Szymanowski
  • Patent number: 10734481
    Abstract: Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICs, improvement in refresh time for DRAMs, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFETs, and a host of other applications.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: August 4, 2020
    Assignee: Greenthread, LLC
    Inventor: G. R. Mohan Rao
  • Patent number: 10382004
    Abstract: A matching network circuit and an associated apparatus are provided. The matching network circuit includes a matching unit coupled between a common path port and a first path port of the matching network circuit, and an impedance unit coupled between the common path port and a second path port of the matching network circuit. The common path port is utilized for connecting the matching network circuit to a common path, the first path port is utilized for connecting the matching network circuit to a first device on a first path, and the second path port is utilized for connecting the matching network circuit to a second device on a second path. The matching unit is arranged for performing impedance matching between the common path port and the first path port, and the impedance unit is arranged for performing impedance matching between the common path port and the second path port.
    Type: Grant
    Filed: July 3, 2016
    Date of Patent: August 13, 2019
    Assignee: MEDIATEK INC.
    Inventor: Chien-Cheng Lin
  • Patent number: 9647070
    Abstract: Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICS, improvement in refresh time for DRAM's, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFET's, and a host of other applications.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: May 9, 2017
    Assignee: GREENTHREAD, LLC
    Inventor: G. R. Mohan Rao
  • Publication number: 20120105147
    Abstract: The present disclosure relates to transmission circuitry of a wireless communication device. The transmission circuitry includes power amplifier circuitry, an output matching network, and impedance control circuitry. The power amplifier circuitry amplifies a radio frequency (RF) input signal to provide an amplified RF output signal, which is passed through the output matching network and transmitted via one or more antennas. As the center frequency of the RF input signal and conditions of operating parameters change, the impedance control circuitry adjusts the values of one or more variable impedance elements of the output matching network in a desired fashion. The values of the variable impedance elements are adjusted such that the output matching network concurrently and dynamically presents the desired load impedances at the center frequency and at one or more harmonics of the RF input signal to achieve a given performance specification.
    Type: Application
    Filed: November 1, 2010
    Publication date: May 3, 2012
    Applicant: CREE, INC.
    Inventors: Christopher Harris, Raymond Sydney Pengelly
  • Patent number: 6556075
    Abstract: Amplifier systems and methods are provided which closely approximate a constant output impedance and a constant quiescent output signal during forward and reverse modes of operation. The systems can be realized with small, inexpensive components that are compatible with integrated-circuit fabrication processes. A system embodiment includes a signal amplifier, a feedback path that is coupled across at least part of the signal amplifier to reduce its impedance, a reverse amplifier which is coupled to drive at least a feedback portion of the feedback path and a signal generator which controls operational timing of the signal amplifier and reverse amplifier. Another system embodiment includes an error-current canceler that cancels error currents of the signal amplifier with substantially equal and opposite correction currents.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: April 29, 2003
    Assignee: Analog Devices, Inc.
    Inventor: Edward Perry Jordan
  • Publication number: 20030030488
    Abstract: The invention relates to a trench bipolar transistor structure, having a base 7, emitter 9 and collector 4, the latter being divided into a higher doped region 3 and a lower doped drift region 5. An insulated gate 11 is provided to deplete the drift region 5 when the transistor is switched off. The gate 11 and/or doping levels in the drift region 5 are arranged to provide a substantially uniform electric field in the drift region in this state, to minimise breakdown. In particular, the gate 11 may be seminsulating and a voltage applied along the gate between connections 21,23.
    Type: Application
    Filed: July 25, 2002
    Publication date: February 13, 2003
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Raymond J.E. Hueting, Jan W. Slotboom, Petrus H.C. Magnee
  • Publication number: 20020140504
    Abstract: A voltage controlled oscillator includes N (N is an integer equal to or more than 2) inversion-type differential amplifiers and a level converter. The N (N is an integer equal to or more than 2) inversion-type differential amplifiers are connected in a loop such that each of output signals outputted from one of the N inversion-type differential amplifiers has an opposite polarity to a corresponding one of output signals outputted from the next one of the N inversion-type differential amplifiers. The level converter is connected to one of the N inversion-type differential amplifiers as a last inversion-type differential amplifier to generate an oscillation signal from the output signals outputted from the last inversion-type differential amplifier. Each of the N inversion-type differential amplifiers operates in response to a predetermined voltage and a control voltage.
    Type: Application
    Filed: March 22, 2002
    Publication date: October 3, 2002
    Applicant: NEC CORPORATION
    Inventor: Masaru Hasegawa
  • Patent number: 4157510
    Abstract: The amplifier is intended for use in situations where a considerable distance separates the instrument (for example a piezo-electric transducer) to be monitored and the control room. The amplifier comprises a charge/current converter for converting the charge output of the instrument into a current signal, the charge/current converter being connected to operate as a high impedance current source, a current/voltage converter and a connecting cable connecting the current output of the charge current converter to the input of the current/voltage converter.
    Type: Grant
    Filed: November 18, 1977
    Date of Patent: June 5, 1979
    Inventor: Donald J. Birchall
  • Patent number: 3952262
    Abstract: The invention utilizes a four-port hybrid junction in which a signal to be amplified or a low level stable reference signal is coupled to a first port in which a pair of similar or matched amplifiers or oscillators are coupled to the respective second and third ports of the hybrid, and in which the resulting amplified or coherent stabilized power of the two amplifiers or oscillators is provided at the fourth port of the hybrid junction.
    Type: Grant
    Filed: April 1, 1974
    Date of Patent: April 20, 1976
    Assignee: Hughes Aircraft Company
    Inventor: Richard S. Jamison