Amplifier In Signal Feedback Path Patents (Class 330/85)
  • Patent number: 10038468
    Abstract: Embodiments relate to peaking inductor array for a peaking control unit of a transceiver. An aspect includes the peaking inductor array comprising a plurality of cells connected in parallel, each cell comprising a respective active inductor. Another aspect includes each of the plurality of cells further comprising a decoupling capacitor.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: July 31, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pier A. Francese, Mangal Prasad, Hung H. Tran, Xiaobin Yuan
  • Patent number: 9893689
    Abstract: According to an embodiment, an operational amplifier includes a first amplifier stage coupled between an input node and an intermediate node, a second amplifier stage coupled between the intermediate node and an output node, a compensation capacitor having a first terminal coupled to the intermediate node and a second terminal, and a compensation amplifier coupled between the output node and the second terminal. The compensation amplifier has a positive gain greater than one.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: February 13, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Pasotti, Riccardo Zurla, Alessandro Cabrini, Guido Torelli
  • Patent number: 9748927
    Abstract: Embodiments relate to peaking inductor array for a peaking control unit of a transceiver. An aspect includes the peaking inductor array comprising a plurality of cells connected in parallel, each cell comprising a respective active inductor. Another aspect includes each of the plurality of cells further comprising a decoupling capacitor.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: August 29, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pier A. Francese, Mangal Prasad, Hung H. Tran, Xiaobin Yuan
  • Patent number: 9577607
    Abstract: Embodiments relate to peaking inductor array for a peaking control unit of a transceiver. An aspect includes the peaking inductor array comprising a plurality of cells connected in parallel, each cell comprising a respective active inductor. Another aspect includes each of the plurality of cells further comprising a decoupling capacitor.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: February 21, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pier Andrea Francese, Mangal Prasad, Hung H. Tran, Xiaobin Yuan
  • Patent number: 9509281
    Abstract: Embodiments relate to peaking inductor array for a peaking control unit of a transceiver. An aspect includes the peaking inductor array comprising a plurality of cells connected in parallel, each cell comprising a respective active inductor. Another aspect includes each of the plurality of cells further comprising a decoupling capacitor.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: November 29, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pier A. Francese, Mangal Prasad, Hung H. Tran, Xiaobin Yuan
  • Patent number: 9407227
    Abstract: An amplifier module comprises an amplifier having an output, a coupler coupled to the output to receive a first signal provided at the output and a power detector to provide a power signal from the first signal. It further comprises an input to receive a second signal. A switch is provided that is disposed to provide the power signal or the second signal to a signal output in dependence of a control signal.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: August 2, 2016
    Assignee: Intel Deutschland GmbH
    Inventors: Andrea Camuffo, Andreas Langer
  • Patent number: 9337792
    Abstract: A multistage amplifier may include a multistage amplifier circuit and a resistive voltage divider network. The multistage amplifier circuit may have multiple transconductance input stages, each of which may have differential inputs and an adjustable tail current input that controls the amount of the transconductance of the input stage. The resistive voltage divider network may control the closed loop gain of the multistage amplifier circuit and include multiple resistors that provide different voltage divider ratios at different points. Each point may be connected to one of the transconductance input stages. Adjustment of tail currents at the tail current inputs may control the degree to which each point affects the closed loop gain of the multistage amplifier.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: May 10, 2016
    Assignee: LINEAR TECHNOLOGY CORPORATION
    Inventor: Xiaoqiang Shou
  • Patent number: 9306525
    Abstract: Apparatuses, methods, computer readable mediums, and systems are described for combined dynamic processing and speaker protection for minimizing distortion in audio playback. In some embodiments, at least one compressed audio signal is received, at least one threshold for a speaker is retrieved, modifications to audio signal compression are determined based on the at least one compressed audio signal and the at least one threshold, information embodying the modifications is transmitted to a dynamic processor, and using the dynamic processor, at least one modified compressed audio signal is produced for the speaker based on the information.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: April 5, 2016
    Assignee: Apple Inc.
    Inventors: Arvindh Krishnaswamy, Andrew P. Bright, Joseph M. Williams
  • Patent number: 9252720
    Abstract: An amplifier circuit whose frequency response has almost no soft knee characteristic or no peak when inverting input capacitance Csin varies and when feedback capacitance Cf is a fixed value of small capacitance, and a feedback circuit is provided. The amplifier circuit includes a plurality of amplifiers each of which negative feedback is provided to and which are connected in series, and a feedback means (feedback circuit) which is connected to an output side of an amplifier near output of the amplifier circuit and an input side of an amplifier near input of the amplifier circuit. These amplifiers are ones in the plurality of amplifiers. One or odd numbers of amplifiers in the plurality of amplifiers are inverting amplifiers.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: February 2, 2016
    Assignee: NF CORPORATION
    Inventor: Shingo Sobukawa
  • Patent number: 9231532
    Abstract: An amplifier circuit includes an amplifier circuit that emitter-grounds a first transistor that amplifies an input signal; and an emitter-grounded feedback circuit in which a collector of the first transistor is connected to an output line of the amplifier circuit and a base is wiring-connected only to the output line by using a resistor.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: January 5, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Yukito Tsunoda
  • Patent number: 9218318
    Abstract: Some general aspects of the invention relate to a circuit and to a method for analog computation, for example, using switched capacitor integrated circuits. In some examples, a circuit includes a first group of capacitors and a second group of capacitors that may store charges during circuit operation. The first and/or the second group of capacitors may include multiple disjoint subsets of capacitors. An input circuit is provided for receiving a set of input signals and for inducing a charge on each of some or all capacitors in the first group of capacitors according to a corresponding input signal. Switches, for example, transistors controlled by a sequence of clock signals, are used to couple different sets of capacitors. Different configurations of the switches are used to form different sets of the capacitors among which charge can redistribute.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: December 22, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Eric Nestler, Vladimir Zlatkovic
  • Patent number: 9154896
    Abstract: Methods and apparatus are disclosed for processing an audio sound source to create four-dimensional spatialized sound. A virtual sound source may be moved along a path in three-dimensional space over a specified time period to achieve four-dimensional sound localization. The various embodiments described herein provide methods and systems for converting existing mono, 2-channel and/or multi-channel audio signals into spatialized audio signals have two or more audio channels. The incoming audio signals may be down-mixed, up-mixed or otherwise translated into fewer, greater or the same number of audio channels. The various embodiments also describe methods, systems and apparatus for generating low frequency effect and center channel signals from incoming audio signals having one or more channels.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: October 6, 2015
    Assignee: GenAudio, Inc.
    Inventors: Jerry Mahabub, Stephan A. Bernsee, Gary Smith
  • Patent number: 9054583
    Abstract: A power-supply apparatus according to an aspect includes an inductor, a transistor that supplies, in an on-state, a current to the input side of the inductor, a second transistor that becomes, when the first transistor is in an off-state, an on-state and thereby brings the input side of the inductor to a predetermined potential, a signal generation unit that generates voltage signals corresponding to a current flowing to the inductor, an amplifier that outputs a current according to the voltage signals, a converter that converts the current output from the amplifier into a voltage signal, and a control unit that controls the transistors based on a first feedback signal corresponding to the voltage on the output side of the inductor and the voltage signal, which is used as a second feedback signal.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: June 9, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Toshio Nagasawa, Yoshitaka Onaya, Koji Saikusa, Shin Chiba
  • Patent number: 9007128
    Abstract: In an embodiment, a circuit includes a variable group delay configured to delay a wideband input signal to obtain a delayed input signal; a wideband operational amplifier configured to determine an error signal based on a difference between the delayed input signal and a linearized power amplifier output; a feedback amplifier configured to amplify the error signal to obtain an amplified error signal; and a directional combiner configured to combine the amplified error signal with the power amplifier output to obtain the linearized power amplifier output.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: April 14, 2015
    Assignee: Newlans, Inc.
    Inventor: Dev V. Gupta
  • Patent number: 8970307
    Abstract: Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: March 3, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Thomas Domenick Marra, Aristotele Hadjichristos, Nathan M Pletcher
  • Patent number: 8970300
    Abstract: Improved preamplifier circuits for converting single-ended input current signals to differential output voltage signals, including first and second transimpedance amplifiers with input transistors operating according to bias currents from a biasing circuit, output transistors and adjustable feedback impedances modified using an automatic gain control circuit, as well as a reference circuit controlling the bias currents according to an on-board reference current and the single-ended input or the differential output voltage signals from the transimpedance amplifiers.
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: March 3, 2015
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Oliver Piepenstock, Gerd Schuppener, Frank Gelhausen, Ulrich Schacht
  • Patent number: 8965454
    Abstract: In one embodiment, an amplifier system has a tap, a delay filter, a linearized amplifier, and a hybrid combiner. The tapped portion of an input signal is amplified by the amplifier, the untapped portion of the input signal is delayed by the delay filter, and the combiner combines the resulting amplified, tapped portion and the delayed, untapped portion to generate an amplified output signal. By re-combining the delayed, untapped portion of the input signal with the amplified, tapped portion, the power of the untapped portion is not lost, and the amplifier does not have to compensate for all of the distortion that would otherwise be associated with the total output power level. Such an amplifier system is applicable, for example, in upgrading an existing GSM cell site to support both GSM communications as well as UMTS communications without degrading GSM operations.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: February 24, 2015
    Assignee: Andrew LLC
    Inventors: George P. Vella-Coleiro, Josef Ocenasek, Jeffrey G. Strahler, Christopher F. Zappala
  • Patent number: 8928409
    Abstract: According to some embodiments, a trans-capacitance amplifier is exhibiting an input current of the biasing in the range of picoAmperes while allowing large output swings. The trans-capacitance amplifier comprises an operational amplifier, a feedback capacitor, circuitry to DC bias and to AC ground the non-inverting input of the operational amplifier, and circuitry to DC bias the inverting input of the operational amplifier. According to some embodiments, the circuitry to bias the inverting input comprises a cascade of degenerated differential pairs. The first transistor of the first pair and the second transistor of the last pair have an active load. The cascade of differential pairs and the active load create a trans-conductance amplifier with a very low equivalent trans-conductance. According to some embodiments, the same invention applies to a differential trans-capacitance amplifier.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: January 6, 2015
    Inventor: Ion E. Opris
  • Publication number: 20140217285
    Abstract: In a preamplifier (amplifier) for detecting radiation, an output of the preamplifier is set as an output of the first amplifying circuit, a capacitor is connected in parallel to the first amplifying circuit, and the second amplifying circuit with a positive gain of less than onefold is connected between the output terminal and the input terminal of the first amplifying circuit through a switch. When the switch is closed, the capacitor is discharged and reset. As the gain of the second amplifying circuit is less than onefold, the gain of the preamplifier is less than the loop gain of the first amplifying circuit alone during the reset operation, making it harder for oscillation to occur. Accordingly, the preamplifier can reduce the compensation capacitance compared to a conventional case and can shorten the reset time, while preventing oscillation.
    Type: Application
    Filed: August 1, 2013
    Publication date: August 7, 2014
    Applicants: POLITECNICO DI MILANO, HORIBA, LTD.
    Inventors: Carlo FIORINI, Luca BOMBELLI
  • Patent number: 8779858
    Abstract: An amplifier circuit comprises a measurement path with an amplifier (1) for providing an output voltage (Vout) depending on a measuring current (Ipd) with a first and a second amplifier input (11, 12), and an amplifier output (13). A return path of the amplifier circuit comprises a first filter (2), an auxiliary amplifier (3) and a second filter (4). In this case, the first filter (2) is designed to filter a DC voltage from the output voltage (Vout) and is connected to the amplifier output (13). The auxiliary amplifier (3) serves to convert an input voltage (Vfil) into an output current (Ifil) and has a first and a second auxiliary amplifier input (31, 32) and an auxiliary amplifier output (33). In this case, the first auxiliary amplifier input (31) is connected to the first filter (2). The second filter (4) is designed to filter noise from the output current (Ifil) and couples the auxiliary amplifier output (33) to the first amplifier input (11).
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: July 15, 2014
    Assignee: ams AG
    Inventors: Mark Niederberger, Vincenzo Leonardo
  • Patent number: 8766728
    Abstract: A trans-impedance amplifier (TIA) for an optical receiver is disclosed, in which the TIA enhances the dynamic range thereof but suppresses the variation of the input impedance thereof. The TIA enhances the dynamic range by subtracting from the photocurrent input therein, which varies the input impedance. The TIA also provides the variable gain amplifier with a feedback resistor. The variable gain of the amplifier compensates the variation of the input impedance due to the current subtraction.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: July 1, 2014
    Assignee: Sumitomo Electric Industries, Ltd
    Inventors: Makoto Ito, Yoshiyuki Sugimoto, Keiji Tanaka
  • Patent number: 8717083
    Abstract: A method including receiving an input signal; amplifying the input signal to generate an output signal using a cascade of a plurality of amplifier stages including a first amplifier stage and a last amplifier stage; generating a voltage signal by sensing the output signal in a noninvasive manner so that the sensing results in substantially no change to the output signal; generating a current signal from the voltage signal using a transconductance amplifier; and injecting the current signal into an output node of the first amplifier stage in a noninvasive manner so that the injecting results in substantially no change to an amplification function of the first amplifier stage.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 6, 2014
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Liang Lin
  • Patent number: 8680919
    Abstract: A circuit that includes an amplifier circuit with an input impedance due to an input resistance and an input capacitance of the amplifier circuit. The input impedance of the amplifier circuit may vary with frequency. The amplifier circuit may include an amplifier and a feedback circuit configured to provide feedback to the amplifier and to maintain the input impedance at a specified value at a selected frequency by increasing the input resistance of the amplifier circuit at the selected frequency.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: March 25, 2014
    Assignee: Fujitsu Limited
    Inventors: Scott McLeod, Nikola Nedovic
  • Patent number: 8653888
    Abstract: A high-frequency signal amplifier includes an amplifier having an input terminal and an output terminal, and amplifying a high-frequency signal; a signal line connected between the output terminal of the amplifier and an antenna; coupled lines arranged in parallel and coupled to the signal line and having different line lengths or differently terminated ends; and phase shifters shifting phase of high-frequency signals applied via the signal line and the coupled lines, supplying the high-frequency signals to the input terminal of the amplifier, and having different amounts of phase change.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: February 18, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shinsuke Watanabe
  • Patent number: 8626098
    Abstract: A transconductance comparator includes a comparator having an output of a detector configured to sense an amplitude of an output of a Variable Gain Amplifier (VGA) of a receiver as a first input and a reference amplitude level as a second input. The comparator generates an error signal based on the first input and the second input. The transconductance comparator also includes a transconductance amplifier having a differential voltage input based on the error signal generated through the comparator and generating an output current. The transconductance amplifier includes current sources associated with programmable current limits thereof and differential pairs associated with the current sources, one or more of which is implemented with a size mismatch between transistors thereof to eliminate an offset error due to a mismatch between the current limits, thereby enabling programmability of an attack time and a decay time during automatic gain control of the VGA.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: January 7, 2014
    Assignee: Tahoe RF Semiconductor, Inc.
    Inventor: Darrell Lee Livezey
  • Patent number: 8604872
    Abstract: Systems and methods which implement a transconductor replica feedback (TRF) block in a transconductor circuit are shown. In accordance with embodiments, the TRF block comprises a feedback transistor disposed as a replica of a corresponding transconductance transistor of the transconductor circuit. The TRF block provides enhanced looking-in degeneration impedance for the transconductor circuit, thereby allowing for higher linearity and lower power at the same time. TRF transconductors of embodiments can be implemented in, or otherwise applied to, various different circuits such as LNAs, filters, etc.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: December 10, 2013
    Assignee: CSR Technology Inc.
    Inventor: Ayaskant Shrivastava
  • Patent number: 8558612
    Abstract: An electronic device comprising an amplifier having at least a first input transistor of a first doping type. A first transistor is coupled with a channel as a feedback path between an output of the amplifier and a control gate of the first input transistor forming an input of the amplifier. A diode-coupled second transistor is coupled with a channel between a first current source and the output of the amplifier wherein a control gate of the first transistor is coupled between the first current source and the diode-coupled second transistor and the first transistor is of a second doping type which is opposite to the first doping type of the first input transistor of the amplifier.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: October 15, 2013
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Carlo Peschke, Ernst Muellner
  • Patent number: 8558611
    Abstract: Analog peaking amplifiers with enhanced peaking capability are provided. For example, a peaking amplifier circuit includes an input node, output node, a feedback node, a first input amplifier having an input connected to the input node and an output connected to the feedback node, a second input amplifier having an input connected to the input node, a coupling capacitor connected between an output of the second input amplifier and the feedback node, a forward-path gain amplifier having an input connected to the feedback node and an output connected to the output node, and a feedback circuit having an input coupled to the output node and an output connected to the feedback node. A peaking response of the peaking amplifier circuit is realized by capacitively coupling the output of the second input amplifier to the feedback node to suppress negative feedback and increase the peaking gain at higher frequencies.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Ping-Hsuan Hsieh
  • Publication number: 20130266156
    Abstract: A sensor amplifier arrangement includes an amplifier having a signal input to receive a sensor signal and a signal output to provide an amplified sensor signal, and a feedback path that couples the signal output to the signal input and provides a feedback current that is an attenuated signal of the amplified sensor signal and is inverted with respect to the sensor signal.
    Type: Application
    Filed: April 4, 2012
    Publication date: October 10, 2013
    Applicant: austriamicrosystems AG
    Inventors: Thomas Fröhlich, Matthias Steiner
  • Patent number: 8538354
    Abstract: In accordance with the present disclosure, disadvantages and problems associated with controlling signal transmission of a wireless communication device may be reduced. In accordance with an example embodiment of the present disclosure a method for controlling transmission of a wireless communication signal comprises sensing one or more signals indicative of a power level of a wireless communication signal. The power level of the wireless communication signal is amplified by a power amplifier according to an amplifier control signal. The method further comprises determining a change in the power level based on the one or more signals indicative of the power level. The change is associated with one or more perturbations of the amplifier control signal. The method also comprises adjusting transmission of the wireless communication signal according to the change in the power level.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: September 17, 2013
    Assignee: Intel IP Corporation
    Inventors: Bing Xu, Pravin Premakanthan
  • Patent number: 8509290
    Abstract: A closed loop power output calibration system for variable power output wireless devices. The wireless device includes a wireless transceiver having a transmit core coupled to a discrete power amplifier. Power detection circuitry formed in the wireless transceiver provides a detected power level of the power amplifier, and a reference power level, both of which are converted to digital signals using existing I and Q signal analog to digital converters in the receiver core. The digital signals are processed to cancel power distortion and temperature effects to provide a resulting power feedback signal. Corrective control signals are generated in response to the power feedback signal relative to a desired power output level. The gain in the transmit core is then adjusted in response to the corrective control signals such that the power amplifier outputs the target output power level.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: August 13, 2013
    Assignee: Icera Canada ULC
    Inventors: Abdellatif Bellaouar, Tajinder Manku
  • Patent number: 8508217
    Abstract: An output circuit of a charge mode sensor includes a second resistor and an operational amplifier. The second resistor connects an output portion of the charge mode sensor and a ground. The operational amplifier is configured to output a detection signal that varies in accordance with an amount of charge kept in the charge mode sensor. The operational amplifier includes an inverting input portion, a non-inverting input portion, and an output portion. The inverting input portion is connected to the output portion of the charge mode sensor via a sensor cable. The non-inverting input portion is connected to a reference voltage. The output portion is connected to the inverting input portion via a first resistor.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: August 13, 2013
    Assignee: Honda Motor Co., Ltd.
    Inventor: Yoshimasa Eguchi
  • Publication number: 20130187710
    Abstract: According to one embodiment, an amplification circuit can be switched between amplifying and calibration modes. During calibration, a preamplifier amplifies a differential input signal and generates a differential output signal. The amplifier circuit includes an input switch unit which sets a differential input signal as the reference voltage signal of the same voltage level at the time of calibration, a PWM conversion unit which carries out Pulse-Width-Modulation of the differential output signal, and generates a differential PWM signal based on the result of comparing the differential output signal with the reference signal, a calibration unit which generates an offset adjustment signal according to the phase difference of differential PWM signals, and an electric amplifier which carries out electric power amplification of the differential PWM signal and generates the differential final output signal.
    Type: Application
    Filed: September 7, 2012
    Publication date: July 25, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yoshikazu NAGASHIMA
  • Patent number: 8482265
    Abstract: A current balance circuit includes a first branch and a second branch in parallel between a power supply unit and at least one load, which respectively include a switch. The current balance circuit detects and compares currents flowing through the first branch and the second branch. The current balance circuit also generates triangle waves and reversed triangle waves, compares voltage of a control pole of a first switch with the triangle waves, and compares voltage of the control pole of a second switch with the reversed triangle waves. Then the current balance circuit controls if the triangle waves and the reversed triangle waves are input to the first switch and the second switch according to the currents flowing through the first branch and the second branch to adjust impedance of the first switch and the second switch to balance the currents flowing through the first branch and the second branch.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: July 9, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Yi-Guo Chiu
  • Patent number: 8471631
    Abstract: There is provided a bias circuit that can operate even at low voltage and control a current reflecting a change in drain voltage. A first current mirror circuit for feeding back a drain terminal current of an FET which receives an output of an operational amplifier at a gate terminal to an input terminal of the operational amplifier and a second current mirror circuit are coupled in parallel. A variable voltage is coupled to the first current mirror circuit, and a fixed voltage is coupled to the second current mirror circuit. Even if the variable voltage becomes lower than the threshold voltage of FETs configuring the first current mirror circuit, the second current mirror circuit feeds back the current to the input terminal of the operational amplifier with reliability.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: June 25, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Tanaka, Fuminori Morisawa, Makoto Tabei
  • Patent number: 8456215
    Abstract: A limiting amplifier and method are provided. In one implementation an apparatus includes a plurality of amplifier stages including a first amplifier stage and a last amplifier stage configured in a cascade arrangement, and a transconductance amplifier, wherein the first amplifier stage is configured to receive an input signal; the last amplifier stage outputs an output signal; the transconductance amplifier is configured receive a voltage signal from the last amplifier stage via a first resistor; and the transconductance amplifier is configured to output a current signal to an output node of the first amplifier stage via a second resistor in a negative feedback manner.
    Type: Grant
    Filed: September 25, 2011
    Date of Patent: June 4, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Liang Lin
  • Patent number: 8436684
    Abstract: Embodiments provide an amplifier and a method for using and manufacturing said amplifier that incorporate an impedance matching stage, a feedback circuit, and a gain stage. The impedance matching stage is coupled to the feedback circuit wherein the feedback circuit provides a compensated second bias voltage for the impedance matching stage. The output of the impedance matching stage is used to set an input bias voltage for both the impedance matching stage and the gain stage. The output of the impedance matching stage is also used, together with the output of the gain stage, to produce an output of the amplifier. A signal reuse stage may be provided between the output of the impedance matching stage and the output of the amplifier.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: May 7, 2013
    Assignee: Renesas Mobile Corporation
    Inventors: Jonne Juhani Riekki, Jari Johannes Heikkinen, Jouni Kristian Kaukovuori
  • Patent number: 8427239
    Abstract: Embodiments provide an amplifier and a method for using and manufacturing said amplifier that incorporate an impedance matching stage, a feedback circuit, and a gain stage. The impedance matching stage is coupled to the feedback circuit wherein the feedback circuit provides a compensated operating voltage for the impedance matching stage. The output of the impedance matching stage is used to set an input bias voltage for both the impedance matching stage and the gain stage. The output of the impedance matching stage is also used, together with the output of the gain stage, to produce an output of the amplifier.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: April 23, 2013
    Assignee: Renesas Mobile Corporation
    Inventors: Jonne Juhani Riekki, Jari Johannes Heikkinen, Jouni Kristian Kaukovuori
  • Patent number: 8427233
    Abstract: A transconductor for providing an output current that is linear in the input voltage (Vin) comprises a main output transconductor (Ms, Mc) and a model transconductor (Msr1, Msr2, Mcr1, Mcr2) is comprised in a predistortion circuit (A), which measures the output of the model transconductor and the overall voltage input (Vin) to provide a control signal (Vc, Vc?) for the transconductors that compensates for their non-linearity.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: April 23, 2013
    Assignee: ACP Advanced Circuit Pursuit AG
    Inventors: Qiuting Huang, Dimitrios Filippos Papadopoulos, Jurgen Rogin
  • Patent number: 8390374
    Abstract: Apparatus and methods reduce the likelihood of amplifier saturation due to propagated DC offsets, and reduce the recover from saturated stated when such saturation occurs. Advantageously, these attributes are beneficial for monitoring of bioelectric signals. A circuit uses an instrumentation amplifier connected as a high pass filter to attenuate large DC offsets and amplify small signals. The circuit can include an instrumentation amplifier electrically coupled with a first feedback circuit including at least one resistor and a second feedback circuit including an op-amp. The feedback circuit can also include a low-pass filter. The op-amp in the second feedback circuit can be configured as a non-inverting amplifier, an inverting amplifier, and/or an integrator circuit. Alternatively, the circuit can include an instrumentation amplifier with one feedback circuit including at least one resistor, and a coupling capacitor electrically coupled with a reference voltage.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: March 5, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Alasdair Gordon Alexander, David James Plourde, Matthew Nathan Duff
  • Patent number: 8305140
    Abstract: Active resistive circuitry (10, 10A, 11, 11A 25, 30, 35, or 40) includes a first current divider circuit (11) having an input (15) coupled to a first signal (Vi). The first current divider circuit (11) includes a first amplifier (13) having a first input (?) coupled to the first signal (Vi). A symmetrically bilateral first bidirectional circuit (M1a,M1b; R1) is coupled between the first input (?) of the first amplifier (13) and an output (17) of the first amplifier (13), and functions as a feedback circuit of the first amplifier (13). A symmetrically bilateral second bidirectional circuit (M2a,M2b; R2) is coupled between the output (17) of the first amplifier (13) and an output (18) of the first current divider circuit (11).
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: November 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Du Chen, Kemal S. Demirci
  • Publication number: 20120249234
    Abstract: A receiver (400; 500) comprising an amplifier (406; 506) having an input (408) and an output (410). The input (408) of the amplifier is configured to receive a signal. The receiver also comprises a feedback path (412; 512) between the output (410) and the input (408) of the amplifier (406; 506), wherein the feedback path (412; 512) includes a filter (402; 502) and a buffer amplifier (414; 514) in series. The input of the buffer amplifier (414; 514) is connected to the output (410; 510) of the amplifier (406; 506). The output of the buffer amplifier (414; 514) is connected to the input of the filter (402; 502). The output of the filter (402; 502) is connected to the input (408; 508) of the amplifier (406; 506). The filter (402; 502) is configured to pass signals having a desired frequency.
    Type: Application
    Filed: March 29, 2012
    Publication date: October 4, 2012
    Applicant: NXP B.V.
    Inventors: Sebastien ROBERT, Walter JAUDARD
  • Patent number: 8279000
    Abstract: A radio-frequency amplifier includes a common gate amplification stage configured to be biased in a saturation condition with a first current and configured to receive an input signal as a gate-source voltage and to generate an output voltage as an amplified replica of the input signal. A feedback transistor is configured to be biased in a saturation condition with a second current and coupled to the common gate amplification stage so as to have a gate-drain voltage corresponding to a difference between the output voltage and the input signal.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: October 2, 2012
    Assignee: STMicroelectronics S.R.L.
    Inventors: Ranieri Guerra, Giuseppe Palmisano
  • Publication number: 20120200350
    Abstract: An amplifier system can include a feedback amplifier circuit having an amplifier, a feedback capacitor connected between an input terminal and an output terminal of the amplifier by at least one first switch, and a reset capacitor connected across the feedback capacitor by at least one second switch and between a pair of reference voltages by at least one third switch. During an input-signal processing phase of operation, a control circuit may close the at least one first switch and open the at least one second switch to electrically connect the feedback capacitor between the input and output terminals to engage feedback processing by the feedback amplifier circuit, and close the third switch to electrically connect the reset capacitor between the first and second voltages to charge the reset capacitor to a selectable voltage difference.
    Type: Application
    Filed: February 9, 2011
    Publication date: August 9, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Cathal MURPHY, Michael COLN, Gary CARREAU, Alain Valentin GUERY, Bruce AMAZEEN
  • Patent number: 8183923
    Abstract: Constant and accurate signal gain systems based on controlling signal amplifier gain level by applying the signal amplifier output signal to a signal level divider with a set ratio. The output signal of the signal level divider is applied to one input of the gain control amplifier, which is a differential amplifier, while the signal amplifier input signal is applied to the other input. The gain control amplifier output level is used to control the gain level of the signal amplifier. The gain control amplifier output level forces by negative feedback the gain control amplifier input levels to be substantially equal thus maintaining the signal amplifier gain level substantially constant.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: May 22, 2012
    Inventor: Fred A Mirow
  • Patent number: 8166318
    Abstract: A power circuit includes a memory power circuit and a central processing unit (CPU) power circuit. The memory power circuit includes a first operational amplifier and a first switch. The CPU power circuit includes a second operational amplifier and a second switch. The memory power circuit supplies power to a memory slot. The CPU power circuit supplies power to a CPU.
    Type: Grant
    Filed: May 31, 2010
    Date of Patent: April 24, 2012
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Hai-Qing Zhou
  • Patent number: 8160518
    Abstract: A transceiver includes a harmonic termination circuit that receives a tunable harmonic voltage from a power amplifier control. The harmonic termination circuit includes a variable capacitor that is capable of adjusting its capacitance in response to the tunable harmonic termination voltage to achieve at least two modes of operation. The at least two modes of operation may be EDGE mode and GSM mode. In this embodiment, the harmonic termination circuit allows for linearity specifications of EDGE to be met, while not degrading the efficiency of the transceiver when operating in GSM mode. In one embodiment, the harmonic termination circuit further includes an inductive element in series with the variable capacitor.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: April 17, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Marcus R. Ray, Darrell G. Hill, Ricardo A. Uscola
  • Publication number: 20120019317
    Abstract: A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.
    Type: Application
    Filed: October 6, 2011
    Publication date: January 26, 2012
    Applicant: Lantiq Deutschland GmbH
    Inventors: Dario Giotta, Thomas Poctscher, David San Segundo Bello, Andreas Wiesbauer
  • Patent number: 8063700
    Abstract: An amplifier arrangement has an amplifier (3) with a signal input (31), a feedback input (32) and a signal output (33). A first coupling path (FB1), which has a first impedance element (R1), connects the feedback input (32) to the signal output (33). A second coupling path (FB2) has a filter device (4), a buffer circuit (5) and a second impedance element (R2) connected in series, and connects the feedback input (32) to the signal output (33) or to the signal input (31).
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: November 22, 2011
    Assignee: austriamicrosystems AG
    Inventors: Thomas Fröhlich, Nicole Heule
  • Patent number: 8008972
    Abstract: A differential signal generator circuit includes: a first amplifier for comparing an input signal with a threshold voltage and outputting differential signals; and a second amplifier for adjusting the threshold voltage in response to the differential signals. The second amplifier includes: a first transistor and a second transistor forming a differential pair, the gate of each transistor receiving a respective one of the differential signals; a third transistor and a fourth transistor forming a current mirror, the third transistor being connected between the drain of the first transistor and a reference potential point, the fourth transistor being connected between the drain of the second transistor and the reference potential point; a current source connected to the sources of the first and second transistors; and an adjusting section for adjusting drain current of the first transistor in response to an externally applied current or voltage.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: August 30, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Toshihide Oka, Masaaki Shimada