In Cascade Amplifiers Patents (Class 330/98)
  • Patent number: 6937104
    Abstract: An operational amplifier having a low impedance input and a high current gain output. The operational amplifier comprises: 1) a first N-channel transistor having a source coupled to the low impedance input of the operational amplifier; 2) a first constant current source coupled between the source of the first N-channel transistor and ground; 3) a first amplifier stage having an input coupled to the first N-channel transistor source and an inverting output coupled to a gate of the first N-channel transistor; 4) a second amplifier stage having an input coupled to a drain of the first N-channel transistor and an output coupled to the high current gain output of the operational amplifier; and 5) an internal compensation capacitor coupled between the input and the output of the second amplifier stage.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: August 30, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Devnath Varadarajan, Laurence D. Lewicki
  • Patent number: 6914488
    Abstract: A broadband amplification apparatus for extending a bandwidth includes a first and a second amplifying unit for amplifying an input signal, a buffering unit and a first inductive buffer. The buffering unit disposed between the first and the second amplifying unit buffers an output signal of the first amplifying unit to thereby maintain a bandwidth of the output signal, increases a gain and returns back a portion of the buffered signal to the first amplifying unit. The first inductive buffer, which is connected to the buffer unit, enhances input impedance as a frequency increases within a predetermined range, thereby introducing little gain changes while serving to extend a bandwidth.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: July 5, 2005
    Assignee: Information and Communications University Educational Foundation
    Inventors: Sang-Hyun Park, Dong Yun Jung, Chul Soon Park
  • Patent number: 6897731
    Abstract: A method and circuit for providing a faster overload recovery time for an amplifier circuit is provided. An overload recovery circuit is configured to reduce and/or eliminate the slow tail voltage that may be caused by overloading a composite amplifier, and thus provide a faster overload recovery time over a wide range of feedback components for the composite amplifier. The overload recovery circuit comprises a bypass device configured to provide a path for additional current to flow through during overload conditions, thus creating a “clamping” action with the feedback element of the amplifier circuit. As a result, the current flowing through the bypass device of the amplifier circuit will be large enough to hold an inverting node of the composite amplifier at the common mode voltage, thus reducing the overload recovery time.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: May 24, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Joy Y. Zhang, Rodney T. Burt
  • Patent number: 6865382
    Abstract: A mixer includes a reference current source, a programmable gain RF transconductance section or an RF transconductance section, switching quad native transistors or switching quad transistors, and a folded-cascoded common mode output section or an output section. When the mixer included the programmable gain RF transconductance section, the gain of the mixer is adjustable. When the mixer includes the switching quad native transistors, flicker noise of the mixer is reduced. When the mixer includes the folded-cascoded common mode output section, the mixer operates reliably from low supply voltages.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: March 8, 2005
    Assignee: Broadcom Corp.
    Inventor: Arya Reza Behzad
  • Patent number: 6864751
    Abstract: A transimpedance amplifier circuit comprising transistors, a constant current source, a load resistor, and the feedback resistor with a shunt circuitry consisting of the additional transistors, which are driven for example with electrically adjustable voltage sources. In a bipolar npn implementation the amplifier stage consists of a common emitter input transistor Q1, a transistor Q2 with its base connected to the collector of the first transistor operates as an emitter follower. A resistor RF connected between the emitter of said second transistor and the base of said first transistor provides a voltage controlled current feedback from the amplifier output to its input. The output voltage VOUT is generated at the emitter node of said second transistor. A shunt circuitry consists of a third and a fourth transistor Q3 and Q4 connected in shunt across resistor RF. In an embodiment, the base node voltages of the transistors Q3 and Q4 are adjusted by control voltage sources.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: March 8, 2005
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Lothar Schmidt, Karlheinz Muth, Martin Braier
  • Patent number: 6861908
    Abstract: There is disclosed an improved 2-stage large bandwidth amplifier (20) comprised of two stages formed by first and second bipolar transistors (Q1,Q2) configured in common emitter that are connected in series with their emitters connected to a first supply voltage (Gnd). The input signal (Vin) is applied to the base of said first transistor via an input terminal (11), while the output signal (Vout) is available at an output terminal (12) connected to the collector of said second transistor. A parallel feedback structure (13?) is provided. It consists, in a first branch, of two diodes (D1,D2) in series connected between a second supply voltage (Vcc) and the collector of the second bipolar transistor, and in another branch of a third bipolar transistor (Q3) configured in emitter follower with a resistor (Rf) in the emitter. The base and the collector of said third bipolar transistor are respectively connected to the common node of said diodes and to said second supply voltage.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: March 1, 2005
    Assignee: International Business Machines Corporation
    Inventors: Bertrand Gabillard, Michel Rivier, Fabrice Voisin, Philippe Girard
  • Patent number: 6836182
    Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an input that communicates with the output of the zero-order TIA and an output. A first feedback resistor has one end that communicates with the input of the zero-order TIA and an opposite end that communicates with the output of the first opamp. A capacitor has one end that communicates with the input of the zero-order TIA. The gain-bandwidth product of the nested TIA is increased. Differential mode TIAs also have increased gain-bandwidth products.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: December 28, 2004
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 6825725
    Abstract: Prior art architectures of power amplifiers employ a substantial die area, and utilize multiple integrated circuit technologies with a net higher manufacturing cost and large associated packaging area. A new scheme is presented wherein several sense and control signals are used to provide fine and gross control over the key figures of merit associated with integrated semiconductor power amplifiers. How and where these sense and control signals are used is crucial to achieving the most manufacturable and most economic integrated amplifier. In accordance with a first embodiment of the invention, a Dual Feedback-Low power regulation circuit for a three-stage power amplifier integrated circuit is provided. In accordance with a second embodiment of the invention, a current source feedback circuit having low RF output signal power regulation for a three-stage power amplifier integrated circuit is provided.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: November 30, 2004
    Assignee: SiGe Semiconductor Inc.
    Inventors: Mark Doherty, John Gillis, Michael McPartlin, David Helms, Phillip Antognetti
  • Patent number: 6801087
    Abstract: An integrated circuit includes an analog amplifier connected to a terminal pad and has a Miller compensation of a section of the analog amplifier. The Miller compensation circuit is connected to a terminal for reference-ground potential through a capacitive element. An EMC interference radiation that can be coupled in through the terminal pad is attenuated by the capacitive element. The operating points of the internal nodes of the analog amplifier are, thereby, stabilized.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: October 5, 2004
    Assignee: Infineon Technologies AG
    Inventor: Udo Ausserlechner
  • Patent number: 6801084
    Abstract: Disclosed is a four stage transimpedance amplifier having a grounded base transistor preamplifier input stage, a common emitter voltage amplifier stage, and an amplifier stage having a common collector transistor, an output buffer stage, and a bias circuit coupled to the preamplifier stage to prevent the grounded base transistor from going into saturation.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: October 5, 2004
    Assignee: Primarion, Inc.
    Inventors: Robert M. Smith, C. Phillip McClay, Robert T. Carroll
  • Patent number: 6762644
    Abstract: A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an input that communicates with the output of the zero-order TIA and an output. A first feedback resistor has one end that communicates with the input of the zero-order TIA and an opposite end that communicates with the output of the first opamp. A capacitor has one end that communicates with the input of the zero-order TIA. The gain-bandwidth product of the nested TIA is increased. Differential mode TIAs also have increased gain-bandwidth products.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: July 13, 2004
    Assignee: Marvell International, Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 6756851
    Abstract: Transimpedance amplifier having an input stage (1) to which an input current to be amplified is fed and an output stage (2) which outputs an output voltage (uo) corresponding to the amplified input current. By means of a current control circuit (4) the current (Ic) flowing through the amplifying element (Q1) of the input stage (1) is detected and controlled in such a way that said current is independent of the ambient temperature and of the supply voltage (Vcc). To detect the current (Ic) a dummy transimpedance amplifier (5) is used in combination with a current mirror circuit (6), the current (Ic) being controlled in that the control voltage (Uc) of a further transistor (Qc) coupled to the amplifying element (Q1) configured as a transistor is adjusted accordingly.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: June 29, 2004
    Assignee: Infineon Technology AG
    Inventor: Jaafar Mejri
  • Publication number: 20040097208
    Abstract: AM receiver comprising an RF input circuit for receiving an RF AM signal, demodulation means providing an audio signal carried by said RF AM signal as well as automatic gain control means for stabilising an RF carrier dependent DC level at the output of said demodulation means at a substantially fixed stabilisation value. In order to improve the receiver performance in particular at low values of the RF reception fieldstrength, the RF input circuit is being provided with a cascade of N tuneable resonance amplifiers being tuned to said RF AM signal, said automatic gain control means controlling at least one of said cascade of N resonance amplifiers to increase in both gain and selectivity at a decrease of the fieldstrength of said RF input signal.
    Type: Application
    Filed: July 28, 2003
    Publication date: May 20, 2004
    Inventor: Wolfdietrich Georg Kasperkovitz
  • Patent number: 6731175
    Abstract: A high frequency amplifier. The amplifier includes two transistors for signal amplification, and input and output matching circuits. There are variable capacitors and resistors in the matching input and output circuits. A received signal strength indicator receives the band-pass filtered intermediate-frequency signal and generates an indication signal corresponding to the amplitude of the received signal. The variable capacitors and resistors are tuned by the indication signal from the received signal strength indicator. Thus, the gain of the high frequency amplifier is automatically controlled.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: May 4, 2004
    Assignee: Faraday Technology Corp.
    Inventor: Yung-Hung Chen
  • Patent number: 6642783
    Abstract: The invention relates to an amplification device AD, comprising a first and a second amplifier AMP1 and AMP2, arranged in cascade, each amplifier being provided with a feedback loop Zi (where i=1 or 2) and having a gain proper Gi equal to Ai/(1+Ai.Zi). In accordance with the invention, the value of the inverse of the gain proper Gi of the first amplifier AMP1 is substantially equal to three times the value of the inverse of the gain proper G2 of the second amplifier AMP2 raised to the power of three: (1/G1)=3/(G2)3. Such a choice provides the amplification device AD with an optimum linearity.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: November 4, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Nicolas Constantinidis, Guillaume Crinon
  • Patent number: 6624704
    Abstract: An operational amplifier having a low impedance input and a high current gain output. The operational amplifier comprises: 1) a first N-channel transistor having a source coupled to the low impedance input of the operational amplifier; 2) a first constant current source coupled between the source of the first N-channel transistor and ground; 3) a first amplifier stage having an input coupled to the first N-channel transistor source and an inverting output coupled to a gate of the first N-channel transistor; 4) a second amplifier stage having an input coupled to a drain of the first N-channel transistor and an output coupled to the high current gain output of the operational amplifier; and 5) an internal compensation capacitor coupled between the input and the output of the second amplifier stage.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: September 23, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Devnath Varadarajan, Laurence D. Lewicki
  • Publication number: 20030151458
    Abstract: Disclosed is a four stage transimpedance amplifier having a grounded base transistor preamplifier input stage, a common emitter voltage amplifier stage, and an amplifier stage having a common collector transistor, an output buffer stage, and a bias circuit coupled to the preamplifier stage to prevent the grounded base transistor from going into saturation.
    Type: Application
    Filed: February 6, 2003
    Publication date: August 14, 2003
    Inventors: Robert M. Smith, C. Phillip McClay, Robert T. Carroll
  • Publication number: 20030122618
    Abstract: An integrated circuit includes an analog amplifier connected to a terminal pad and has a Miller compensation of a section of the analog amplifier. The Miller compensation circuit is connected to a terminal for reference-ground potential through a capacitive element. An EMC interference radiation that can be coupled in through the terminal pad is attenuated by the capacitive element. The operating points of the internal nodes of the analog amplifier are, thereby, stabilized.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 3, 2003
    Inventor: Udo Ausserlechner
  • Patent number: 6580326
    Abstract: A voltage buffer and follower includes a single ended output, a source follower, and a current feedback loop. The current feedback loop is coupled to the source follower and to the single ended output. When two voltage followers are used in a differential configuration, the voltage followers can become part of a high bandwidth gain cell. The high bandwidth gain cell includes a first and a second source follower circuit that are coupled to the first and the second current feedback loops, respectively. The first and the second source follower circuits are further coupled to a first and a second current mirror circuit, respectively. The first and second current mirror circuits are coupled to a load, which is coupled to a common-mode feedback circuit. The common-mode feedback circuit controls a constant current source that sinks mirrored direct currents that flow through the first and the second current mirror circuits.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: June 17, 2003
    Assignee: Infineon Technologies North America Corp.
    Inventors: Elmar Bach, Thomas Blon, Sasan Cyrusian, Stephen Franck
  • Patent number: 6552605
    Abstract: A differential transimpedance amplifier includes a differential transconductance stage to provide a current to a differential transimpedance stage. The differential transimpedance stage includes two gain stages and provides a voltage. A first feedback element is coupled in parallel with the differential transimpedance stage.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: April 22, 2003
    Assignee: Intel Corporation
    Inventor: Taesub Ty Yoon
  • Patent number: 6515487
    Abstract: A low voltage, low current apparatus for detecting discontinuities, such as bubbles, in a fluid stream, in which a tube is placed between a transducer transmitting successive bursts of ultrasonic energy and for receiving the bursts. The receiving transducer is connected to a low current transistor amplifier circuit of a signal processing circuit which keeps an output in a first state when signals are received corresponding to the presence of a fluid and in a second state when the bursts of energy are modified by the discontinuity.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: February 4, 2003
    Assignee: Magnetrol International, Inc.
    Inventors: William C. Dawson, Mayank H. Patel
  • Patent number: 6501335
    Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: December 31, 2002
    Assignee: NEC Corporation
    Inventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
  • Patent number: 6498533
    Abstract: A bootstrapped dual-gate Class E amplifier circuit includes a first MOSFET and a second MOSFET connected in series and coupled between a dc voltage source terminal and a common terminal. An rf input signal terminal is coupled to a gate electrode of the first MOSFET and a dc control voltage terminal is coupled to a gate electrode of the second MOSFET, with a unidirectionally-conducting element such as a diode-connected MOSFET being coupled between a drain electrode and the gate electrode of the second MOSFET. The output of the amplifier circuit is taken from the drain electrode of the second MOSFET. This circuit configuration permits the first and second MOSFETs to withstand a larger output voltage swing, thus permitting the use of a higher supply voltage and resulting in a substantially increased maximum output power capability for a given load value.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: December 24, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Tirdad Sowlati
  • Patent number: 6496074
    Abstract: A cascode bootstrapped analog power amplifier circuit includes a first MOSFET and a second MOSFET connected in series and coupled between a dc voltage source terminal and a common terminal. An rf input signal terminal is coupled to a gate electrode of the first MOSFET and a dc control voltage terminal is coupled to a gate electrode of the second MOSFET, with a unidirectionally-conducting element such as a diode-connected MOSFET being coupled between a drain electrode and the gate electrode of the second MOSFET. The output of the amplifier circuit is taken from the drain electrode of the second MOSFET. This circuit configuration, permits he first and second MOSFETs to withstand a larger output voltage swing, thus permitting the use of a higher supply voltage and resulting in a substantially increased maximum output power capability for a given load value.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: December 17, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Tirdad Sowlati
  • Patent number: 6476679
    Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: November 5, 2002
    Assignee: NEC Corporation
    Inventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
  • Publication number: 20020079961
    Abstract: The invention relates to an amplification device AD, comprising a first and a second amplifier AMP1 and AMP2, arranged in cascade, each amplifier being provided with a feedback loop Zi (where i=1 or 2) and having a gain proper Gi equal to Ai/(1+Ai.Zi). In accordance with the invention, the value of the inverse of the gain proper Gi of the first amplifier AMP1 is substantially equal to three times the value of the inverse of the gain proper G2 of the second amplifier AMP2 raised to the power of three: (1/G1)=3/(G2)3. Such a choice provides the amplification device AD with an optimum linearity.
    Type: Application
    Filed: September 12, 2001
    Publication date: June 27, 2002
    Inventors: Nicolas Constantinidis, Guillaume Crinon
  • Patent number: 6400229
    Abstract: A low noise, low distortion radio frequency amplifier which includes a bootstrap design to minimize intermodulation distortion while simultaneously achieving low noise and wide bandwidth. In the illustrative embodiment, the invention includes a first circuit for receiving an input signal; a second circuit for amplifying the input signal using a transistor Q2; and a third circuit for regulating a rate of change of voltage across the transistor Q2 such that the rate of voltage change is zero. The third circuit includes a transistor Q3 connected to the transistor Q2 in cascode. In the specific illustrative embodiment, the third circuit further includes two diodes D1 and D2 used to modulate the voltage at the input of the transistor Q3 in proportion to the voltage modulation at the input of the transistor Q2. In the illustrative embodiment, the second circuit includes a transistor Q1 connected in cascade to the transistor Q2.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: June 4, 2002
    Assignee: Raytheon Company
    Inventors: Kelvin T. Tran, Clifford Duong, Michael N. Farias, Don C. Devendorf, Lloyd F. Linder
  • Patent number: 6396351
    Abstract: An amplifier circuit (20) for a photodetector includes a transconductance variable gain stage (32). The transconductance variable gain stage (32) has an input (34) capable of connecting to the photodetector and an output (40). A transconductance gain stage (44) has an input (42) connected to the output (40) of the transconductance variable gain stage (32). A feedback resistor (46) is connected between an output (48) of the transconductance gain stage (44) and the input (42) of the transconductance gain stage (44).
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: May 28, 2002
    Assignee: EM (US) Design, Inc
    Inventors: Kevin Scott Buescher, James Harold Lauffenburger, John William Arachtingi
  • Patent number: 6369739
    Abstract: The AGC circuit is provided with an analog variable gain amplifying circuit which includes a plurality of fixed gain amplifiers and a selector for selecting one of the output signals of the plurality of fixed gain amplifiers, an A/D converter for receiving the selected output signal from the variable gain amplifying circuit, a digital band pass filter which allows only the burst signal and the color signal in the output signal from the A/D converter to pass through, and a digital AGC/detection circuit for controlling the gain of the variable gain amplifying circuit such that the burst signal remains stable and for amplifying the digital signal to obtain a digital output color signal such that the detected burst signal becomes equal in level to the digital reference signal. Thus, a more stable output signal can be obtained even with the variation in the ambient temperature or the power supply voltage.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: April 9, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric System LSI Design
    Inventors: Yoshihiro Inada, Shinji Yamashita
  • Patent number: 6362698
    Abstract: A circuit for conditioning an input control voltage signal that is used to drive an LC tank oscillator in a phase locked loop (PLL). The conditioning circuit includes a two-stage amplifier including a first stage amplifier connected to a second stage comprising an active cascode circuit, a diode-connected transistor and a resistor tied to a reference voltage (e.g. ground). The first stage amplifier receives a control voltage input signal, which would typically be produced at the output of a loop filter in a PLL, and produces a conditioned control voltage output signal at its output, which is connected to the drain of the diode-connected transistor. The purpose of the amplifier is to lower the impedance of the conditioned output signal, which is then used to drive the LC tank oscillator, wherein the series resistor acts both to lower the impedance and to act as the degenerating resistor for the diode-connected transistor.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: March 26, 2002
    Assignee: Intel Corporation
    Inventor: Sandeep K. Gupta
  • Patent number: 6340916
    Abstract: An innovated transimpedance amplifier circuit consists of a buffer circuit, a simulation resistance circuit, and an amplifier circuit. The buffer circuit for inputting a signal circuit is constituted by two FETs and a resistor, and has a high current input efficiency and function of widening circuit frequency band. The simulation resistance circuit is constituted by a resistor, two buffer units, a coupling capacitor, and a biasing resistor. When operating at a low frequency, the simulating resistance circuit permits a large amount of background DC to flow through; on the other hand, when operating at a high frequency, this circuit can improve the signal coupling efficiency and reduce foreign signal output voltage. On the whole, by the circuit of the present invention, both the detecting sensitivity and the amplification factor of the signal current can be significantly improved.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: January 22, 2002
    Assignee: Telecommunications Laboratories, Chunghwa Telecom Co., Ltd.
    Inventors: Tsz-Lang Chen, Guang-Ching Leu, Chun-Yo Hsu
  • Patent number: 6275112
    Abstract: A microphone bias amplifier circuit (30) and method for biasing a microphone with an amplifier circuit. The amplifier circuit (30) has an input stage (34) coupled to an output stage (40). The output stage (40) includes a first transistor (M1) coupled to a feedback loop (32) provides a variable source current (13) to the first transistor (M1) and the output stage output Vout. The feedback loop (32) includes an amplifier (36) coupled to the first transistor (M1) and a first current source (I2) conducted through a second transistor (M2) and coupled to the amplifier (36). The amplifier (36) controllably drives a third transistor (M3) coupled to a voltage source (AVDD) to generate the variable current source (I2). The gates of the first (M1) and second (M2) transistors are coupled together and driven by the input stage (34).
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: August 14, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: John M. Muza
  • Patent number: 6271721
    Abstract: An augmented common-base transistor amplifier circuit is described, including an input terminal and an output terminal. The amplifier circuit also includes an augmentation circuit, connected from the emitter to the base of the amplifying transistor, which detects an error voltage at the transistor emitter, amplifies and inverts the error voltage, and then applies the amplified error voltage to the base of the amplifying transistor, for the purpose of reducing the emitter error voltage and thus linearizing the common-base amplifier. According to a further embodiment, a second transistor is used for amplifying the emitter error voltage, and a further embodiment uses a transformer for augmentation. Circuits are described for single-ended, push-pull, and complementary amplifiers.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: August 7, 2001
    Inventor: Christopher Trask
  • Patent number: 6265938
    Abstract: A novel drive stage provides with low distortion a large amplitude signal, such as required for driving a cathode-follower output stage of a power amplifier. The drive stage comprises an amplification substage and a load substage. Each substage comprises two series connected vacuum tubes. Each substage is provided with a respective voltage divider network to provide that the two tubes of each substage share approximately equally both the quiescent static voltage and the dynamic voltage of the substage. The load substage coacts with the amplification substage to provide a novel mu-follower or SRPP circuit having approximately twice the voltage swing of a conventional circuit. This approximately quadruples the maximum power output of the cathode-follower amplifier.
    Type: Grant
    Filed: December 27, 1999
    Date of Patent: July 24, 2001
    Inventor: Martin Reiffin
  • Patent number: 6246290
    Abstract: A high gain, current driven amplifier uses an emitter follower circuit with another emitter follower circuit connected in a feedback configuration to drive a common base amplifier circuit in place of a conventional cascode amplifier configuration to achieve a high frequency response with adequate signal gain. A differential input signal can be used, thereby minimizing input DC offsets, drift and noise, by using a differential amplifier to convert a differential input signal voltage to the input signal current for driving the emitter follower circuits. The current gain is determined by a ratio of the resistances in the emitter circuits of the emitter follower circuits. In one embodiment, the currents formed in the emitter follower circuits are summed at the input to the common base amplifier circuit, while in another embodiment, such currents are summed at the output of the common base amplifier circuit.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: June 12, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Andrew Morrish, Thomas Mills
  • Patent number: 6222418
    Abstract: A feed-forward compensated negative feedback circuit comprises an operational amplifier having an inverting and a non-inverting input and an output. A feedback element is connected between the output of the operational amplifier and its inverting input to form a negative feedback loop. The inverting input of the op-amp is driven with a first transconductance amplifier which produces an output current proportional to an input voltage. A feed-forward transconductance amplifier receives the input voltage and produces an inverted output current proportional to the input voltage. A feed-forward current is injected at the output of the operational amplifier. By providing at the output of the op-amp the current it would be required to carry over the feedback loop, a voltage differential at the op-amp inputs is avoided, thus eliminating parasitic current flows across the parasitic input capacitance and thereby improving the circuits overall performance.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: April 24, 2001
    Assignee: Lucent Technologies, Inc.
    Inventors: Venugopal Gopinathan, Vladimir I. Prodanov
  • Patent number: 6211737
    Abstract: A circuit includes a transconductance stage which converts an input signal power into a signal current and supplies it to an output of the circuit. A current diverting circuit branch is coupled to selectively divert the current from the transconductance stage away from the output. A feedback network feeds back a portion of the current diverted away from the output to the input of the transconductance stage. When implemented as a variable gain amplifier, the current diverting branch functions to change a gain of the circuit from a high level to one or more lower levels. The feeding back of a portion of the diverted current to the input improves the linearity of the circuit in the lower gain mode(s).
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: April 3, 2001
    Assignee: Philips Electronics North America Corporation
    Inventor: Keng Leong Fong
  • Patent number: 6208205
    Abstract: A transconductance amplifier (67) includes a multiple-stage amplifier (99) for amplifying an Intermediate Frequency (IF) signal. The transconductance amplifier includes a feedback path (103) having a resistance (105) for providing a feedback signal from an output of the multiple-stage amplifier (99) to an input of the multiple-stage amplifier (99). The resistance (105) of the feedback path (103) is selected so that an input impedance of the transconductance amplifier is equal to a source impedance at an input terminal (82) of the transconductance amplifier (67) and an output impedance of the transconductance amplifier (67) is equal to a load impedance at an output terminal (84) of the transconductance amplifier (67).
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: March 27, 2001
    Assignee: Motorola, Inc.
    Inventors: William E. Main, Danielle L. Coffing
  • Patent number: 6204728
    Abstract: Apparatus and methods of broadband amplification with high linearity and low power consumption are described. An apparatus configured to amplify a signal includes an input transistor and an output transistor coupled together in a cascode configuration with the input transistor defining an input of the amplifier and the output transistor defining an output of the amplifier. A feedback network is coupled between the input and the output and is characterized by an impedance of substantially zero resistance and non-zero reactance. A method of amplifying a signal is also described. An input signal is received at an input; the input signal is amplified to provide an output signal at an output; and the output signal is sampled at the input through a feedback network characterized by an impedance of substantially zero resistance and ion-zero reactance. A method of making an apparatus configured to amplify a signal is also described.
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: March 20, 2001
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Johannes J. E. M. Hageraats
  • Patent number: 6201442
    Abstract: An amplifier is provided for audio or instrumentation applications which exhibits radically improved performance over existing amplifiers of comparable cost. In a preferred embodiment, the amplifier comprises two operational amplifiers (A1, A2) connected in cascade, where feedback elements (Cf2, Rf2) are connected across the second op amp (A2) to cause an intermediate voltage signal (Z) to be substantially advanced in phase. In this embodiment, a capacitor (Cf1) is also connected across the first op amp (A1), and an outer DC loop is provided with damping circuitry (Cf3) to reduce the closed loop gain at high frequencies, stabilizing the combination. The composite amplifier has performance far exceeding a conventional stand-along op amp and is very cheap to construct.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: March 13, 2001
    Inventors: Anthony Michael James, William James Hildebrandt
  • Patent number: 6177837
    Abstract: A feedback circuit is connected between the input electrode of amplifying element of an amplifying circuit of the initial stage and the output electrode of amplifying element of an amplifying circuit of the final stage. The feedback circuit is structured by a serial circuit of a voltage dropping means resulting in almost constant voltage drop regardless of an increase or decrease of current and a feedback resistor, and a bias voltage is supplied, via the feedback circuit, to an input electrode of the amplifying element in the amplifying circuit of the initial stage from an output electrode of the amplifying element in the amplifying circuit of the final stage. Thereby, current dissipation is reduced and signal loss is lowered.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: January 23, 2001
    Assignee: Alps Electric Co., Ltd.
    Inventors: Kazuharu Aoki, Shoichi Asano
  • Patent number: 6175275
    Abstract: A preamplifier includes an output stage having a bandwidth which is adjustable by a control signal. The output stage includes an amplifier with an adjustable bandwidth. The amplifier includes a main input for receiving an input current, a main output for providing an output voltage, a resistor connected between the main input and output. A current amplifier with an adjustable gain is connected for receiving the input current. A capacitor is connected between an output of the current amplifier and the main output. An inverting transconductance circuit is connected between the output of the current amplifier and the main output.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: January 16, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Michel Barou, Danika Chaussy
  • Patent number: 6163211
    Abstract: A cascode amplifier which includes a cascode amplifier stage, an output node (coupled directly or indirectly to the cascade amplifier stage), and positive feedback circuitry coupled between the output node and the cascade amplifier stage (or positive feedforward circuitry coupled between the input node and the cascode amplifier stage) for improved amplifier response to rapidly varying input. Preferably, the amplifier is implemented as an integrated circuit or portion of an integrated circuit, and the feedback or feedforward circuitry is configured to reduce rise times and fall times of the output potential (in response to falling and rising edges of the input) to within acceptable limits, with no more than acceptably small overshoot at both the rising and falling edges of the output potential, and with at least substantially equal overshoot at both the rising and falling edges of the output potential.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: December 19, 2000
    Assignee: National Semiconductor Corporation
    Inventor: Andrew J. Morrish
  • Patent number: 6137367
    Abstract: Simplified, efficient multiple-transistor power amplifiers provide high power and high impedance while avoiding the use of RF power divider and combiner circuits.The input signal is directly applied to a first transistor, amplified, and supplied to the succeeding transistor, and so on, for amplification in series. Feedback is provided between the drain of the last transistor and the gates of all the transistors. Series connection of the transistors allows their power outputs and their output impedances to be summed, such that no RF output combiner is required.In a first high voltage embodiment of the amplifier of the invention, e.g., as used for satellite transmission, bias voltage is provided in series.In a second low voltage embodiment, suitable for use in cordless telephones and other battery-powered equipment, bias voltage V.sub.ds is provided separately across the drain and source terminals of each transistor, through paired chokes.
    Type: Grant
    Filed: March 8, 1999
    Date of Patent: October 24, 2000
    Assignee: AMCOM Communications, Inc.
    Inventors: Amin Ezzedine, Ho C. Huang
  • Patent number: 6026127
    Abstract: An autozero method and system that cancels offset for use in an AMI or like system and that operates while data is being transmitted and does not require a retraining sequence. The system applies the offset correction feedback in a unique way inside the traditional feedback loop. The system also provides a unique method of introducing offset correction into an analog feedback loop prior to the last gain stage such that the offset cancellation point is inside the feedback loop. This allows a straight forward implementation which does not have to compensate for the offset change due to the gain of the last stage. A digital control system allows the AGC and the autozero to be active in the same feedback loop and to interact with no adverse affects during the transmission of data.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: February 15, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Laurence Douglas Lewicki, George Edmond Seiler
  • Patent number: 6020789
    Abstract: Known is a two stage high frequency amplifier preceded by a large amplification gain stage providing a fixed swing signal for the two stage amplifier. Particularly in portable devices such as pagers, and mobile or cordless phones, such a receiver structure consumes much power. An amplifier structure is proposed with a cascade of at least four amplifier stages, alternately resistive feedback amplifier stages and non-resistive amplifier stages. Herewith, a dramatic improvement of the gain-bandwidth product is achieved, for the same static power consumption. The amplifier can be used in a PLL of a synthesizer circuit for a pager, cellular or cordless phone, or any other suitable communication device.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: February 1, 2000
    Assignee: U.S. Philips Corporation
    Inventor: Zhenhua Wang
  • Patent number: 5886580
    Abstract: A tuned amplifier that can be produced easily in an integrated circuit and by which the tuning frequency and the maximum damping are arbitrarily adjusted without mutual interference.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: March 23, 1999
    Inventors: Takeshi Ikeda, Tadataka Ohe
  • Patent number: 5705950
    Abstract: In this hybrid amplifier circuit the vacuum tube is direct coupled or DC coupled to the output of a solid state amplifier in a cathode follower configuration. An automatically operative bypass component, such as a Zener diode, LED, transistor junction or relay, diverts the signal output of the solid state amplifier around the vacuum tube stage when bias conditions or other vacuum tube operating conditions signify that the vacuum tube is still warming up or for some reason inoperative. Thus the hybrid circuit produces amplification at full volume and at low distortion even while the vacuum tube is warming up. The vacuum tube provides a desirable warming coloration to the sound that may be user adjusted by controlling the level of closed loop feedback within the circuit. Lower total harmonic distortion is achieved in a pentode vacuum tube device by direct coupling the screen and control grids. Lower voltage use of power pentodes wired in nonconventional "triode mode" is achieved.
    Type: Grant
    Filed: February 15, 1996
    Date of Patent: January 6, 1998
    Inventor: Brent K. Butler
  • Patent number: 5374966
    Abstract: A video amplifier having a reduced noise figure is realized by eliminating the need for a resistive matching termination at the input of the amplifier. A negative feedback loop reduces the effective input impedance of the amplifier by generating an active impedance at the input of the amplifier. Because the input impedance of the amplifier is actively matched to the output impedance of the video signal generator, a noise-generating resistive termination is unnecessary, and the noise figure of the overall impedance-matched amplifier is significantly reduced.
    Type: Grant
    Filed: April 15, 1993
    Date of Patent: December 20, 1994
    Assignee: Westinghouse Electric Corporation
    Inventor: Benjamin F. Weigand
  • Patent number: 5220686
    Abstract: An amplifier with a non-regenerative DC negative feedback loop which incorporates first and second first-order low-pass RC filters, has a signal path arranged from an input to an output and a feedback path arranged from the output to the input, and has a controlled loop gain. To provide substantially even selective amplification over a comparatively large tuning control range, the signal path incorporates one of the two RC filters and the feedback path incorporates the other RC filter together with the controlled loop gain; or the signal path incorporates the two RC filters together with one part of the controlled loop gain and the feedback path incorporates the other part of the controlled loop gain.
    Type: Grant
    Filed: December 20, 1990
    Date of Patent: June 15, 1993
    Assignee: U.S. Philips Corporation
    Inventors: Wolfdietrich G. Kasperkovitz, Hendricus C. De Ruijter