Abstract: A crystal oscillator and a method are provided for adjusting an oscillation frequency. The crystal oscillator includes: a first oscillator circuit, a frequency control circuit and a crystal; where the first oscillator circuit is configured to output a first drive signal having a first oscillation frequency to drive the crystal, and the frequency control circuit is configured to determine a frequency control amount according to a feature of an electrical signal flowing through the crystal under driving of the first drive signal, and adjust the first oscillation frequency according to the frequency control amount. When the technical solutions are applied to scenarios where the crystal oscillator is enabled to quickly en-oscillate, a natural en-oscillation cycle of the crystal oscillator may be shortened, and the en-oscillation speed is increased.

Abstract: A radar system including a reference channel formed symmetrically in relation to a main channel, with a first oscillator, generating a first input signal, which is feedable to an antenna in the main channel, a reflected portion of the first input signal being feedable to a first mixer, the first input signal in the reference channel being feedable to a second mixer via a second directional coupler, with a second oscillator, generating a second input signal having a frequency differing from the first input signal in a defined way, which is feedable to the first and second mixers, the signal coming from the mixer of the main channel and the signal coming from the mixer of the reference channel being compared, and dimensioning a terminating impedance of the reference channel as a function of the comparison so that the output signals of the main and reference channels have identical properties.

Abstract: RF circuitry, which includes a first acoustic RF resonator (ARFR) and a first compensating ARFR, is disclosed. A first inductive element is coupled between the first compensating ARFR and a first end of the first ARFR. A second inductive element is coupled between the first compensating ARFR and a second end of the first ARFR. The first compensating ARFR, the first inductive element, and the second inductive element at least partially compensate for a parallel capacitance of the first ARFR.

Abstract: RF circuitry, which includes a first acoustic RF resonator (ARFR) and a first compensating ARFR, is disclosed. A first inductive element is coupled between the first compensating ARFR and a first end of the first ARFR. A second inductive element is coupled between the first compensating ARFR and a second end of the first ARFR. The first compensating ARFR, the first inductive element, and the second inductive element at least partially compensate for a parallel capacitance of the first ARFR.

Abstract: Provided is a planar nano-oscillator array having phase locking function, including two or more planar nano-oscillators which are arranged in parallel. The two oscillators are connected by planar resistors and capacitors, and a structure thereof includes: electrodes; respectively introducing two pairs of laterally arranged parallel insulation notch grooves into two-dimensional electron gas layers, so as to form oscillation channels; vertically disposing separating insulation notch grooves, so that a planar resistor A with low resistance which is connected to the electrode is formed on the left side, and a planar resistor B with low resistance which is connected to the electrode is formed on the right side; and arranging, between the two oscillators, an insulation capacitor notch groove which is parallel to the oscillation channels, insulating materials having a high dielectric constant being filled therein.

Abstract: RF circuitry, which includes a first acoustic RF resonator (ARFR) and a first compensating ARFR, is disclosed. A first inductive element is coupled between the first compensating ARFR and a first end of the first ARFR. A second inductive element is coupled between the first compensating ARFR and a second end of the first ARFR. The first compensating ARFR, the first inductive element, and the second inductive element at least partially compensate for a parallel capacitance of the first ARFR.

Abstract: In one embodiment, filter circuitry includes a series acoustic resonator between first and second nodes. A main series resonance is provided between the first node and the second node at a main resonance frequency through the series acoustic resonator. A compensation circuit includes first and second inductors coupled in series between the first node and the second node, wherein the first inductor and the second inductor are negatively coupled with one another and a common node is provided between the first and second inductors. The compensation circuit also includes first and second shunt acoustic resonators, which are coupled in parallel with one another between the common node and a fixed voltage node. First and second series resonances at first and second resonance frequencies are provided between the first node and the second node through compensation circuit wherein the first and second resonance frequencies are different.

Abstract: Tunable filter circuitry includes a series acoustic resonator between first and second nodes and a compensation circuit in parallel with the series acoustic resonator. The compensation circuit includes first and second inductors coupled in series between the first node and the second node, wherein the first inductor and the second inductor are negatively coupled with one another and a common node is provided between the first and second inductors. The compensation circuit also includes first and second shunt acoustic resonators, which are coupled in parallel with one another between the common node and a fixed voltage node. A first variable capacitor is also coupled between the common node and the fixed voltage node, wherein changing a capacitance of the first variable capacitor changes a bandwidth of a passband of the filter circuitry.

Abstract: An RF ladder filter having a parallel capacitance compensation circuit is disclosed. The parallel capacitance compensation circuit is made up of a first inductive element with a first T-terminal and a first end coupled to a first ladder terminal and a second inductive element with a second T-terminal that is coupled to the first T-terminal of the first inductive element and a second end coupled to a second ladder terminal. Further included is a compensating acoustic RF resonator (ARFR) having a fixed node terminal and a third T-terminal that is coupled to the first T-terminal of the first inductive element and the second T-terminal of the second inductive element, and a finite number of series-coupled ladder ARFRs, wherein the parallel capacitance compensation circuit is coupled across one of the finite number of series-coupled ARFRs by way of the first ladder terminal and the second ladder terminal.

Abstract: An oscillator for high-frequency signal generation is disclosed. Provided according to the present invention is an oscillator for high-frequency signal generation comprising: a first transistor comprising a first collector for receiving a power supply voltage from a load, a first base connected to a ground, and a first emitter connected to the first base; and a second transistor comprising a second collector for receiving a power supply voltage from the load, a second base connected to a ground, and a second emitter connected to the second base, the oscillator having a common-base cross-coupled structure in which the first collector and the second emitter are cross-coupled and the second collector and the first emitter are cross-coupled.

Abstract: A circuit includes: first and second output terminals; a reference resonator coupled between the first and second output terminals; a cross-coupled oscillation unit coupled to the first and second output terminals; a first MOSFET diode coupled to the cross-coupled oscillation unit, the first MOSFET diode including a first transistor, a first resistor coupled between gate and drain terminals of the first transistor, and a first capacitor; a second MOSFET diode coupled to the cross-coupled oscillation unit, the second MOSFET diode including a second transistor, a second resistor coupled between gate and drain terminals of the second transistor, and a second capacitor cross coupled between the drain terminal of the second transistor and the gate terminal of the first transistor, wherein the first capacitor is cross coupled between the drain terminal of the first transistor and the gate terminal of the second transistor.

Abstract: A voltage-controlled oscillator and a method for tuning oscillations. The oscillator comprises a resonator input connected to an oscillator core and a frequency tuning network. The oscillator core and resonator input are isolated from the frequency tuning network by inductors. The method comprises generating oscillations, tuning the frequency of the oscillations by varying a capacitance, and isolating one or more of noise sources or parasitic capacitances from the tuning network.

Abstract: Methods and devices for the generation of high frequency clock signals. In a transmission line a signal is reflected back and forward. The electric length of the transmission line determines the frequency of the oscillation. A start signal at the switching device initiates a signals traveling down the transmission line. At the other end of the transmission line the signals is reflected back. At the tapping point along the transmission line, part of the energy of the signal in the transmission line is coupled out to form the feedback signal. The feedback signal activates the switching device. The switching device injects energy into the transmission line and sustains the oscillation on the transmission line. The position of the tapping point on transmission line determines the shape of the feedback signals and can hence be used as a design parameter optimize the performance of the system.

Abstract: An oscillator configured to oscillate an electromagnetic wave, including: a negative resistance device; a microstrip resonator configured to determine an oscillation frequency of an electromagnetic wave excited by the negative resistance device; a resistance device and a capacitance device, which form a low-impedance circuit configured to suppress parasitic oscillation; and a strip conductor configured to connect the capacitance device of the low-impedance circuit and the microstrip resonator to each other, in which an inductance L of the strip conductor and a capacitance C of the microstrip resonator produce a resonance frequency of ½??LC, and ¼ of an equivalent wavelength of the resonance frequency is larger than a distance between the negative resistance device and the resistance device of the low-impedance circuit via the strip conductor, is provided.

Abstract: A voltage controlled oscillator (VCO) with low phase noise and a sharp output spectrum is desirable. The present disclosure provides embodiments of LC tank VCOs that generate output signals with less phase noise compared with conventional LC tank VCOs, while at the same time limiting additional cost, size, and/or power. The embodiments of the present disclosure can be used, for example, in wired or wireless communication systems that require low-phase noise oscillator signals for performing up-conversion and/or down-conversion.

Abstract: The present application discloses a voltage-controlled oscillator device and a method of correcting the voltage-controlled oscillator. The voltage-controlled oscillator device comprises predistortion module, configured to predistort an input voltage to obtain a predistorted voltage; and a voltage-controlled oscillator, configured to generate an output signal with a corresponding oscillation frequency according to the predistorted voltage, wherein the predistortion module corrects a non-linear characteristic of the voltage-controlled oscillator, so that there is a linear relationship between the input voltage and the oscillation frequency of the output signal. The voltage-controlled oscillator device may be applied to a phase-locked circuit in a communication system.

Abstract: Disclosed herein are a clock generating circuit having a parasitic oscillation suppressing unit and a method of suppressing parasitic oscillation using the same. An output VDD of a parasitic component eliminating circuit is maintained in a high or low state according to the condition in which the output VDD falls from the high state to the low state and the condition in which the output VDD rises from the low state to the high state based on a threshold voltage VSPH when an input signal of the parasitic component eliminating circuit is changed from 0 to 1 and a threshold voltage VSPL when the input signal of the parasitic component eliminating circuit is changed from 1 to 0. Undesired parasitic oscillation is eliminated (suppressed) by the parasitic component eliminating circuit provided between a oscillator and a buffer.

Abstract: An oscillator configured to oscillate an electromagnetic wave, including: a negative resistance device; a microstrip resonator configured to determine an oscillation frequency of an electromagnetic wave excited by the negative resistance device; a resistance device and a capacitance device, which form a low-impedance circuit configured to suppress parasitic oscillation; and a strip conductor configured to connect the capacitance device of the low-impedance circuit and the microstrip resonator to each other, in which an inductance L of the strip conductor and a capacitance C of the microstrip resonator produce a resonance frequency of ½??LC, and ¼ of an equivalent wavelength of the resonance frequency is larger than a distance between the negative resistance device and the resistance device of the low-impedance circuit via the strip conductor, is provided.

Abstract: A method of actuating a system comprising a movable component and an actuator configured to move the movable component comprises providing a control signal representative of a desired motion of the movable component. The control signal is supplied to one or more resonators. Each of the one or more resonators has a mode of oscillation representative of at least one elastic mode of oscillation of the system. The control signal is modified by subtracting from the control signal a signal representative of a response of the one or more resonators to the control signal. The actuator is operated in accordance with the modified control signal. Thus, undesirable elastic oscillations of the system which might occur if the system were operated with the original control system can be reduced.

Abstract: A switched capacitor circuit includes a positive side capacitor coupled to a first positive side node; a first positive side switch element for selectively coupling the first positive side node to a second node according to a first control signal; and a precharge circuit coupled to the first positive side node for precharging the first positive side node to a precharge voltage for a predetermined time when the first positive side switch element is switched off according to the first control signal, and then for charging the first positive side node to a charge voltage until the first positive side switch element is switched on according to the first control signal. By rapidly precharging the first positive side node, the clock feedthrough effect is eliminated and the locking period of the VCO is shortened. Afterwards by charging the first positive side node, the phase noise of the VCO is minimized.

Abstract: A wireless communication device is disclosed wherein the voltage swing of a local oscillator (LO) signal is controlled to prevent overstressing semiconductor devices in a mixer to which the LO signal is supplied. A quadrature divider supplies the LO signal to the mixer. Digital calibration methodology controls the current that the quadrature divider draws from a power supply to set the voltage swing of the LO signal that the quadrature divider generates.

Abstract: An electric circuit, for use in a phase lock loop circuit, the electric circuit comprising: a first circuit element, being a phase frequency detector or a charge pump; at least one LC resonant loop, the first circuit element forming part of the loop; and means arranged to reduce ringing in said at least one LC resonant loop.

Abstract: An RF front-end circuit includes a directional coupler, a mixer, and a reflection circuit. The directional coupler is adapted to receive an antenna signal and an oscillator signal. The mixer is coupled to the directional coupler to receive the antenna signal and is further adapted to receive a mixer signal and to generate an output signal related to the antenna signal and the mixer signal. The reflection circuit is coupled to the directional coupler to receive the oscillator signal and is adapted to reflect at least a portion of the oscillator signal to the mixer via the directional coupler to counteract a parasitic portion of the oscillator signal received at the mixer.

Abstract: An integrated circuit arrangement is disclosed. In one embodiment, the integrated circuit arrangement includes an output circuit having at least one first output connection which can provide a data signal, at least one first data output connection; and at least one first inductance connected between the at least one first output connection and the at least one data output connection.

Abstract: The effect of supply voltage variations on an oscillator circuit output are compensated for to reduce supply pushing. The change in a value of a first capacitance in a first direction in response to the variation in the supply voltage is canceled using one or more diodes having a capacitance that changes in a second direction, opposite the first direction, in response to the variation in the supply voltage.

Abstract: A semiconductor integrated circuit device includes a semiconductor substrate; at least one integrated circuit block formed in the semiconductor substrate; a first electrode pad which receives a first clock, the first electrode pad being disposed on the semiconductor substrate; a wiring line which electrically connects the integrated circuit block and the first electrode pad, the wiring line being disposed on the semiconductor substrate; and a second electrode pad which receives a second clock having the same frequency as and opposite polarity from the first clock, the second electrode pad being disposed in a position adjacent to the first electrode pad on the semiconductor substrate and isolated from the integrated circuit block.

Abstract: A variable capacitance circuit includes a first and a second capacitor. A switch having an associated first nonlinear capacitance, selectively couples the first and second capacitors. To compensate for the first nonlinear capacitance, a second nonlinear capacitance is coupled to the switch that has a capacitance value responsive to a change in voltage that moves in a direction of change opposite to a direction of change of the first nonlinear capacitance.

Abstract: An oscillator includes a resonant circuit of at least one inductance device and at least one tunable capacitance. The tunable capacitance is implemented through diffusion capacitances of at least one current-carrying transistor. The tunable capacitance has a first differential amplifier having a first transistor and a second transistor and a second differential amplifier having a third transistor and a fourth transistor Electrical properties of the first transistor and second transistor are complementary to electrical properties of the third transistor and fourth transistor, and control connections of the first transistor and the third transistor are connected to one another. Control connections of the second transistor and the fourth transistor are connected to one another. Second current connections of the first transistor and the third transistor are connected to one another, and second current connections of the second transistor and the fourth transistor are connected to one another.

Abstract: Disclosed are integrated circuits having multiple electromagnetically emissive devices, such as LC oscillators. The devices are formed on an integrated circuit substrate and are given different planar orientations from each other. Particular integrated circuit packages disclosed are “flip-chip” packages, in which solder bumps are provided on the integrated circuit substrate for flipping and mounting of the finished integrated circuit upon a printed circuit board or other substrate. The solder bumps provide conductive connections between the integrated circuit and the substrate. The orientations and positioning of the emissive devices are such that one or more of the solder bumps are interposed between neighboring emissive devices to act as an electromagnetic shield between them.

Abstract: A method, an apparatus, and a computer program are provided to minimize filter capacitor leakage in a Phased Locked Loop (PLL). In high frequency processors and devices, filter leakage currents can cause substantial problems by causing PLLs to drift out of phase lock. To combat the leakage currents, a dummy filter and other components are employed to provide additional charge or voltage to a low pass filter during lock. The provision of the charge or voltage exponentially decreases the rate of decay of voltage across the low pass filter caused by leakage currents.

Abstract: The present invention includes a method and apparatus for measuring a parasitic inductance associated with a portion of an integrated circuit fabricated on a semiconductor substrate. A test chip for measuring the parasitic inductance is fabricated together with the integrated circuit on the semiconductor substrate. The test chip includes an LC oscillator circuit having at least one substructure that resembles the portion of the integrated circuit and at least one varactor having a capacitance adjustable by a control voltage. When the LC oscillator circuit is connected to the control voltage source and the control voltage is at a certain level, an oscillation is generated in the LC oscillator and the frequency of oscillation can be used to determine the parasitic inductance associated with the portion of the integrated circuit.

Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit shorts-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.

Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit shorts-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.

Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit short-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.

Abstract: A digitally tuned oscillator synthesizer having a correlator circuit and selectable voltage controlled oscillators is disclosed. The correlator circuit develops an accurate output which provides frequency stability for the synthesizer, whereas the voltage oscillators each operate over less than an octave of a desired RF frequency output, but cooperatively operate to produce RF outputs over a wide range of frequencies.

Abstract: A voltage-controlled oscillator has a structure that is very compact and prevents characteristic deterioration. The voltage-controlled oscillator includes a first resonant circuit resonating in a first frequency band, a second resonant circuit resonating in a second frequency band that is higher than the first frequency band, an oscillation circuit oscillating at a resonance frequency of each of the first and second resonant circuits, an amplifying circuit amplifying an oscillation signal transmitted from the oscillation circuit, a control terminal applying a control voltage to each of the first and second resonant circuits, a power-source terminal commonly connected to the oscillation circuit and the amplifying circuit, and an output terminal outputting a high frequency signal.

Abstract: A two-stage ring oscillator system that provides a phase shift of 90° in each of the two stages. Each stage includes an LC-based stage including a voltage controlled oscillator (VCO) and an in-line signal buffer that provides an additional controllable phase shift in the forward path and reduces loading capacitance of each LC-based stage by an estimated 10-50 percent. In-phase and quadrature output signals are provided by the system.

Abstract: Disclosed is an integrated voltage-controlled crystal oscillator intended to present the conditions for circuit constants in an oscillator circuit that can improve the oscillator's frequency tuning range with respect to the variable capacitance range of a variable-capacitance element. The voltage-controlled crystal oscillator comprises a crystal, an amplifier, and a load capacitor, wherein the load capacitor includes a voltage-controlled variable-capacitance element integrated on a semiconductor substrate and a DC cut capacitor element connected in series with the voltage-controlled variable-capacitance element, and the DC cut capacitor element has a capacitance value (Ccut) whose ratio to a maximum capacitance value (Cvmax) of the voltage-controlled variable-capacitance element (Ccut/Cvmax) is more than 0.5 and not more than 10.

Abstract: An electric potential of an epitaxial layer 2A provided under a bonding pad 5 to which a resonance circuit for a VCO is to be connected is fixed to a predetermined (Vcc) electric potential through a resistor 6 in a conventional floating state. Consequently, a speed of a change in the electric potential of the epitaxial layer 2A is increased and a value of a parasitic capacity is stabilized quickly. Consequently, a drift can be improved when a power supply is turned ON.

Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit shorts-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.

Abstract: The reduction of interfering influences in an LC resonant circuit with an integrated circuit is effected by including the interfering elements of the housing in the resonant circuit. This precludes the occurrence of parasitic radio-frequency oscillation modes. It also ensures good radio-frequency properties and a wide frequency tuning range.

Abstract: The present invention, generally speaking, provides a PLL that enables smooth switching of loop bandwidth without changing the loop filter. In accordance with one aspect of the invention, the loop bandwidth of a phase lock loop including an output frequency divider and a reference frequency divider is changed by changing a divisor of the output frequency divider by a factor and changing a divisor of the reference frequency divider by substantially the same factor. If the factor is greater than one, the loop bandwidth is decreased. If the factor is less than one, then the loop bandwidth is increased. In accordance with another aspect of the invention, a phase lock loop includes an oscillator having a control input, a phase comparator, a loop filter, and a feedback path including an output frequency divider. A reference frequency divider is also provided.

Abstract: A local oscillation circuit in a frequency converter circuit includes a resonant circuit, and a differential amplifier circuit connected to the resonant circuit. The differential amplifier circuit includes two transistors constituting a differential stage. One end of the resonant circuit is connected to the base of one transistor via a capacitive element, and to the collector of the other transistor via a capacitive element. The other end of the resonant circuit is connected to only the base of the other transistor via a capacitive element. Accordingly, an unbalanced oscillate operation is performed in the local oscillation circuit, leading to reduction of the phase noise caused by decrease in an oscillation output due to the trap phenomenon, and an improvement in reception quality.

Abstract: Phase noise in an RF oscillator is significantly reduced by loosely couping another quieter RF oscillator having noise patterns uncorrelated to the first RF oscillator so that it frequency locks with the first RF oscillator. The coupling is increased until a significant reduction in phase noise occurs at high coupling levels where the first RF oscillator displays phase noise similar to the the second RF oscillator.

Abstract: An oscillator comprises an active device with a phase shift of less than 180 degrees. A first delay line has first and second ends. The first end of the first delay line is coupled to an active port of the active device. A ring mode trap filter is coupled to the second end of the first delay line. A second delay line has first and second ends. The first end of the second delay line is coupled to the ring mode trap filter. The second end of the second delay line is coupled to a resonance means. The total delay of the first and second delay lines allows the resonance means to oscillate at its natural frequency in spite of the less-than-180-degree phase shift of the active device.

Abstract: A Voltage Controlled Oscillator (VCO) mitigates the effects of package parasitics by providing positive feedback connections, to sustain a desired oscillation, external to the IC package, thereby mitigating the effect of the bond wires and internal parasitics to allow the oscillation to be controlled by the desired external components. The VCO includes an electronic circuit with gain that is at least part of an integrated circuit (IC) and a package for the IC. A passive resonant circuit may be provided external to the IC package. The positive feedback of the electronic circuit is provided through at least one additional lead of the package, such that the connection is external to the package.

Abstract: A method (100) for tuning a voltage controlled oscillator by changing electrical circuit parasitics includes a first step (102) of providing a voltage controlled oscillator circuit on a circuit board and a plurality of different metal lids each having different numbers, sizes and locations of holes. Each different lid presents a different electrical circuit parasitic to the voltage controlled oscillator. In a second step (104), the voltage controlled oscillator frequency is measured, and the frequency shift needed to achieve a desired operating frequency is calculated in a third step (106). In a fourth step (108), a lid is chosen that will present the parasitics needed to provide the amount of frequency shift needed. As a last step (110), the chosen lid is attaching to the circuit board to obtain the desired nominal operating frequency from the voltage controlled oscillator.

Abstract: A phase detector responsive to a first signal having a carrier frequency and a second signal close to the carrier frequency, including a carrier suppression circuit which produces a carrier suppressed signal from the first and second signals, and a mixer responsive to the carrier suppressed signal and the carrier frequency to produce an output signal corresponding to the phase difference between the first and second signals.

Abstract: A low noise clock oscillator in modular form to plug into a standard 14 or 8 pin DIP clock oscillator socket on the motherboard of a host device to retrofit the host device without redesign of the host device motherboard so that the host device can reduce its EMC emissions sufficiently to pass EMC emission tests. The oscillator is characterized by use of a spread spectrum clock generator, EMC filters between the clock generator and the Vcc, ground and clock bus coupling points to the motherboard and a single point ground connection to the motherboard. This oscillator module allows an easy retrofit to a host device that has already been designed to substantially lower EMC emissions that can be traced to the clock by as much as 20 dB without expensive, time consuming redesign efforts to add shielding, more grounds and possibly reroute the motherboard traces.

Abstract: A driving circuit and a Self-oscillating circuit incorporating a piezoelectric oscillator having one terminal connected to ground. In the driving circuit, an alternating driving power is supplied to a first terminal of the piezoelectric oscillator, and the second terminal of the piezoelectric oscillator is connected to ground. The damping capacitance of the piezoelectric oscillator is effectively canceled by connecting the first terminal to an input of an amplifier, and forming a feedback loop by connecting an output of the amplifier to the input through a electrostatic capacitance whose value is 1/N times the damping capacitance of the piezoelectric oscillator, where the amplifier has a gain of (N+1).