With R.c. Ladder-type Phase Shift Network Patents (Class 331/137)
  • Patent number: 8120436
    Abstract: In one embodiment, a system for generating an oscillating signal includes a transconductance amplifier comprising a single-ended output and a differential input. The system also includes only one feedback loop coupled to the transconductance amplifier. The feedback loop includes a low pass filter configured to receive the output of the transconductance amplifier. Also, the feedback loop includes a high pass filter configured to receive the output of the first low pass filter and output a signal to only one terminal of the differential input of the transconductance amplifier.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: February 21, 2012
    Assignee: The Texas A&M University System
    Inventors: Sang Wook Park, Edgar Sánchez-Sinencio
  • Patent number: 8044734
    Abstract: Techniques for mitigating VCO pulling are described. In an aspect, VCO pulling may be mitigated by (i) injecting an oscillator signal, which is a version of a VCO signal from a VCO, into a transmitter and (ii) using coupling paths from the transmitter to the VCO to re-circulate the oscillator signal back to the VCO. In one design, an apparatus includes a VCO and a coupling circuit. The VCO generates a VCO signal at N times a desired output frequency. The coupling circuit receives an oscillator signal generated based on the VCO signal and injects the oscillator signal into a transmitter to mitigate pulling of the frequency of the VCO due to undesired coupling from the transmitter to the VCO. The apparatus may include a phase adjustment circuit that adjusts the phase of the oscillator signal and/or an amplitude adjustment circuit that adjusts the amplitude of the oscillator signal.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: October 25, 2011
    Assignee: QUALCOMM Incorporated
    Inventor: Mark Vernon Lane
  • Patent number: 7865163
    Abstract: A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: January 4, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Osamu Watanabe, Rui Ito, Shigehito Saigusa, Tetsuro Itakura
  • Patent number: 7825741
    Abstract: A method of generating an output signal from an input signal includes a step of generating a set of n signals, n being an integer greater than or equal to 3, by generating a signal for each integer i such that 0?i?(n?1), each signal within the set having the same frequency and approximately equal amplitude and a phase equal to (360/n)i degrees. The method also includes a step of inputting each of the set of n signals to a gate terminal of a corresponding one of a set of n transistors. Each of the transistors has a source terminal electrically connected to a common voltage drain and each of the transistors has a drain terminal electrically connected to a coupling. The coupling is electrically connected to a common voltage source. The output signal at the coupling has a frequency equal to the frequency of the input signal multiplied by n.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: November 2, 2010
    Assignee: International Business Machines Corporation
    Inventors: Scott Kevin Reynolds, Mehmet Soyuer, Chinmaya Mishra
  • Publication number: 20100264996
    Abstract: Nth-order voltage- and current-mode arbitrary phase shift oscillator structures are synthesized using n operational trans-conductance amplifiers (OTAs) or second-generation current controlled conveyors (CCCIIs) and n grounded capacitors. Linking up the I/O characteristics of the OTA and the CCCII and the reactance of grounded capacitor, the step of synthesis is first based on the algebraic analysis to oscillatory characteristic equations, resulting in a quadrature oscillator structure. Secondly, instead of the quadrature characteristic, to control each output signal with one another by a desired phase difference > or <90°, selectively superposing any of two fundamental OTA/CCCII-C sub-circuitries benefits the transformation of quadrature to arbitrary-phase-shift characteristic for the sinusoidal oscillator structure. Furthermore, several compensation schemes are presented for reducing the output parameter deviation due to the non-ideal effects.
    Type: Application
    Filed: April 13, 2010
    Publication date: October 21, 2010
    Inventors: Chun-Ming Chang, Shu-Hui Tu
  • Patent number: 7583948
    Abstract: A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: September 1, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Osamu Watanabe, Rui Ito, Shigehito Saigusa, Tetsuro Itakura
  • Patent number: 7397317
    Abstract: A quadrature signal generator capable of phase-tuning with respect to all of four generated quadrature signals. The quadrature signal generator includes four phase tuning units each having two input terminals, one receiving a differential signal, the other being grounded, and changing a phase of the differential signal to thereby generate quadrature signals. Accordingly, it is possible to tune phases of all the four generated quadrature signals. It is also possible to prevent the amplitude of quadrature signals from being deviated from a reference value.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: July 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-chul Park, Chun-deok Suh, Choong-yul Cha
  • Patent number: 7205857
    Abstract: An oscillator that provides a quadrature output and has a cross-coupled configuration is disclosed. The oscillator generates an output signal having a frequency. Two phase shift circuits, or stages, are activated by a control signal to provide phase shifts within the oscillator. Each phase shift circuit includes poles to provide the phase shift. A pole includes a varactor to tune, adjust or vary the phase shift accordingly.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: April 17, 2007
    Assignee: Broadcom Corporation
    Inventor: Hung-Ming Chien
  • Patent number: 7199676
    Abstract: A frequency adjustment circuit that maintains a target frequency even when frequency adjustment data of zapping circuit is changed by an external noise is offered. The frequency adjustment circuit includes a reset signal generation circuit, a frequency adjustment data latch circuit that latches and retains the frequency adjustment data ZP1 and ZP2 generated by a first zapping circuit and a second zapping circuit based on a latch clock ZCLK and a latch clock generation circuit that generates the latch clock ZCLK. The reset signal generation circuit generates a periodic reset signal ZRES that is synchronized with a rise of an enable signal EN generated from an interface circuit. The latch clock generation circuit generates the latch clock ZCLK that is synchronized with a fall of the enable signal EN.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: April 3, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tetsuya Tokunaga, Hiroyuki Arai, Takeshi Kimura, Ryouichi Ando, Mamoru Yamaguchi
  • Patent number: 7142596
    Abstract: Methods, apparatuses, and systems are presented for performing channel equalization involving receiving a signal from a channel associated with inter-s interference (ISI), providing the received signal to an inductor, capacitor, resistance (LCR) network comprising a plurality of inductors and a plurality of capacitors, generating in the LCR network a first plurality of intermediate signals representing voltages associated with capacitors in the LCR network and a second plurality of intermediate signals representing currents associated with inductors in the LCR network, wherein the first plurality and second plurality of intermediate signals correspond to application of linearly independent impulse responses to the received signal, applying a corresponding one of a plurality of multiplier factors to each of the first plurality and second plurality of intermediate signals, and generating from the LCR network a resulting signal corresponding to an equalized version of the received signal.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: November 28, 2006
    Assignees: Vitesse Semiconductor Corporation, Indian Institute of Technology
    Inventor: Shanthi Pavan
  • Patent number: 6995625
    Abstract: An oscillator that provides a quadrature output and has a cross-coupled configuration is disclosed. The oscillator generates an output signal having a frequency. Two phase shift circuits, or stages, are activated by a control signal to provide phase shifts within the oscillator. Each phase shift circuit includes poles to provide the phase shift. A pole includes a varactor to tune, adjust or vary the phase shift accordingly.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: February 7, 2006
    Assignee: Broadcom Corporation
    Inventor: Hung-Ming Chien
  • Patent number: 6882235
    Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: April 19, 2005
    Assignee: Broadcom Corporation
    Inventors: Mike Kappes, Terje Gloerstad
  • Patent number: 6768364
    Abstract: A quadrature signal generator includes a polyphase filter where four resistive elements and four variable capacitive elements are connected alternately in series to form a loop; and a phase corrector that variably controls the capacitance of the variable capacitive elements.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: July 27, 2004
    Assignee: Berkana Wireless, Inc.
    Inventor: Sung-ho Wang
  • Patent number: 6639479
    Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: October 28, 2003
    Assignee: Broadcom Corporation
    Inventors: Mike Kappes, Terje Gloerstad
  • Patent number: 6590464
    Abstract: A resistor-capacitor oscillator for receiving a current source, comprising a first switch path and a second switch path that are symmetric and connected in parallel. The first switch path comprises a signal output terminal and a first voltage output terminal. The second switch path comprises a complementary signal output terminal and the second voltage output terminal. One of these two voltage output terminals is selected randomly and input to both the first comparator and the second comparator simultaneously. The first comparator further receives a {fraction (1/2 )} VBG voltage, and the second comparator further receives 2VBG voltage. The first comparator outputs to a PMOS transistor, and the second comparator outputs to an NMOS transistor. The PMOS transistor is in series with the NMOS transistor, and is jointly coupled in between the system power supply and the ground voltage. Moreover, a latch and an inverter are serially coupled to the location of the serial junction node of these two transistors.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: July 8, 2003
    Assignee: Faraday Technology Corp.
    Inventors: Yu-Tong Lin, Wen-Cheng Yen
  • Patent number: 5982248
    Abstract: An integrated circuit configuration for producing a clock signal includes an integrated inverter connected between an input terminal and an output terminal. A crystal is externally connected to the oscillator circuit. A feedback path of the inverter contains a phase-shifting element which effects a phase shift through 180.degree., so that conditions for oscillation continue to be provided if the crystal breaks.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: November 9, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventor: Wolfgang Wagner
  • Patent number: 5610560
    Abstract: A phase-locked-loop circuit includes an oscillator having switched capacitors that are selectively coupled to a positive feedback path of the oscillator in a coarse frequency error correction mode of operation. When the frequency error is small, the circuit operates in a fine error correction mode without varying the selection of the switched reactive elements.
    Type: Grant
    Filed: December 11, 1995
    Date of Patent: March 11, 1997
    Assignee: RCA Thomson Licensing Corporation
    Inventors: Donald J. Sauer, William E. Rodda, Edward R. Campbell, III
  • Patent number: 5459438
    Abstract: This invention relates to oscillators employing a primary feedback network and a high pass filter feedback network. The feedback networks are connected between the input and output of a of a high signal gain amplifier system. The primary feedback network provides positive feedback to cause oscillation to occur and also determines the nominal frequency of oscillation. The high pass filter feedback network provides a negative feedback signal that controls the rise and fall time of the amplifier system's output signal. By varying the output signal's rise and fall time the frequency of oscillation is also changed. The high signal gain amplifier system operates with one or more amplifier stages in the non-linear region to produce a significantly distorted sine wave or pulse output signal.
    Type: Grant
    Filed: December 16, 1992
    Date of Patent: October 17, 1995
    Inventor: Fred Mirow
  • Patent number: 4145670
    Abstract: This invention deals with significant innovations on multiphase signal oscillators including quadrature oscillators for the use in frequency shifters, or sequential gating devices for special multichannel sound effects, or three-phase power sources or other electronic apparatus.
    Type: Grant
    Filed: July 5, 1977
    Date of Patent: March 20, 1979
    Inventor: Harald E. W. Bode
  • Patent number: 3983512
    Abstract: A resonant circuit is provided with a number of phase shift circuits connected in series. A control circuit is connected in series with the phase shift circuits for controlling the direct current flowing through the circuits. One of the phase shift circuits is constructed of a pair of transistors interconnected by a capacitor. The emitter resistance of the transistors is determined by the direct currents flowing therethrough from the control circuit, whereupon the frequency of oscillation or resonance of the resonant circuit is dependant upon the emitter resistance.
    Type: Grant
    Filed: August 22, 1975
    Date of Patent: September 28, 1976
    Assignee: Feedback Instruments Limited
    Inventor: William Mark Lipscombe