Electrical Noise Or Random Wave Generator Patents (Class 331/78)
  • Patent number: 9720650
    Abstract: A method and an assemblage for post-processing an output of a random source of a random generator are presented. In the method, an output signal of the random source is compressed, thereby yielding a sequence of compressed signal values that are checked in terms of their distribution.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: August 1, 2017
    Assignee: Robert Bosch GmbH
    Inventors: Matthew Lewis, Eberhard Boehl
  • Patent number: 9673917
    Abstract: A method calibrates a spread spectrum receiver having a received signal strength below a noise floor. The method includes estimating an input noise power, and measuring a noise power output from the receiver. The method also includes comparing the estimated input noise power with the measured output noise power to determine at least one calibration value. The method further includes calibrating the receiver based upon the at least one calibration value.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: June 6, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Cormac S. Conroy, Leonid Sheynblat, Anup Savla, Roger Brockenbrough
  • Patent number: 9645793
    Abstract: According to one embodiment, a permutation generator is described comprising a memory configured to store, for each number of a predetermined set of numbers, whether the number has already been included in a number sequence; a receiver configured to receive a random number; a determiner configured to select a number from those numbers of the set of numbers that have not yet been included in the number sequence as next element of the number sequence based on the random number and an output configured to output the selected number as the next element of the number sequence.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: May 9, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventor: Tomaz Felicijan
  • Patent number: 9626772
    Abstract: A method and a signal processor for receiving a data stream comprising at least two distinct sets of encoded data, at least one set of which is relative to transient/stochastic components of a signal. Based at least in part on the distinct sets of encoded data, the signal processor decodes and reconstructs a corresponding rendition of signal for each set of the encoded data. The distinct sets of renditions of signal are then combined into a single rendition of reconstructed signal.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: April 18, 2017
    Assignee: V-Nova International Limited
    Inventors: Luca Rossato, Guido Meardi
  • Patent number: 9619206
    Abstract: The present invention discloses a pseudo-random bit sequence (PRBS) generator which outputs the entire datapath, or entire pseudo-random bit sequence, over one single clock cycle. This is accomplished by removing redundancy, or any redundant exclusive-or gates from linear feedback shift registers; using logic to identify the critical path and optimal shift for the critical path; and dividing the datapath into several pipeline stages to increase the clock rate (i.e., transmission speed).
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: April 11, 2017
    Assignee: Altera Corporation
    Inventor: Junjie Yan
  • Patent number: 9564114
    Abstract: An electronic musical instrument is provided with a voice sensor for detecting a voice uttered by a user, when the user blows into the musical instrument with a voice, a breath sensor for detecting at least one of a blow pressure and a blow volume in a body of the musical instrument, when the user blows into the musical instrument with a voice, and a musical tone controlling unit for controlling generation of a musical tone based on at least one of outputs of the voice sensor and the breath sensor.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: February 7, 2017
    Assignee: CASIO COMPUTER CO., LTD.
    Inventor: Tetsuichi Nakae
  • Patent number: 9565231
    Abstract: Systems and methods are described for providing multiple voice service modes to a wireless device using data packet transmission through a wireless network. Application requirements including a signal level threshold for a wireless device may be determined. Signal level information for the wireless device may be received and transmitted among various network nodes. The received signal level may be compared with the signal level threshold for the wireless device. The wireless device and the access node may communicate wirelessly to provide voice services to the wireless device application. Data transmission may be converted between a first mode and a second mode depending upon a relative position of the received signal level with respect to the signal level threshold. The second mode of data transmission may be used where the first mode of data transmission cannot because the second mode may consume less network resources.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: February 7, 2017
    Assignee: Sprint Spectrum L.P.
    Inventors: Muhammad Ahsan Naim, Yu Zhou
  • Patent number: 9544139
    Abstract: A hardware-based digital random number generator is provided. In one embodiment, a processor includes a digital random number generator (DRNG) to condition entropy data provided by an entropy source, to generate a plurality of deterministic random bit (DRB) strings, and to generate a plurality of nondeterministic random bit (NRB) strings, and an execution unit coupled to the DRNG, in response to a first instruction to read a seed value, to retrieve one of the NRB strings from the DRNG and to store the NRB string in a destination register specified by the first instruction.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: January 10, 2017
    Assignee: Intel Corporation
    Inventors: George W. Cox, David Johnston, Martin G. Dixon, Stephen A. Fischer, Jason W. Brandt
  • Patent number: 9531349
    Abstract: An apparatus includes a controller configured to be coupled to a system clock that generates a clock signal for a device that generates radiated electromagnetic interference (RE). The controller is also configured to determine a frequency span associated with the system clock, where the frequency span has a minimum frequency and a maximum frequency. The controller is further configured to determine a sequence of frequency steps, where each frequency step is associated with a distinct frequency within the frequency span. In addition, the controller is configured to control the system clock to change a frequency of the clock signal through the sequence of frequency steps in order to reduce the RE generated at or by the device. In some embodiments, the frequency steps are interleaved across the frequency span to avoid large frequency jumps. In some embodiments, the frequency step duration is optimally selected to reduce quasi peak values.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: December 27, 2016
    Assignee: Honeywell International Inc.
    Inventor: Alok Kumar Pugalia
  • Patent number: 9513872
    Abstract: A system is described for generating random numbers. The system may include a plurality of information sources and one or more sampling devices coupled to each of the information sources. Each information source may have a characteristic which may differ from the characteristic of any other information source. The sampling devices may sample the information sources at some sampling interval. A sample value may be captured from each of the information sources by the sampling devices coupled thereto at the sampling interval. An output representative of a substantially random number may be derived from the sample values captured at the sampling interval.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: December 6, 2016
    Assignee: ACLARA TECHNOLOGIES LLC
    Inventors: Glenn A. Emelko, Gregory B. Gillooly
  • Patent number: 9432079
    Abstract: Various embodiments of the invention are directed to frequency hopped frequency modulation spread spectrum (FHFMSS) multiple accessing systems and methods. For example, various embodiments of the FHFMSS transmitter may utilize an architecture comprised of a baseband modulation subsystem, a code generation subsystem for generating a multiplicity M code vector sequences, a frequency synthesizer for generating a multiplicity M periodic waveforms, a frequency modulator for generation of a frequency hopped frequency modulation (FHFM) waveform , and a spread spectrum modulator. Various embodiments of the FHFMSS receiver may comprise of a subsystem for generation of the FHFM waveform, a spread spectrum demodulator, a symbol detector, and a baseband demodulation subsystem.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: August 30, 2016
    Inventor: Rajendra Kumar
  • Patent number: 9374224
    Abstract: A system and associated methods for encrypting data are disclosed. In at least one embodiment, a key manager is located in memory on an at least one computing device and configured for creating and managing an at least one encryption key to be used for encrypting the data. An at least one key file is also located in memory on the at least one computing device and is associated with an at least one authorized user. The key file contains a key field comprising a pseudo random string of bytes and a unique hash value used to associate the key file to the user. A set of base characters are randomly selected from the key field, such that the base characters are a subset of the key field. An encryption key is generated by inputting the base characters into an encryption algorithm. The data is encrypted using the encryption key.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: June 21, 2016
    Assignee: RISOFTDEV, INC.
    Inventor: Vincent Logan Gilbert
  • Patent number: 9207693
    Abstract: A method and device for compensating PVT (process, voltage temperature) variations are disclosed. In some embodiments an integrated circuit includes a buffer circuit and a PVT (process, temperature, voltage) compensation circuit configured to compensate a PVT variation of the buffer circuit, wherein the PVT compensation circuit includes adders and subtractors.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: December 8, 2015
    Assignee: Infineon Technologies AG
    Inventor: Hee Yeng Tan
  • Patent number: 9018993
    Abstract: A self-feedback random generator comprises a digital-to-analog converter, a digital oscillator, a frequency-modulating unit and a first D-type flip-flop. The digital-to-analog converter receives a digital random-code signal and the digital random-code signal is converted to corresponding analog random signal. The frequency-modulating unit modulates frequency of first digital oscillating signal so as to increase random of frequency of first digital oscillating signal according to voltage value of the analog random signal, and accordingly outputs a second digital oscillating signal.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: April 28, 2015
    Assignee: Storart Technology Co., Ltd.
    Inventor: Chih-Nan Yen
  • Patent number: 8981858
    Abstract: An apparatus includes a selection device to select a spreading profile from a plurality of spreading profiles, and an oscillation device to generate clock signals having different frequencies over time based on the selected spreading profile. A method includes selecting a spreading profile from a plurality of spreading profiles, and generating clock signals having different frequencies over time based on the selected spreading profile.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: March 17, 2015
    Assignee: Cypress Semiconductor Corporation
    Inventors: David G Wright, Timothy Williams, Edward L. Grivna, Mohandas Palatholmana Sivadasan
  • Patent number: 8975975
    Abstract: According to some embodiments, a method and apparatus are provided to vary a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, and vary the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: March 10, 2015
    Assignee: Intel Corporation
    Inventors: Gerhard Schrom, William Dawson Kesling, Alexander Lalexan Lyakhov, Maynard C. Falconer, Harry G. Skinner
  • Patent number: 8841974
    Abstract: A method and apparatus is disclosed herein for testing of multiple ring oscillators. In one embodiment, the apparatus comprises at least one ring oscillator structure having a ring oscillator having an inverter chain with an odd number of inverters connected back-to-back and operable to produce an oscillatory output, and a test structure coupled to provide either an observability chain input or a test input to the ring oscillator and to receive the oscillatory output as a feedback from the ring oscillator.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: September 23, 2014
    Assignee: Silicon Image, Inc.
    Inventors: Chinsong Sul, Hyukyong Kwon, Andy Ng
  • Patent number: 8823459
    Abstract: Apparatus and methods for distributing spurious tones through the frequency domain are disclosed. One such apparatus can include a dithering circuit configured to generate a sequence of numbers that exhibit statistical randomness and a variable frequency circuit configured to adjust a frequency of an output based on the sequence of numbers so as to spread energy of spurious tones in a frequency response of the output to lower a noise floor. In one example, spurious tones can be reduced in a negative voltage generator of a radio frequency (RF) attenuator.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: September 2, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Thomas Obkircher, William J. Domino, Bipul Agarwal
  • Patent number: 8816788
    Abstract: A frequency generator with frequency jitter is disclosed. The frequency generator comprises a capacitor, a comparing unit, a charging and discharging unit, a delay unit, and a charging and discharging switch unit. The comparing unit is coupled to the capacitor and generates a charging and discharging control signal according to a voltage of the capacitor. The charging and discharging unit is coupled to the capacitor. The delay unit is coupled to the comparing unit and receives a delay signal. The delay unit delays the charging and discharging control signal according to the delay signal to generate a charging and discharging delay signal. The charging and discharging switch unit is coupled to the charging and discharging unit and the delay unit, and charges or discharges the capacitor according to the charging and discharging delay signal.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: August 26, 2014
    Assignee: Analog Vision Technology Inc.
    Inventor: Tzong-Honge Shieh
  • Patent number: 8810298
    Abstract: Circuits and circuit elements configured to generate a random delay, a monostable oscillator, circuits configured to broadcasting repetitive messages wireless systems, and methods for forming such circuits, devices, and systems are disclosed. The present invention advantageously provides relatively low cost delay generating circuitry based on TFT technology in wireless electronics applications, particularly in RFID applications. Such novel, technically simplified, low cost TFT-based delay generating circuitry enables novel wireless circuits, devices and systems, and methods for producing such circuits, devices and systems.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: August 19, 2014
    Assignee: Thin Film Electronics ASA
    Inventors: Vivek Subramanian, Mingming Mao, Zhigang Wang
  • Patent number: 8766732
    Abstract: There is provided a multi-screw chaotic oscillator circuit with simple configuration, that can use various multi-hysteresis VCCS characteristics and generate a variety of multi-screw attractors. The multi-screw chaotic oscillator circuit comprises: a linear two-port VCCS circuit 1 consisting of a set of linear VCCS circuits G1 and G2; a multi-hysteresis two-port VCCS circuit 2 consisting of a set of multi-hysteresis VCCS circuits MH1 and MH2 having multi-hysteresis characteristic; and capacitors C1 and C2 connected to each end of a circuit configured by parallel-connecting the linear two-port VCCS circuit 1 and the multi-hysteresis two-port VCCS circuit 2.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: July 1, 2014
    Assignee: Japan Science and Technology Agency
    Inventors: Yoshihiko Horio, Takuya Hamada, Kenya Jinno, Kazuyuki Aihara
  • Patent number: 8717110
    Abstract: A frequency-jittering apparatuses includes an oscillator and a frequency control circuit. The oscillator generates a signal. When the magnitude of the signal exceeds a magnitude of a reference signal, the oscillator operates substantially in a first state; and when the magnitude of the signal is lower than the magnitude of the reference signal, the oscillator operates substantially in a second state different from the first one. The frequency control circuit varies the reference signal to change the frequency of the signal output from the oscillator.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: May 6, 2014
    Assignee: Leadtrend Technology Corp.
    Inventors: Wen-Chung Yeh, Yi-Lun Shen
  • Publication number: 20140028404
    Abstract: Provided is a random number generating device capable of generating highly irregular random numbers with a simple configuration. The random number generating device includes: a receiving unit including a receiving mechanism configured to receive, in a contactless manner, energy transmitted from a transmitting unit, the receiving unit being configured to convert the energy received by the receiving mechanism into a reception voltage; a voltage controlled oscillator configured to output an oscillating output signal based on the reception voltage; and a pseudorandom number generator configured to generate pseudorandom numbers varying in accordance with an oscillation frequency of the output signal from the voltage controlled oscillator.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 30, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Hideyuki KIHARA, Kazuyo OHTA
  • Patent number: 8638928
    Abstract: A key exchanging apparatus transmits the contribution data to the plurality of counterpart apparatuses, generates a signer contribution confirmation signature with respect to a contribution data set including all the contribution data received from the plurality of counterpart apparatuses, generates auxiliary data and auxiliary data validity certification sentence from the contribution data set and the contribution random number, transmits the auxiliary data, the auxiliary data validity certification sentence and the contribution confirmation signature to the plurality of counterpart apparatuses, verifies validity of auxiliary data by using the counterpart identifier set, the counterpart public key set, the contribution confirmation signature set including the data received from the plurality of counterpart apparatuses, the auxiliary data set and the auxiliary data validity certification sentence set, and generates a public key from the contribution data set and the auxiliary data received from the plurality
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: January 28, 2014
    Assignee: NEC Corporation
    Inventors: Jun Furukawa, Frederik Armknecht, Joao Girao
  • Patent number: 8618887
    Abstract: A spread spectrum oscillator includes a high frequency oscillator circuit configured to oscillate at a first frequency, and a low frequency oscillator circuit configured to oscillate at a second frequency and resistively coupled to a current summing node of the high frequency oscillator circuit. The first frequency is higher than the second frequency.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: December 31, 2013
    Assignee: Hamilton Sundstrand Corporation
    Inventor: John A. Dickey
  • Patent number: 8593228
    Abstract: Spread spectrum clock generators and electronic devices including the same are provided. An electronic device may include a memory and a first circuit block configured to output a first spread spectrum clock signal and a first address for accessing the memory. The electronic device may include a second circuit block configured to operate in response to a second spread spectrum clock signal, and configured to output a second address for accessing the memory. The electronic device may include a spread spectrum clock signal generator configured to receive the first spread spectrum clock signal to generate the second spread spectrum clock signal. The memory may be configured to compare the first and second addresses to each other to output a clock generator control signal corresponding to a difference between the first and second addresses.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: November 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bong-Jin Kim, DongUk Park, Jongshin Shin
  • Patent number: 8583711
    Abstract: A random number generation system comprising one or more ring oscillators configured to generate entropy due to accumulated phase drift. A random number generator can include a ring oscillator configured to switch between a first state in which a signal of the ring oscillator oscillates between logic levels, and a second state in which the signal at least partially settles to one of the logic levels. The random number generator can also include a counter configured to measure a count of pulses of the signal and a whitener mechanism configured to receive the signal from the ring oscillator, latch a logic level of the signal from the ring oscillator, latch the count of pulses from the counter, and generate a random number based on the logic level and the count of pulses. Corresponding methods may also be performed.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: November 12, 2013
    Assignee: Seagate Technology LLC
    Inventor: Laszlo Hars
  • Patent number: 8542071
    Abstract: Chaotic oscillator-based random number generation is described. In an example, a circuit includes a negative differential resistance (NDR) device to receive an alternating current (AC) bias. The circuit further includes a capacitance in parallel with the NDR device, the capacitance having a value such that, in response to a direct current (DC) bias applied to the NDR device and the capacitance, a voltage across the capacitance oscillates with a chaotic period. The circuit further includes a random number generator to generate random numbers using samples of the voltage across the capacitance.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: September 24, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Matthew D Pickett, Gilberto Medeiros Ribeiro, R Stanley Williams
  • Patent number: 8531247
    Abstract: A device (1) for generating a random bit sequence has a digital ring oscillator circuit (2) having at least one first feedback path (R8) and one second feedback path (R14). To this end, a changeover is performed between the feedback paths (R8, R14) at times which can be predetermined, and a random signal (OS) having a random level history can be tapped at an output node (4) of the ring oscillator circuit (2).
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: September 10, 2013
    Assignee: Siemens Aktiengesellschaft
    Inventor: Markus Dichtl
  • Patent number: 8519798
    Abstract: Embodiments of the invention relate to apparatus and method for reducing electromagnetic interference (EMI) and radio frequency interference (RFI) in computer systems via a chaotic frequency modulation. In one embodiment, an apparatus comprises a first cell comprising a chaotic signal generator to generate a chaotic signal and a phase-locked loop (PLL) to generate a modulated output signal based at least on an un-modulated reference signal and the chaotic signal.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: August 27, 2013
    Assignee: Intel Corporation
    Inventors: Ruchir Saraswat, Ulrich Bretthauer
  • Publication number: 20130169370
    Abstract: An oscillator generates a clock signal according to a voltage, a current and a capacitance, and a frequency jitter circuit and method use a random number to modulate the voltage, the current or the capacitance, or a count value to modulate the capacitance, to jitter the frequency of the clock signal.
    Type: Application
    Filed: February 21, 2013
    Publication date: July 4, 2013
    Applicant: RICHTEK TECHNOLOGY CORP.
    Inventor: RICHTEK TECHNOLOGY CORP.
  • Publication number: 20130162359
    Abstract: An oscillator generates a clock signal according to a voltage, a current and a capacitance, and a frequency jitter circuit and method use a random number to modulate the voltage, the current or the capacitance, or a count value to modulate the capacitance, to jitter the frequency of the clock signal.
    Type: Application
    Filed: February 21, 2013
    Publication date: June 27, 2013
    Applicant: RICHTEK TECHNOLOGY CORP.
    Inventor: RICHTEK TECHNOLOGY CORP.
  • Publication number: 20130099872
    Abstract: Chaotic oscillator-based random number generation is described. In an example, a circuit includes a negative differential resistance (NDR) device to receive an alternating current (AC) bias. The circuit further includes a capacitance in parallel with the NDR device, the capacitance having a value such that, in response to a direct current (DC) bias applied to the NDR device and the capacitance, a voltage across the capacitance oscillates with a chaotic period. The circuit further includes a random number generator to generate random numbers using samples of the voltage across the capacitance.
    Type: Application
    Filed: October 25, 2011
    Publication date: April 25, 2013
    Inventors: Matthew D. Pickett, Gilberto Medeiros Ribeiro, R. Stanley Williams
  • Patent number: 8423297
    Abstract: Mental influence detectors and corresponding methods are useful for detecting an influence of mind and hidden or classically non-inferable information. An anomalous effect detector includes a source of non-deterministic random numbers, a converter to convert a property of numbers, a processor to accept converter output and to produce an output signal representative of an influence of mind. The processor output signal contains fewer numbers than the input. A quantum computer includes a physical source of entropy to generate output numbers; a source of test numbers; a measurement processor to accept output numbers and to measure a relationship between process numbers and at least one test number to produce an output representative of an influence of mind.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: April 16, 2013
    Assignee: Psigenics Corporation
    Inventor: Scott A. Wilber
  • Patent number: 8421544
    Abstract: The embodiments of the invention relate to apparatus and method for reducing electromagnetic interference (EMI) and radio frequency interference (RFI) in computer systems via a chaotic wide band frequency modulation. The chaotic noise modulator, in one embodiment, comprises: a master cell to generate a control voltage corresponding to an un-modulated reference signal; and a slave cell having a chaotic signal generator to generate a random noise signal, the slave cell coupled with the master cell and operable to generate a modulated output signal in response to the control voltage.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: April 16, 2013
    Assignee: Intel Corporation
    Inventors: Ruchir Saraswat, Andriy Gelman, Ulrich Bretthauer, Sunil Parmar, Rajashekar Manche, Chodimella Venkata Ramana, Shivraj G. Dharne
  • Patent number: 8410857
    Abstract: An apparatus for generating a random bit sequence has a ring oscillator which includes inverting digital devices and on which an oscillator signal can be tapped. An intermediate storage element monitors and stores fluctuating levels of the oscillator signal. At least two controllable switch devices for simultaneously exciting at least two harmonic wave edges of the ring oscillator are provided in a signal path of the ring oscillator. The phasing of the two harmonic wave edges and a potential convergence thereof are subject to statistical fluctuations, which are used as a basis for the random bit generation. A corresponding random number generator can be used in particular as an FPGA for security applications, such as cryptographic methods. The apparatus has substantially digital components, which are easy to produce in a standardized manner. A dedicated regulating circuit is not necessary. The apparatus is also robust toward exterior influences.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: April 2, 2013
    Assignee: Siemens Aktiengesellschaft
    Inventors: Markus Dichtl, Bernd Meyer
  • Patent number: 8405464
    Abstract: An electronic device controlling a frequency modulation index has a frequency modulation index control loop having an input adapted to be connected to a frequency output of a frequency controllable oscillator. The oscillator has a center frequency Fc and an output adapted to be connected to an input of a frequency-modulation unit, the modulation index control loop being adapted to determine the modulation index. Further provided is a method of frequency-modulating with a modulation frequency Fm a non-linear controllable oscillator having a center frequency Fc with a constant modulation index.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: March 26, 2013
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Neil Gibson, Michael Couleur
  • Patent number: 8400230
    Abstract: In an electronic system, a frequency modulator manages clock signals for electromagnetic interference (EMI) reduction. The illustrative frequency modulator comprises a core oscillator, and a clock divider coupled to the core oscillator that modulates frequency of the core oscillator and deterministically spreads clock spectral components of a digital clock signal whereby electromagnetic interference (EMI) is reduced. The frequency modulator further comprises a circuit coupled to the clock divider that receives the digital clock signal, combines the digital clock signal with a data bitstream for transmission across an isolation barrier, and resynchronizes to the digital clock signal.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: March 19, 2013
    Assignee: Akros Silicon Inc.
    Inventors: Philip John Crawley, Kenneth William Taylor
  • Patent number: 8350628
    Abstract: A computing device is disclosed comprising digital circuitry including a critical path circuit, and a gate speed regulator. A ring oscillator generates an oscillation frequency, and dither circuitry periodically adjusts a number of inverter elements in the ring oscillator in order to adjust an average propagation delay of the ring oscillator relative to a propagation delay of the critical path circuit. A comparator compares the oscillation frequency to a reference frequency to generate an error signal, and an adjustable circuit, responsive to the error signal, adjusts at least one of a supply voltage and a clocking frequency applied to the digital circuitry.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: January 8, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventor: George J. Bennett
  • Patent number: 8269565
    Abstract: Spread spectrum clock generators and electronic devices including the same are provided. A spread spectrum clock generator may include an oscillation circuit that is configured to receive a first spread spectrum clock signal and to output an average frequency signal corresponding to an average frequency of the first spread spectrum clock signal. The spread spectrum clock generator may also include a phase lock loop that is configured to receive the average frequency signal and to generate a second spread spectrum clock signal. The spread spectrum clock generator may further include a control circuit that is configured to receive the first and second spread spectrum clock signals and to output a phase lock loop control signal to control the phase lock loop such that an average frequency of the second spread spectrum clock signal approaches the average frequency of the first spread spectrum clock signal.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: September 18, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bong-Jin Kim, DongUk Park, Jongshin Shin
  • Patent number: 8253502
    Abstract: A spread spectrum clock generator includes a voltage-controlled oscillator generating an operation clock, a feedback control unit, a modulated pulse generation unit generating a pulse signal obtained by performing a delta-sigma modulation on a component fluctuating a frequency of the operation clock, a level set unit setting an amplitude of the pulse signal, an adder adding a voltage generated by the feedback control unit and the pulse signal whose amplitude is set by the level set unit, and a low pass filter filtering a signal outputted from the adder and generating a control voltage applied to the voltage-controlled oscillator. The feedback control unit compares a phase of the operation clock with a phase of a reference clock, and based on results of the comparison, generates a voltage used as a reference to oscillate the voltage-controlled oscillator.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: August 28, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Yoshinori Kanda
  • Patent number: 8188798
    Abstract: A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: May 29, 2012
    Assignee: Hong Kong Applied Science and Technology Research Institute Company, Ltd.
    Inventors: Chi Tak (Gerry) Leung, Chik Wai (David) Ng, Hing Kit Kwan, Wai Kit (Victor) So, Po Wah (Patrick) Chang, Wing Cheong Mak, Kwok Kuen (David) Kwong
  • Patent number: 8159280
    Abstract: A noise generator for generating band-limited noise from a plurality of sinusoidal signals at the same level and equidistant frequency position in the noise spectrum is provided. A noise signal has a low crest factor and for this purpose the phase position of each individual sinusoidal signal is determined.
    Type: Grant
    Filed: January 11, 2010
    Date of Patent: April 17, 2012
    Assignee: Siemens AG Oesterreich
    Inventors: Leopold Appel, Hermann Danzer, Andreas Hofmann
  • Patent number: 8143959
    Abstract: A jitter generation apparatus for applying a phase modulation to a PLL is controlled by a control unit so as to output a signal with the desired jitter based on a parameters. When a switching unit is switched to a first state, the control unit controls first and second level control units so that the desired jitter in which an amplitude of a first modulation signal matches the parameter is added to an output signal from a voltage controlled oscillator unit, and passes through a quadrature modulator. When the switching unit is switched to the second state, the control unit controls the first and second level control units so that a quadrature modulation is applied to a local signal, which is input to the quadrature modulator without adding any jitter to an output signal from the voltage controlled oscillator unit, and a quadrature-modulated local signal is output.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: March 27, 2012
    Assignee: Anritsu Corporation
    Inventors: Katsuyuki Yaginuma, Tadanori Nishikobara
  • Publication number: 20120056683
    Abstract: An oscillator generates a clock signal according to a voltage, a current and a capacitance, and a frequency jitter circuit and method use a random number to modulate the voltage, the current or the capacitance, or a count value to modulate the capacitance, to jitter the frequency of the clock signal.
    Type: Application
    Filed: August 30, 2011
    Publication date: March 8, 2012
    Applicant: RICHTEK TECHNOLOGY CORP.
    Inventors: CHIEN-FU TANG, ISAAC Y. CHEN
  • Patent number: 8130955
    Abstract: Systems and/or methods that facilitate security of data are presented. A random number generation component generates random numbers based in part on electron activity in a select memory cell(s) to facilitate data security. Sensor components that are highly sensitive can be employed to sense activity of the select memory cell(s) and/or reference memory cell in a noise margin associated with respective memory cells in the memory component. The activity of the select memory cell is compared to the reference memory cell(s) to facilitate generating binary data. The binary data is provided to the random number generation component where the binary data is evaluated to determine whether a predetermined level of entropy exists in the binary data. The binary data, or a portion thereof, can be processed to generate random numbers that are utilized in cryptographic processes and/or as a physical signature to facilitate data security.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: March 6, 2012
    Assignee: Spansion LLC
    Inventors: Elena Trichina, Helena Handschuh
  • Publication number: 20120019329
    Abstract: A frequency-jittering apparatuses includes an oscillator and a frequency control circuit. The oscillator generates a signal. When the magnitude of the signal exceeds a magnitude of a reference signal, the oscillator operates substantially in a first state; and when the magnitude of the signal is lower than the magnitude of the reference signal, the oscillator operates substantially in a second state different from the first one. The frequency control circuit varies the reference signal to change the frequency of the signal output from the oscillator.
    Type: Application
    Filed: September 29, 2011
    Publication date: January 26, 2012
    Inventors: Wen-Chung Yeh, Yi-Lun Shen
  • Patent number: 8089321
    Abstract: Four stochastic resonators 20-1 to 20-4 outputting a pulse signal in accordance with a stochastic resonance phenomenon are unidirectionally coupled in a ring-like form to constitute a fluctuation oscillator 10. When a signal output from each of the stochastic resonators 20-1 to 20-4 is successively transmitted in the stochastic resonators 20-1 to 20-4 coupled in a ring-like form, the output timings at each stochastic resonator 20 are synchronized with each other due to a cooperation phenomenon between the stochastic resonators 20-1 to 20-4, so that each stochastic resonator 20 is self-excited to oscillate at a constant period of time.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: January 3, 2012
    Assignee: Osaka University
    Inventors: Yasushi Hotta, Teruo Kanki, Naoki Asakawa, Toshio Kawahara, Tomoji Kawai, Hitoshi Tabata
  • Patent number: 8085101
    Abstract: A spread spectrum controller (20) controls a PLL (10) so that the PLL outputs a spread-spectrum processed clock signal. A loop bandwidth controller (30) controls at least one of a phase detector (11), a loop filter (12), a voltage-controlled oscillator (13), and a frequency divider (14) in the PLL (10) during operation of the spread spectrum controller (20) to change a loop bandwidth of the PLL (10).
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: December 27, 2011
    Assignee: Panasonic Corporation
    Inventors: Michiyo Yamamoto, Tsuyoshi Ebuchi, Kenji Murata
  • Patent number: RE44097
    Abstract: In the field of direct mind-machine interactions, prior art devices and methods do not provide sufficiently fast and reliable results. Mental influence detectors (100, 140, 400, 430) and corresponding methods provide fast and reliable results useful for detecting an influence of mind and hidden or classically non-inferable information. An anomalous effect detector (100) includes a source (104) of non-deterministic random numbers (110), a converter (114) to convert a property of numbers, a processor to accept converter output (118) and to produce an output signal (124) representative of an influence of mind. The processor output signal (124) contains fewer numbers than the input (110).
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: March 19, 2013
    Assignee: Psigenics Corporation
    Inventors: Scott A. Wilber, Patrick A. Wilber, Christopher B. Jensen