Abstract: The current disclosure is related to digital-to-analog converters (DACs) with localized frequency multiplication circuits. For example, an electronic device may include a local oscillator (LO) providing clock signals, a digital front-end providing digital signals, a DAC, (e.g., a radio frequency DAC (RFDAC)), and one or more antennas. The DAC may include a number of cells (e.g., unit power amplifiers). Moreover, each cell may provide a unit power analog signal upon activation with a higher frequency than the received digital signals and clock signals. The DAC may provide an output signal (e.g., an analog signal) based on combining (e.g., aggregating) the unit power analog signals of the activated cells for transmission by the one or more antennas.

Abstract: A Multipath D/A converter device is proposed having input terminals for a least a first and a second digital signal path, in at least one of the at least one first and second signal path, means for inverting every second sample of the digital signal, and each signal path comprising a D/A converter. The D/A converter of all signal paths are designed to operate at the same phase. The multipath converter device includes an analog combining unit designed for combining the analog signals output by each of the D/A converter.

Abstract: A method for influencing electromagnetic radiation in a frequency range between 0.1 and 10 terahertz includes providing a planar modulator having a matrix of at least 10×10 individual, active planar elements. Each planar element has a diameter between 5 ?m and 100 ?m. The planar elements are individually controlled using a central control unit such that each planar element assumes a respective one of at least two states in accordance with the control so as to influence the radiation.

Abstract: I/Q data skew in a QPSK modulator may be detected by sending identical or complementary data streams to I and Q channel PSK modulators, setting the relative carrier phase between I and Q to zero or ?, and monitoring the average QPSK output power, where the data streams sent to the I and Q channels include pseudorandom streams of ones and zeroes.

Abstract: A modulator and a modulation method for a communication device are disclosed. The modulator is configured to multiplex control symbols and data symbols for transmission in a signal based on information of the distance between the positions of at least two control symbols in a representation of symbol positions in the signal.

Abstract: An apparatus and method for digital up converting in a mobile communication system are provided. The apparatus includes a Selectable Input Logic (SIL), a Scalable Clock Distribution Logic (SCDL), a filter logic, and a mixer logic. The SIL performs decimation at a decimation rate. The SCDL controls a clock frequency. The filter logic performs channel filtering for the decimated signal, and performs interpolation at an interpolation rate variable. The mixer logic up-converts the signal provided from the filter logic.

Abstract: A pattern evaluation method includes: acquiring a plurality of examination images obtained in regard to an evaluation target pattern, at least one of the plurality of examination images being different from the other examination images; detecting all edges of the evaluation target pattern in each of the examination images; executing alignment of the evaluation target pattern in the respective examination images with a sub-pixel accuracy based on the detected edges; superimposing the aligned pattern edges to generate a single combined edge; measuring the combined edge; and evaluating the evaluation target pattern based on a result of the measurement.

Abstract: A GMSK modulator includes a dual-port memory, an address generator and a signal provider, where the dual-port memory respectively outputs in-phase and quadrature phase waveform data to first and second ports in response to in-phase and quadrature phase waveform address signals, the address generator generates the in-phase and quadrature phase waveform address signals based on a differential encoded bit stream, the signal provider selects one of the in-phase and the quadrature phase waveform data in response to the differential encoded bit stream, and outputs continuous GMSK in-phase and quadrature phase channel signals, and the redundancy of the memory that stores the GMSK in-phase and quadrature phase waveform data may be reduced using the dual-port memory so that the size of the memory may be reduced.

Abstract: This disclosure is directed to digitally implemented GMSK modulation techniques. The digital GMSK modulation techniques make use of a lookup table (LUT) and mapping logic to digitally generate GMSK waveforms. The mapping logic can significantly reduce the size of the LUT, and thereby reduce memory requirements needed for effective digitally implemented GMSK modulation.

Abstract: An oscillator is provided that can be flexibly retrofitted to become usable for a wide range of applications, that is compatible with different users'requests, and that enables a user to design a high-frequency unit using the oscillator without concerns. The oscillator includes a SAW resonator and an oscillation unit provided in the form of an integrated circuit. The SAW resonator and oscillation unit are encapsulated in the same package and then sealed. The whole oscillator is thus provided in the form of a module. The oscillation circuit includes a first adjustment terminal with which a current flowing through a current source is adjusted externally. A resistor offering a desired resistance is connected between the first adjustment terminal and a ground terminal, whereby a negative resistance can be adjusted. Moreover, a second adjustment terminal with which a current flowing through a current source in an amplification circuit is included.

Abstract: A first amplified signal is produced at a first amplifier, a second amplified signal is produced at a second amplifier, and a differential signal representing difference between the first amplified signal and the second amplified signal is generated at a subtraction unit receiving the first amplified signal and second amplified signal, the differential signal being a final amplified signal having a final modulated amplitude and a final modulated phase.

Abstract: A point-to-point microwave radio link that operates in a Frequency Division Duplex (FDD) mode using direct digital modulation with a Continuous Phase Shift Keyed (PSK) scheme. The transmit signal is generated by a circuit that uses a Voltage-Control Oscillator (VCO) operating in a microwave radio band to obtain the modulated signal. The VCO output is fed to a phase modulator to obtain the modulated signal. The output of the VCO is then frequency multiplied by the predetermined factor to produce the modulated microwave output signal at the desired band.

Abstract: A high-speed power-efficient coded M-ary Frequency-Shift Keying (M-ary FSK) modulator. The modulator includes a coding logic, which generates (M/2) Gray code signals in accordance with an (N−1) bits control signal; and (M/2) switching oscillators. Each switching oscillator includes: a composite crystal resonator with a first end and a second end; a first switch, which is controlled by Gray code signals, with one end connected to the first end of the composite crystal resonator, and the other end grounded via an equivalent negative resistance circuit; a second switch, which is controlled by serial data, with one end connected to the second end of the composite crystal resonator, and the other end grounded; and a capacitor, with one end connected to the second end of the composite crystal resonator, and the other end grounded.

Abstract: A high-speed power-efficient coded M-ary Frequency-Shift Keying (M-ary FSK) modulator. The modulator includes a coding logic, which generates (M/2) Gray code signals in accordance with an (N−1) bits control signal; and (M/2) switching oscillators. Each switching oscillator includes: a composite crystal resonator with a first end and a second end; a first switch, which is controlled by Gray code signals, with one end connected to the first end of the composite crystal resonator, and the other end grounded via an equivalent negative resistance circuit; a second switch, which is controlled by serial data, with one end connected to the second end of the composite crystal resonator, and the other end grounded; and a capacitor, with one end connected to the second end of the composite crystal resonator, and the other end grounded.

Abstract: The present invention teaches a system for selectably oscillating at a first or a second oscillating frequency. The system comprises an oscillator for providing an oscillating output. Moreover, the system comprises a switching device for selecting a first or a second impedance in response to a select signal having a voltage. Each of the first and second impedances are fixed independently of the select signal voltage such that the oscillating output oscillates at the first oscillating frequency when the first impedance is provided and oscillates at the second oscillating frequency when the second impedance is provided.

Abstract: The present invention teaches a system for selectably oscillating at a first or a second oscillating frequency. The system comprises an oscillator for providing an oscillating output. Moreover, the system comprises a switching device for selecting a first or a second impedance in response to a select signal having a voltage. Each of the first and second impedances are fixed independently of the select signal voltage such that the oscillating output oscillates at the first oscillating frequency when the first impedance is provided and oscillates at the second oscillating frequency when the second impedance is provided.

Abstract: The present invention teaches a system for selectably oscillating at a first or a second oscillating frequency. The system comprises an oscillator for providing an oscillating output. Moreover, the system comprises a switching device for selecting a first or a second impedance in response to a select signal having a voltage. Each of the first and second impedances is fixed independently of the select signal voltage such that the oscillating output oscillates at the first oscillating frequency when the first impedance is provided and oscillates at the second oscillating frequency when the second impedance is provided.

Abstract: An oscillator circuit, whose output signal has minimum fluctuation with changes in temperature, has an amplifier. Within the amplifier, a compensation resistor is connected to compensate for changes in amplitude and frequency of the output signal with temperature. A first impedance is connected between an output and a first input of the amplifier, a second impedance is connected between the first input and a second input, and a third impedance is connected between the output and the second input. A method for designing the oscillator begins by choosing an inductor with a high quality factor and a low temperature coefficient. The interconnections are designed to minimize temperature effects of parasitic impedances. A degenerative resistor is connected between the emitter of the bipolar transistor and the emitter resistor. The degenerative resistor varies in resistance with a change in temperature opposite that of an input resistance of the bipolar junction transistor.

Abstract: A multiple frequency shifting oscillator that will provide a plurality of frequencies dependent upon a contents of an input shifting signal an input shifting signal is disclosed. The multiple frequency shifting oscillator has an amplifier with first input, a second input, which is coupled to a ground reference potential and an output. The multiple frequency shifting oscillator has a first impedance that is coupled between the first input of the amplifier and the ground reference potential, a second impedance that is coupled between the output of the amplifier and the ground reference potential, and a third impedance coupled between the output and the input of the amplifier. The multiple frequency shifting oscillator has a plurality of frequency shifting impedances that when selected will be coupled to the first impedance so as to shift the frequency of the multiple frequency shifting oscillator.

Abstract: A data transmission and reception system according to this invention comprises a transmitter for transmitting data by modulating transmit data and a receiver for receiving and demodulating a signal from the receiver, wherein the receiver includes a parallel resonator for receiving a PSK signal; a full rectification circuit for detecting output from the parallel resonator; a low pass filter for shaping the waveform of output from the full rectification circuit; and a comparator for converting output from the low pass filter into a binary-coded signal so that demodulated signals can be obtained from the output of the comparator.

Abstract: A frequency modulation circuit includes an emitter-follower connection transistor (2), having a base supplied with a modulation signal, for generating an emitter voltage which is in proportion to a modulation signal level; and an integrated mono-stable multi-vibrator (1) having an inversion trigger terminal ((A*)), a non-inversion trigger terminal (B), a resister/capacitor terminal (R.sub.X /C.sub.X), a capacitor terminal (C.sub.X), complementary output terminals (Q, (Q*)), and the like. The inversion trigger terminal ((A*)) is connected to the complementary output terminal (Q), the non-inversion trigger terminal (B) is connected to a partial voltage point of partial voltage resistors (10, 11), the capacitor/resistor terminal (R.sub.X /C.sub.X) is connected to the emitter of the transistor (2) through a resistor (3) and connected to the capacitor terminal (C.sub.

Abstract: A pulse shaping filter for the .pi./4-shift QPSK modulator employed in IS-54 and JDC. The pulse shaping filter includes symbol determining circuits of the I-channel and the Q-channel, demultiplexers for inverse multiplexing each of the input signal value from the symbol determining circuits, a plurality of shift registers for shifting data from each of the demultiplexers according to odd and even symbol clock, a multiplexer for multiplexing each data from the shift registers to produce the corresponding address values, a plurality of ROM tables for storing the multiplexed address value, and a multiplexing and adding unit for multiplexing the address value stored in the ROM tables and adding the resulting multiplexed value.

Abstract: A digitally-controlled SAW stabilized FSK oscillator circuit having an oscillator and a single-port SAW resonator with a predetermined circuit resonant frequency and being coupled to the oscillator for establishing a first oscillator output frequency, F.sub.SAW. A bipolar transistor has at least one predetermined shunt capacitance value, C, that is placed in electrical series with the single-port SAW resonator when the transistor is in the OFF state and a closed switch that replaces the capacitance when the transistor is in the ON state to cause the first frequency, F.sub.SAW, to be generated by the oscillator when the transistor is ON and to cause a second frequency, F.sub.2, to be generated by the oscillator when the transistor is in the OFF state.

Abstract: An FSK modulator including an amplifier for oscillation has a surface acoustic wave resonator connected in series with a switching circuit formed without a variable-capacity diode but including a semiconductor switch and one or more fixed-capacity capacitors. When an input signal is received, the switch causes a capacitor or combination of capacitors to become connected in series with the surface acoustic wave resonator, providing oscillations with two frequencies to effect FSK modulation.

Abstract: A modulator receives a main signal synchronizing with a clock and a secondary signal having start and stop bits for each character. The modulator contains a unit for removing the start and stop bits from the secondary signal to generate a clock-synchronizing secondary signal. Then, the clock-synchronizing secondary signal and the main signal are modulated in parallel synchronized with a clock, and modulated signals are frequency division multiplexed. A demodulator receives a frequency division multiplexed modulated signal, and a clock-synchronizing main signal and a clock-synchronizing secondary signal are respectively regenerated by modulation and band separation. The demodulator contains a unit for inserting start and stop bits respectively before and after each character contained in the clock-synchronizing secondary signal to generate a secondary signal in a start-stop system.

Abstract: A frequency shift keying modulating circuit produces a first frequency according to a surface acoustic wave transducer natural resonant frequency and a second frequency according to the surface acoustic wave in combination with a reactive element. The frequency selected is determined by the state of a PIN switching diode in parallel with the reactive element.

Abstract: Biomedical information is directly digitally telemetered from the patient through a frequency modulated transmitter to a remote receiver and computer station. A phase-lock-loop circuit in the digital transmitter compensates for DC data bias by averaging and generating a scaled measure of the DC content of the digital data fed into the phase-lock-loop circuit. The average signal is then provided as a control signal to a first voltage controlled crystal oscillator, the output of which is then used as a reference frequency for the phase-lock-loop circuit. Frequency modulation of the digital data is provided by coupling the digital data directly into the voltage control input of the voltage controlled oscillator which generates the output frequency. Further control of the phase-lock-loop circuit in the transmitter is achieved by prepositioning the operating frequency of the voltage controlled oscillator by means of a microcontroller.

Abstract: A modulation circuit that is particularly suited for a communication modem and provides for each of the channels precise carrier mark and space frequencies generated in response to external signals from an FSK communication station. The modulation circuit includes first and second frequency controlling circuits arranged with an inductor to form a resonant circuit of a voltage variable oscillator. The modulation circuit further includes a feedback control network and a voltage-frequency control adjustment circuit. The feedback control network generates a loop error signal applied to both frequency controlling circuits. The voltage-frequency control adjustment circuit generates a voltage-frequency adjustment control signal and has a switching circuit responsive to the external signals. The voltage-frequency control adjustment circuit includes an inverting network and a bias network.

Abstract: A transmitter including a continuous phase FSK modulator is disclosed for use primarily in optical transmission. The output frequencies are achieved by switching a capacitor into and out of an oscillator circuit by means of a PIN diode switch network which is responsive to a binary data input. The resulting sinusoidal waveforms are squared up by means of an inverte with feedback control for adjusting the duty cycle.

Abstract: A method and apparatus for modulating a radio frequency signal with digital data including: a variable oscillator, a modulator for varying the oscillator's output, a network for detecting when the oscillator's output crosses its zero axis, a storage device for storing an applied data bit, and wherein the storage device applies the data bit to the modulator when the oscillator's output is at its zero crossing point.

Abstract: A modulator includes a plurality of piezoelectric resonators, a plurality of oscillator circuits, arranged in a one-to-one correspondence with the plurality of piezoelectric resonators, for generating different frequency signals in correspondence with corresponding piezoelectric resonators, and a switching circuit for selecting a predetermined frequency signal from the plurality of different frequency signals on the basis of a value of a digital signal to be modulated, and for outputting the selected frequency signal as a modulation signal.

Abstract: In a modulator for converting two digital signals of I channel and Q channel in base band into analog signals and for converting a component of the signals whose phase is the same as a carrier and another component of the signals whose phase is orthogonal to the carrier so as to produce an orthogonally modulated wave, the two digital signals are connected to one signal train by time-sharing and multiplexing them and the converted analog signals are separated to two analog signals for the I channel and the Q channel and thereby a digital modulator can be structured by using only one digital/analog converter resulting in reducing the adjustment points and the production cost.