Pulse Position, Frequency, Phase, Or Spacing Modulator Patents (Class 332/112)
  • Patent number: 10193376
    Abstract: A wireless power receiver (11) comprises an antenna (13), a capacitor (14) having a first terminal permanently connected to a first terminal (16) of the antenna (13) and a second terminal permanently connected to a second terminal (17) of the antenna (13), a first charge switch (18), a rectifier (15) having a first input (19) coupled to the antenna (13) via the first charge switch (18) and having a first output (22), and a communicator unit (35) with a first terminal coupled to the antenna (13).
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: January 29, 2019
    Assignee: ams AG
    Inventor: Mohammad R. Mazooji
  • Patent number: 9871530
    Abstract: An analog-to-digital and digital-to-analog conversion system using pulse-density-modulation (PDM) digital signals which minimize noise and optimize dynamic range by dividing a signal into multiple parallel pathways by apportioning a least significant range portion of an incoming signal to a low-path circuit and a most-significant portion of the incoming signal to a high-path circuit. The high-path circuit and low-path circuit can be separately level-modified to optimize dynamic range. Embodiments of the system can include an analog-to-digital conversion, a digital-to-analog conversion, or a complete analog-to-digital and digital-to-analog conversion system.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: January 16, 2018
    Inventor: John Howard La Grou
  • Patent number: 8903012
    Abstract: A new coded continuous phase modulation (CPM) scheme is proposed to enhance physical layer performance of the current DVB-RCS standard for a satellite communication system. The proposed CPM scheme uses a phase pulse design and combination of modulation parameters to shape the power spectrum of CPM signal in order to improve resilience to adjacent channel interference (ACI). Additionally, it uses a low complexity binary convolutional codes and S-random bit interleaving. Phase response using the proposed CPM scheme is a weighted average of the conventional rectangular and raised-cosine responses and provides optimum response to minimize frame error rate for a given data rate.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: December 2, 2014
    Assignee: Hughes Network Systems, LLC
    Inventors: Rohit Seshadri, Mustafa Eroz, Lin-Nan Lee
  • Patent number: 8878581
    Abstract: Groups of phase shifted Pulse Width Modulation signals are generated that maintain their duty-cycle and phase relationships as a function of the period of the PWM signal frequency. The multiphase PWM signals are generated in a ratio-metric fashion so as to greatly simplify and reduce the computational workload for a processor used in a PWM system. The groups of phase shifted PWM signals may also be synchronized with and automatically scaled to match external synchronization signals.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: November 4, 2014
    Assignee: Microchip Technology Incorporated
    Inventor: Bryan Kris
  • Publication number: 20140294206
    Abstract: An asymmetric modulation scheme may be used to drive two output nodes coupled to a load. The asymmetric modulation scheme may be one-sided such that the switching rate of a first output node is lower than the switching rate of a second output node. The first output node may be switched only to change a direction of current between the first output node and the second output node, while the second output node is switched to convey the information of an input signal. The asymmetric modulation scheme may be used to drive a speaker to reduce noise at the first output node to improve accuracy of current monitoring through the speaker by a current monitor coupled at the first output node.
    Type: Application
    Filed: August 13, 2013
    Publication date: October 2, 2014
    Applicant: CIRRUS LOGIC, INC.
    Inventors: Dan Shen, Frank Cheng, Lingli Zhang
  • Patent number: 8786377
    Abstract: A variable frequency modulator including a compensation network, first and second pulse control networks and a linearity controller. The compensation network is configured to provide a compensation signal indicative of an output load condition. The first pulse control network is configured to initiate pulses on a pulse control signal and to adjust operating frequency based on changes of the compensation signal. The second pulse control network is configured to terminate the pulses on the pulse control signal based on a predetermined timing parameter. The linearity controller is configured to adjust timing of terminating the pulses based on a predetermined steady state operating frequency and an actual operating frequency to maintain modulator gain at a constant level.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: July 22, 2014
    Assignee: Intersil Americas LLC
    Inventors: M. Jason Houston, Steven P. Laur, Rhys S. A. Philbrick
  • Patent number: 8774263
    Abstract: A transmitter (TX) for transmitting a pulse density modulated signal comprises means (SDM) for generating a pulse density modulated input signal (SI) and an encoder (ENC). The encoder (ENC) comprises a first input for receiving the pulse density modulated input signal (SI) and a second input for receiving additional information (AI) comprising at least one data bit. The encoder (ENC) is configured to generate a multi-bit telegram (TG) on the basis of the additional information (AI), the telegram (TG) comprising a predefined bit-sequence, and to replace an appropriate number of consecutive bits of the input signal (SI) with the telegram (TG) in order to generate an output signal (SO).
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: July 8, 2014
    Assignee: ams AGe
    Inventors: Richard Forsyth, Thomas Fröhlich, Matthias Steiner
  • Patent number: 8638151
    Abstract: Groups of phase shifted Pulse Width Modulation (PWM) signals are generated that maintain their duty-cycle and phase relationships as a function of the period of the PWM signal frequency. The multiphase PWM signals are generated in a ratio-metric fashion so as to greatly simplify and reduce the computational workload for a processor used in a PWM system. The groups of phase shifted PWM signals may also be synchronized with and automatically scaled to match external synchronization signals.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: January 28, 2014
    Assignee: Microchip Technology Incorporated
    Inventor: Bryan Kris
  • Patent number: 8625661
    Abstract: Systems and methods for the pulse edge modulation of digital carrier signals for communications systems. A digital carrier signal is generated and the carrier is pulse edge modulated with digital data. A pulse edge modulated signal is generated by either retarding or advancing each pulse edge of a carrier to be modulated relative to its original position in time, depending on the state of the digital bit to be modulated on that edge.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: January 7, 2014
    Assignee: Alfred E. Mann Foundation for Scientific Research
    Inventors: Edward K. F. Lee, Eusebiu Matei
  • Patent number: 8464081
    Abstract: A system and method for communicating information using Layer 1 from a powered device to power source equipment via Ethernet. In one embodiment, Layer 1 information such as power management, classification, temperature, and disconnect information is transmitted from a powered device to power source equipment using an AC signal that has a cycle defining a first time period during which the AC signal is turned on and a second time period during which the AC signal is turned off. A type of information being sent by the powered device can be determined based on characteristic on/off times of the AC signal cycle.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: June 11, 2013
    Assignee: Broadcom Corporation
    Inventors: Asif Hussain, Manisha Pandya
  • Patent number: 8457246
    Abstract: An apparatus and method for amplifying a Transmit (Tx) signal according to an Envelope Tacking (ET) scheme in a wireless communication system are provided. A transmitting end apparatus includes an envelope gain controller for controlling a gain of a digital baseband Tx signal in accordance with power control, a detector for detecting an envelope signal from the digital baseband Tx signal whose gain is controlled, and for shaping on the envelope signal, a first Digital to Analog Converter (DAC) for converting the shaped envelope signal into an analog signal, and an envelope modulator for generating a drain bias of a power amplifier that amplifies a Radio Frequency (RF) Tx signal by using the analog envelope signal. Accordingly, a digital-based ET scheme is implemented, and by using a plurality of shaping tables, efficiency of the ET scheme can be maximized in a transmitting end that uses power control.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: June 4, 2013
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Shin-Ho Kim, Hyung-Weon Park
  • Patent number: 8457243
    Abstract: A baseband signal generator (102a) provides a polar signal (A, I p) to a processing sub-unit (704p). The processing sub-unit (704p) receives furthermore feedback signals from a down converting unit (704c) which feedback signals are used to determine the magnitude (B) of the amplified output signal and the actual error phase. The magnitude (A) of the polar signal and the determined magnitude (B) are applied to a comparator (710) having its output connected to the input of a predistortion unit (214, 216). The output of the predistortion unit (214, 216) is connected to the input of a pulse width modulating unit (210, 212) which comprises a mapping unit (210) outputting two constant magnitude signals. The actual error phase and the phase component of the polar signal are used to generate a corrected phase component which is applied to a further mapping unit (202) forming part of a phase modulating unit (202, 204).
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: June 4, 2013
    Assignee: NXP B.V.
    Inventor: Jan S. Vromans
  • Patent number: 8457192
    Abstract: A switch-modulator for a radio-frequency power amplifier, arranged to modulate the I-signal and the Q-signal of the complex components (I+j·Q) separately in an I-signal part and a Q-signal part in order to create a modulated I-signal pulse sequence and a modulated Q-signal pulse sequence, wherein the modulation comprises a time-shift of the pulse positions within a sample interval.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: June 4, 2013
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventor: Håkan Malmqvist
  • Patent number: 8451939
    Abstract: A radio communication apparatus includes a baseband signal generator to generate digital data; a clock generator to generate 2N pulse signals corresponding to the digital data; a selector to select one of the 2N pulse signals; and a short pulse generator to reduce a pulse width of the signal selected by the selector, wherein the 2N pulse signals include a whole-period non-transmission pulse, a whole-period transmission pulse, and 2N-2 partial-period transmission pulses, when the partial-period transmission pulse is selected, a band pass filter outputs a signal that lasts for part of a period having a 1-symbol length, when the whole-period non-transmission pulse is selected, the band pass filter outputs a signal attenuated by offsetting signals corresponding to the whole-period non-transmission pulse, and when the whole-period transmission pulse is selected, the band pass filter outputs a signal that lasts for a whole of the period having the 1-symbol length.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: May 28, 2013
    Assignee: Fujitsu Limited
    Inventor: Yasuhiro Nakasha
  • Publication number: 20130127557
    Abstract: A variable frequency modulator including a compensation network, first and second pulse control networks and a linearity controller. The compensation network is configured to provide a compensation signal indicative of an output load condition. The first pulse control network is configured to initiate pulses on a pulse control signal and to adjust operating frequency based on changes of the compensation signal. The second pulse control network is configured to terminate the pulses on the pulse control signal based on a predetermined timing parameter. The linearity controller is configured to adjust timing of terminating the pulses based on a predetermined steady state operating frequency and an actual operating frequency to maintain modulator gain at a constant level.
    Type: Application
    Filed: June 29, 2012
    Publication date: May 23, 2013
    Applicant: INTERSIL AMERICAS LLC
    Inventors: M. Jason Houston, Steven P. Laur, Rhys S.A. Philbrick
  • Patent number: 8442093
    Abstract: A novel receiver structure is proposed for detecting a time-hopping ultra-wide bandwidth signal in the presence of multiple access interference. The proposed structure achieves better bit error rate performance than the conventional matched receiver when operating in multiple access interference. When operating in a multiple access interference-plus-Gaussian-noise environment, the receiver structure outperforms the conventional matched filter receiver for moderate to large values of signal-to-noise ratio. A receiver structure with adaptive limiting threshold is further proposed to ensure the performance of the soft-limiting receiver always meets or surpasses the performance of the conventional UWB receiver for all values of signal-to-noise ratio.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: May 14, 2013
    Assignee: The Governors of the University of Alberta
    Inventor: Norman C. Beaulieu
  • Patent number: 8351480
    Abstract: A pulse width modulation method for controlling the output power of a pulsed gas discharge laser powered by a pulsed RF power supply comprises delivering a train of digital pulses to the RF power supply. Each pulse in the train has an incrementally variable duration. The power supply is arranged to deliver a train of RF pulses corresponding in number and duration to the train of digital pulses received. The average power in the RF-pulse train can be varied by incrementally varying the duration of one or more of the digital pulses in the digital pulse train. The train of RF pulses is used to power a gas discharge laser. The gas discharge laser outputs a pulse train corresponding to the RF pulse train.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: January 8, 2013
    Assignee: Coherent, Inc.
    Inventor: David John Allie
  • Patent number: 8350636
    Abstract: A modulation arrangement comprises an input (E) for supplying a data signal (DS), a pre-modulator (VMod) that is coupled to the input (E) and features a clock pulse input (TEV) for supplying a pre-clock pulse (VT), a main modulator (HMod) that is coupled to the pre-modulator (VMod) on the input side and comprises a clock pulse input (TEH) for supplying a main clock pulse (HT), as well as an output for providing a modulated control signal (ST), and a switchable current source (Q, S) for providing a current (IS) that is controlled by the modulated control signal (ST) at an output (A) of the modulation arrangement. Furthermore, a method for providing a modulated control signal is disclosed.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: January 8, 2013
    Assignee: Austriamicrosystems AG
    Inventors: Peter Trattler, Franz Stelzl
  • Patent number: 8254437
    Abstract: A transmitting apparatus, receiving apparatus and communication system are disclosed, and great improvement in an S/N ratio, preventing an actual throughput from decreasing, and preventing the number of circuits for synchronizing spread spectrum signals from increasing can be expected at the receiving apparatus side. The transmitting apparatus includes a pulse generating circuit, pulse repetition cycle determining circuit, peak power determining circuit, and modulator. The pulse generating circuit generates pulse strings, pulse repetition cycle determining circuit determines, based on a clock signal, a pulse repetition cycle of the pulse string generated by the pulse generating circuit. The peak power determining circuit determines a pulse peak power of the pulse string. The modulator modulates the pulse string with transmission data, and then generates a transmission signal.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: August 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Suguru Fujita, Masahiro Mimura, Kazuaki Takahashi, Yoshinori Kunieda, Noriyuki Ueki
  • Patent number: 8254435
    Abstract: A variable delay circuit delays a carrier signal having a predetermined frequency, and outputs a modulated signal. A delay setting unit sets a delay period for the variable delay circuit according to a data signal to be modulated. The delay setting unit assigns each symbol in the data signal to any one of positive edges and negative edges in the carrier signal, and sets a delay period for the variable delay circuit at the timing at which a positive edge in the carrier signal passes through the variable delay circuit, according to the symbol value in the data signal assigned to the positive edge. Furthermore, the delay setting unit sets a delay period for the variable delay circuit at the timing at which a negative edge in the carrier signal passes through the variable delay circuit, according to the symbol value in the data signal assigned to the negative edge.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: August 28, 2012
    Assignee: Advantest Corporation
    Inventor: Shoji Kojima
  • Patent number: 8144761
    Abstract: A pulse transmission method for transmitting data by using pulse signals, each having a predetermined pulse width; defining a symbol time at least N times the predetermined pulse width, N being at least 2; defining a basic delay time calculated by dividing the predetermined pulse width by a predetermined integer; placing the pulse signals in the symbol time by delaying the pulse signals by an integral multiple of the basic delay time from start of the symbol time, the number of the pulse signals being k and 0?k?N being satisfied; and transmitting the pulse signals.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: March 27, 2012
    Assignee: Fujitsu Limited
    Inventor: Yasuhiro Nakasha
  • Patent number: 8144815
    Abstract: The communications terminal and acquisition method is for use with Continuous Phase Modulation (CPM) and Phase Shift Keying (PSK) modulation-type signals, each modulation-type signal having a respective preamble phasing sequence. The communications terminal may include a wireless communications device to receive a modulated signal having one of the CPM and PSK modulation types, and having a symbol rate. A controller may be included to cooperate with the wireless communications device to perform a transform process, such as a Fourier Transform (FT) process, on the received modulated signal to detect the modulation type and the symbol rate of the received modulated signal based upon the preamble phasing sequence. Carrier phase and frequency of the received modulated signal may be estimated based upon bin amplitudes. Also, symbol timing may be estimated based upon a phase difference between tones associated with the preamble phasing sequence.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: March 27, 2012
    Assignee: Harris Corporation
    Inventor: James A. Norris
  • Patent number: 8125287
    Abstract: A multichannel digital pulse width modulator/digital pulse frequency modulator uses a single ring oscillator that is shared by multiple channels. The ring oscillator has taps that can be used for least significant bit (LSB) precision of the generated PWM signal. The ring oscillator also produces a ring clock that is used to synchronize logic in the channels. Since the logic in the channels are synchronized by the ring clock, the channels can each independently produce different frequency PWM (or PFM) signals and still share the same ring oscillator.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: February 28, 2012
    Inventors: Zdravko Lukic, Eric Iozsef, Zhenyu Zhao, Jingquan Chen
  • Patent number: 8085106
    Abstract: Circuits and methods of dynamic modulation are disclosed. A dynamic modulator is used to reduce measurable conducted and/or radiated electromagnetic interference (EMI). The dynamic modulator is configured to generate either a set of optimal frequency modulation depths or discrete frequencies or both, and dynamically selects them to use over a series of programmable time durations (dwell time). Together with the utilization of Peak, Average or Quasi-Peak (QP) method of measurement, the dynamic modulator can reduce the spectral amplitude of EMI components, in particular the lower harmonics, to effectively pass regulatory requirements. In alternative embodiments, the dynamic modulator is used in a closed loop system to continuously adjust the frequency and the duty cycle of a PWM signal to reduce conducted and/or radiated EMI.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: December 27, 2011
    Inventors: Muzahid Bin Huda, Ho-Yuan Yu
  • Patent number: 8072283
    Abstract: In a device (10) for modulating Cartesian base band signals (I, Q) a first and second mapping unit (12, 14) each map signal samples of a corresponding Cartesian signal (I, Q) to intermediary signal sections having only two non-zero levels provided symmetrically around zero for forming two intermediary signals (S1, S2). A first and second processing unit (16, 18) each map each intermediary sections of an intermediary signal (S1, S2) to segments of a corresponding pulse train (S3, S4) through providing a positive pulse in one half of a segment if the corresponding signal section has a positive signal level and a positive pulse in another half of the segment if the corresponding signal section has a negative signal level. A delay unit (20) delays the pulses of one train in relation to the other and a combining unit (22) combines the trains for provision to a power amplifier (24).
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: December 6, 2011
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Hakan Malmqvist, Leonard Rexberg
  • Patent number: 8050352
    Abstract: A pulse amplitude modulation (PAM) signal generator that injects a copy of a pulse into the PAM baseband signal prior to frequency upconversion and power amplification. The pulse comprises a function of, or an extra copy of, a pulse in the PAM baseband signal. The pulse injector analyzes the PAM baseband signal for times when a predetermined threshold is exceeded and forms a pulse that is constructed and arranged to reduce the amplitude of the PAM baseband signal to a desired peak amplitude when the pulse is added to the PAM baseband signal. In other embodiments the peak-to-RMS amplitude ratio reducing methods and apparatus used to process PAM signal are adapted for reducing peak-to-RMS amplitude ratios of amplitude modulation signals in polar modulation transmitters. Peak-to-RMS amplitude ratio reduction is performed in the quadrature domain, the polar domain, or both the quadrature and polar domains.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: November 1, 2011
    Assignee: Panasonic Corporation
    Inventors: Stephan V. Schell, Richard W. D. Booth
  • Patent number: 8044744
    Abstract: A method and apparatus is described for a time modulated signal. A cosine function is used as the basis for the signal with time intervals at the maximum and minimum values of the cosine function defining the encoded data. The received waveform is twice differentiated to provide a cosine function from which zero crossings are detected and the time intervals determined.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: October 25, 2011
    Assignee: And Yet, Inc.
    Inventor: Martin H. Graham
  • Patent number: 8031809
    Abstract: A template pulse generating circuit that generates a template pulse used for detection of a received pulse in pulse communication includes an output mode switching circuit for switching an output mode in accordance with a supplied control signal between a continuous output mode that continuously outputs the template pulses and an intermittent output mode that intermittently outputs the template pulses so that the template pulse is generated in either one of the continuous output mode and the intermittent output mode.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: October 4, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Izumi Iida
  • Patent number: 8014483
    Abstract: A receiver in an impulse wireless communication. The receiver (300) includes a pulse-pair correlator (304) that receives a signal (316) and divides it into two signals for paths. One of the signals is input to signal multiplier (312) while another signal is delayed by a delay unit (310). The signal multiplier (312) multiplies the received signal (316) by a delayed signal (318). An integrator (314) integrates an output signal (322) over a designated period of time. An adding module (306) sums an output signal (324) from the integrator (314). An acquiring module (308) compares an summing-up output (326) from the adding module (306) with a predetermined threshold value to detect the existence of a transmitting-standard preamble.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: September 6, 2011
    Assignee: Panasonic Corporation
    Inventors: Yew Soo Eng, Zhan Yu
  • Publication number: 20110116656
    Abstract: A circuit includes an enhanced frequency range linear pulse code modulation conversion circuit. The enhanced frequency range linear pulse code modulation conversion circuit is driven by a clock signal within a frequency range. The enhanced frequency range linear pulse code modulation conversion circuit provides enhanced frequency range linear pulse code modulated information. More specifically, the enhanced frequency range linear pulse code modulation conversion circuit is provided by selectively decimating and interpolating non-enhanced frequency range linear pulse code modulated information based on a desired output sampling frequency and the frequency range.
    Type: Application
    Filed: December 16, 2009
    Publication date: May 19, 2011
    Applicant: ATI Technologies ULC
    Inventors: Sateesh Lagudu, Mahabaleswara Bhatt, Padmavathi Devi Volety
  • Patent number: 7898352
    Abstract: The present invention relates in general to transferring the envelope information of a polar modulated signal to a varying pulsewidth signal, while the phase modulation is direct transferred to the phase modulation of this PWM signal. Accordingly, the resultant signal is a PWM-PPM-signal. Such a signal can efficiently amplified by use of switching amplifying stages. By the present invention four pre-distorted baseband signals are applied basically to 4 linear RF mixers and a two adders, which are, the only needed external RF building blocks to build the modulator according to the invention. That is, the basic idea of the invention resides in the way of modulation of the four baseband signals and the way of combining of the RF modulated signals.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: March 1, 2011
    Assignee: NXP B.V.
    Inventors: Jan Vromans, Gerben W. De Jong, Mihai A. T. Sanduleanu
  • Patent number: 7898353
    Abstract: A circuit includes a clock conditioning circuit which receives an encoded clock signal, and provides first and second conditioned clock signals in response. The clock conditioning circuit adjusts a period of the first and second conditioned clock signals in response to an adjustment of a period of the encoded clock signal. The circuit includes a modulator which receives the first and second conditioned clock signals.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: March 1, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Merit Y. Hong, Bruce M. Newman
  • Patent number: 7881397
    Abstract: Methods and systems for modulating a signal are described. A phase-modulated signal that includes a sequence of contiguous one-cycle sinusoidal waveforms having a frequency above 50 MHz is generated. The phases of the one-cycle sinusoidal waveforms correspond to symbols of a message signal. A bandwidth of the phase-modulated signal is reduced using a bandpass filter centered at the frequency of the contiguous one-cycle sinusoidal waveforms. The phase-modulated signal is wirelessly transmitted.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: February 1, 2011
    Assignee: Teradyne, Inc.
    Inventor: Toshihide Kadota
  • Patent number: 7872546
    Abstract: A dual mode modulator is proposed for driving a power output stage having a serial connection of high-side power FET and low-side power FET. The dual mode modulator includes a PWM modulator operating under a PWM-frequency and a PFM modulator for controlling the power output stage. To improve the dynamic load regulation of the dual mode modulator, a dynamic frequency booster can be added to the dual mode modulator to boost up the PWM-frequency from its normal operating frequency during a PFM-to-PWM mode transition period. Secondly, a dynamic slew rate booster can be added to boost up an error amplifier slew rate of the PWM modulator from its normal operating slew rate during the mode transition period. Thirdly, a dynamic turn-off logic circuit can be added to turn off the low-side power FET during the mode transition period.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: January 18, 2011
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Behzad Mohtashemi, Allan Chang
  • Publication number: 20100244974
    Abstract: A method for reducing the transition rate of a pulse width modulated signal representing an original signal, and thus reducing energy losses of devices such as class D amplifiers stimulated by the signal, while decreasing the jitter and thus the SNR of the output low passed signal. Within the method every R pulses of a signal having a frame duration of M, are summed to receive frames of R*M duration having a single pulse. Then, the odd pulses are mirrored within their respective time frames, so that each odd pulse is attached to the following even pulse. The combined pulse, which occurs in a window having a duration of 2*R*M is then optionally re-positioned within its time frame. The repositioning can be designed so as to position the pulse within the 2*R*M window, having the same moment as the original signal, or to receive a signal having the same phase of the Fourier transform as the original signal, at least for the frequency range of interest of the original signal, such as the low frequencies.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 30, 2010
    Applicant: DSP GROUP LIMITED
    Inventor: ISRAEL GREISS
  • Patent number: 7800518
    Abstract: A pulse modulation method divides code comprising 4N-bit data into 2-bit units of data. For each pulse signal having a fixed pulse width tw, a code modulated signal is generated by pausing between pulse pause intervals Tr. An adjusted time width of between ½ and 1 times the fixed pulse width tw is taken to be ?t. One of time widths 0, ?t, 2?t, and 3?t is added to a fixed pause period tm of time intervals according to a corresponding value of the 2-bit data. If the sum total time TD of the code modulated signal is an interval of at least [(2tw+2tm+3?t)N+?t], each pulse pause interval Tr is substituted by a pulse pause interval Tr corresponding to the inverted 2-bit data. An inversion flag signal expresses that inversion information is added to the code modulated signal.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: September 21, 2010
    Assignee: SMK Corporation
    Inventor: Kenichi Miwa
  • Publication number: 20100141225
    Abstract: An adaptive pulse positioning modulator including a sense circuit which provides a compensation signal indicative of output voltage error, a filter circuit having an input receiving the compensation signal and an output providing an adjust signal, a leading ramp circuit which provides a repetitive first leading edge ramp signal having a slope which is adjusted by the adjust signal, a comparator circuit which provides a first start trigger signal when the first leading edge ramp signal reaches the compensation signal and a first end trigger signal when a first trailing edge ramp signal reaches the compensation signal, a trailing ramp circuit which initiates ramping of the first trailing edge ramp signal when the first start trigger signal is provided, and a pulse control logic which asserts pulses on a PWM signal based on the trigger signals.
    Type: Application
    Filed: June 26, 2009
    Publication date: June 10, 2010
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Robert H. Isham, Weihong Qiu
  • Patent number: 7719377
    Abstract: A pulse step modulator employs a plurality of series connected unit step power amplifier modules. Each module is turned on by a turn-on signal to provide a unit step voltage of a given value. An output circuit is connected to the modules for providing an output voltage to a load and wherein the output voltage is a multiple of the unit step voltages in dependence upon the number of modules that are turned on. The modules are sequentially turned on in a given order and are turned off in the reverse order. An encoder provides turn-on signals with each turn-on signal being applied to a selected one of the modules. The number of turn-on signals provided varies as a function of the magnitude of a time varying input signal. A controller alternately turns enables or disables (in a swapping manner) one of a pair of associated modules as the magnitude of the input signal increases and decreases.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: May 18, 2010
    Assignee: Harris Corporation
    Inventors: Ky Thoai Luu, David Geier
  • Patent number: 7656946
    Abstract: The invention provides a pulse width modulation amplifier that includes a correction circuit, an envelope detector, a level detector, a PWM carrier generator, an interpolation arithmetic circuit, and a PWM circuit. The envelope detector detects an envelope of digital data to be input. The correction circuit performs distortion correction, frequency characteristic correction, and ?? correction, for the input digital data. The level detector detects levels of the digital data supplied by the envelope detector. The PWM carrier generator gates a carrier signal having a frequency corresponding to the output of the level detector. The interpolation arithmetic circuit generates interpolation data synchronous with the carrier signal from the digital data. The PWM circuit converts the interpolation data into a pulse width modulation signal based on the carrier signal.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: February 2, 2010
    Assignee: Yamaha Corporation
    Inventor: Morito Morishima
  • Patent number: 7561624
    Abstract: Binary data signal multi-line interval encoding and decoding arrangements supporting high speed data communications consistent with certain embodiments produce a signal having a plurality of pulses with a minimum pulse duration of T. The pulses are arranged in a signal pattern selected as one of M possible signal patterns of L bits transmitted over N time intervals, with each time interval being of T seconds in duration, to represent one of M possible message sequence, where M>2N. The plurality of pulses have transitions that occur at times falling between the boundaries of the time interval T. Embodiments may be implemented in hardware, with a computer executing a software program within, or with both. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: July 14, 2009
    Inventors: John P. Fonseka, Jin Liu
  • Publication number: 20090134948
    Abstract: A pulse modulation method divides code comprising 4N-bit data into 2-bit units of data. For each pulse signal having a fixed pulse width tw, a code modulated signal is generated by pausing between pulse pause intervals Tr. An adjusted time width of between ½ and 1 times the fixed pulse width tw is taken to be ?t. One of time widths 0, ?t, 2?t, and 3?t is added to a fixed pause period tm of time intervals according to a corresponding value of the 2-bit data. If the sum total time TD of the code modulated signal is an interval of at least [(2tw+2tm+3?t)N+?t], each pulse pause interval Tr is substituted by a pulse pause interval Tr corresponding to the inverted 2-bit data. An inversion flag signal expresses that inversion information is added to the code modulated signal.
    Type: Application
    Filed: October 11, 2006
    Publication date: May 28, 2009
    Applicant: SMK Corporation
    Inventor: Kenichi Miwa
  • Patent number: 7539257
    Abstract: A signal generator generates a coded or memory waveform having a trellis structure. A modulator is operative with the signal generator for adding at least one phase pulse to the trellis structure of the coded or memory waveform to create a substantially constant envelope modulated signal that increases the transmitted bits per symbol.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: May 26, 2009
    Assignee: Harris Corporation
    Inventors: James A. Norris, John W. Nieto
  • Publication number: 20090091400
    Abstract: A method and apparatus modulate a polarity of a burst of pulses of the impulse radio signal using a first pseudo noise sequence generated by a shift register and a position of the burst of pulses using a second pseudo noise sequence generated by the shift register.
    Type: Application
    Filed: January 11, 2006
    Publication date: April 9, 2009
    Inventors: Philip V. Orlik, Andreas F. Molisch, Zafer Sahinoglu
  • Patent number: 7446621
    Abstract: The switching method between pulse frequency modulation and pulse width modulation signals is first based on an output voltage of a power transistor to generate a corresponding pulse frequency modulation signal. Next, it is determined whether the corresponding pulse frequency modulation signal has reached its maximal frequency. If so, the initial pulse width modulation signal is adjusted to have the same width as the pulse frequency modulation signal. Thereafter, the adjusted pulse width modulation signal is outputted.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: November 4, 2008
    Assignee: Advanced Analog Technology, Inc.
    Inventors: Li Chieh Chen, Yu Min Sun, Chu Yu Chu
  • Patent number: 7295082
    Abstract: A pulse frequency modulation oscillating circuit includes a reference voltage generator for generating a first reference voltage and a second reference voltage, a first comparison circuit for comparing a state signal with the first reference voltage, a second comparison circuit for comparing the state signal with the second reference voltage, an output circuit for outputting a pulse frequency modulation signal according to an under-voltage signal, and signals outputted from the first comparison circuit and from the second comparison circuit, a mode generation circuit for generating the state signal, and a mode decision circuit for outputting inverse signals of the signals outputted from the first comparison circuit or signals outputted from the output circuit to the mode generation circuit according to the pulse frequency modulation signal, the under-voltage signal, and the signals outputted from the first comparison circuit and from the second comparison circuit.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: November 13, 2007
    Assignee: Weltrend Semiconductor Inc.
    Inventors: Hui-Yuan Hsu, Ching-Ju Lin
  • Patent number: 7283011
    Abstract: A modulation method, referred to as dual phase pulse modulation (DPPM), represents digital data as a series of high and low pulses whose widths represent groups of M data bits, with both the high and low pulses representing successive M-bit groups. Each of the 2M possible data values for a group of M data bits uniquely corresponds to one of 2M distinct pulse widths. This modulation method is essentially clockless, with data being decoded from a signal by detecting each pulse's width with respect to the last transition. Power consumption is reduced by having M data bits represented for each pulse transition, and by using both the high and low pulses to represent data.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: October 16, 2007
    Assignee: Atmel Corporation
    Inventors: Daniel S. Cohen, Daniel J. Meyer, John L. Fagan
  • Patent number: 7283012
    Abstract: A tri-state pulse density modulator includes a first switch device coupled to a high voltage, and a second switch device coupled to a low voltage. An adder receives a pulse density modulation (PDM) input signal and a latched input signal to generate an output sum signal and a carry signal. A latch module coupled with the adder latches the output sum signal with a clock signal to generate the latched input signal. A control circuit module responsive to the carry signal for selectively turns off the first and second switch devices to generate the PDM output signal at a tri-state voltage between the first and second voltages, or turns on the first or second switch device to generate the PDM output signal at the first or second voltage, respectively. Thus, the PDM output signal only switches between the tri-state voltage and either the first voltage or the second voltage.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: October 16, 2007
    Assignee: Via Telecom., Ltd.
    Inventor: Meoung-Jin Lim
  • Patent number: 7268638
    Abstract: The invention is a method for pulse position modulating signals which are synchronized to clocked bit periods using a clock comprising the steps of generating two, three or n signals to mark the presence of digital ones during corresponding n time slots occurring during the same bit period. The two, three or n signals are combined into a single data channel to utilize abrupt phase changes of pulses in a carrier signal at a carrier frequency, the phase changes having a very short duration to mark the presence of digital ones only. The combination of the n signals into a single data channel comprises gating each of the n signals in a sequence of serially delayed time slots corresponding to each of the n signals during a portion of the same bit period in the single data channel during time positions reserved for unexpressed zeroes.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: September 11, 2007
    Inventor: Harold R. Walker
  • Patent number: 7242262
    Abstract: In order to provide a high-speed-pulse polarity modulation circuit for realizing low power consumption and miniaturization and reducing noise occurring at a middle level which is a baseline for a bipolar pulse, a modulation circuit for converting a unipolar pulse into a bipolar pulse in accordance with a value of input data is structured such that differential transistor pairs are double stacked, and one of the differential transistor pairs in an upper stage outputs polarity modulation pulses, and a middle potential between logic high and low is applied to the gates of the other differential transistor pair the gates of which are coupled together.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: July 10, 2007
    Assignee: Fujitsu Limited
    Inventor: Yoichi Kawano
  • Publication number: 20070152767
    Abstract: A high speed passband phase modulation apparatus and method are provided. In the phase modulation apparatus, an RF phase shifter modulates a phase of a local signal that is generated in a VCO according to a digital input. The RF phase shifter is controlled by a phase-controlled loop so that a baseband phase shifter is phased locked to a modulation reference signal from the local signal and a reference clock signal according to the digital input. The phase-controlled loop phase-locks using the modulation reference signal so that the phase-modulated signal generated in the RF phase shifter has a phase value according to the digital input.
    Type: Application
    Filed: June 21, 2006
    Publication date: July 5, 2007
    Inventors: Jae Sup Lee, Tae Wook Kim, Seung Woo Kim, Jeong Hoon Lee, Young Sik Kim