Abstract: A memory device includes a memory cell array and a data input and output circuit configured to output a data signal (DQ signal) including data read from the memory cell array and a data strobe signal (DQS signal) including a toggle pattern associated with an operating condition of the memory device based on n-level pulse amplitude modulation (PAMn), wherein n is an integer greater than or equal to 4.

Abstract: An additively manufactured apparatus having a gas filled sealed cavity containing at least two additively manufactured cathodes and an additively manufactured anode spaced from the cathodes such that a continuous electric discharge of the gas stimulated between at least one of the cathodes and the anode provides a Boolean function output at the anode corresponding to electrical input signals at two of the cathodes.

Abstract: A BASK demodulator includes a signal modifying circuit and a low pass filter (LPF) that couples an amplifier to an output of the modifying circuit. The modifying circuit includes a signal scaling circuit, a rectifying circuit and an AC coupling circuit. A signal shaping circuit couples an output of the amplifier to an output of the demodulator. The signal scaling circuit scales an input BASK modulated signal to provide an unclipped scaled and biased alternating signal that alternates about a bias voltage at a minimum carrier frequency. The rectifying circuit rectifies the unclipped signal to provide a partially rectified signal that is decoupled by the AC coupling circuit to provide a clipped scaled and biased alternating signal. The LPF removes the signal from the clipped scaled and biased alternating signal to provide a demodulated signal, which then is amplified by the amplifier and shaped by the shaping circuit.

Abstract: A circuit includes a switched modulator stage combining an information signal with a square wave carrier to produce a first modulated signal; and a second modulation stage forming additional steps in the first modulated signal to produce a second modulated signal.

Abstract: An irrigation control device having a modulator that modulates data onto an alternating power signal by distorting amplitude of a first leading portion of selected cycles of the alternating power signal, and permit effectively a full amplitude of the alternating power signal on a following portion of the selected cycles, wherein the first leading portion and the following portion are either both on a high side of a cycle or both on a low side of a cycle of the alternating power signal. The irrigation control device further includes an interface configured to couple the modulator to a multi-wire interface coupled to a plurality of irrigation devices to permit the alternating power signal to be applied to the multi-wire interface.

Abstract: A rail-to-rail comparator including a first comparison unit connected to a first terminal and configured to compare differential input signals to differential reference voltages; a second comparison unit connected to a second terminal and configured to compare the differential input signals to the differential reference voltages; and an output unit configured to be driven in response to a clock signal and to generate a complementary output signal according to comparison results of the first and second comparison units.

Abstract: Techniques and mechanisms for configuring logic to implement a signal modulation. In an embodiment, the logic includes a finite impulse response (FIR) module comprising circuitry. The selection circuitry may be operable to concurrently receive signals from latch circuitry of the FIR module and, based on the signals, to select an input group of the selection circuitry and to output a voltage identifier. In another embodiment, configuration logic is operable to set an operational mode which determines a total number of concurrent input signals, received by the FIR module, which the FIR module will use to select an input group for generating an output representing a voltage level.

Abstract: An asymmetric modulation scheme may be used to drive two output nodes coupled to a load. The asymmetric modulation scheme may be one-sided such that the switching rate of a first output node is lower than the switching rate of a second output node. The first output node may be switched only to change a direction of current between the first output node and the second output node, while the second output node is switched to convey the information of an input signal. The asymmetric modulation scheme may be used to drive a speaker to reduce noise at the first output node to improve accuracy of current monitoring through the speaker by a current monitor coupled at the first output node.

Abstract: The present invention relates to a method of transmitting and a method of receiving signals and corresponding apparatus. One aspect of the present invention relates to an efficient L1 signaling method for an efficient transmitter and an efficient receiver using the efficient L1 signaling method for an efficient cable broadcasting.

Abstract: Techniques and mechanisms for configuring logic to implement a signal modulation. In an embodiment, the logic includes a finite impulse response (FIR) module comprising circuitry. The selection circuitry may be operable to concurrently receive signals from latch circuitry of the FIR module and, based on the signals, to select an input group of the selection circuitry and to output a voltage identifier. In another embodiment, configuration logic is operable to set an operational mode which determines a total number of concurrent input signals, received by the FIR module, which the FIR module will use to select an input group for generating an output representing a voltage level.

Abstract: A communications system may include a first communications device that may include a transmitter and a modulator cooperating therewith to modulate a coded waveform using a constant phase modulation (CPM) to generate a non-linear CPM waveform, and generate a linear representation of the non-linear CPM waveform, the linear representation including a plurality of pulses. The transmitter and a modulator may further cooperate to remove at least some of the plurality of pulses to define a modified linear representation of the non-linear CPM waveform, and transmit the modified linear representation of the non-linear CPM waveform. The communications system may further include a second communications device that may include a receiver and a single pulse-matched filter linear demodulator cooperating therewith to demodulate the modified linear representation of the non-linear CPM waveform transmitted from the first communications device.

Abstract: An apparatus including a spin torque oscillator configured to receive an input electric current and to produce a radio frequency output signal; and a tunable current source for providing an input electric current to the spin torque oscillator.

Abstract: Apparatus and methods are described that enable concurrent transmission of multiple data signals including clock, synchronization, and power over a single-wire bus between a master device and one or more slave devices. A first transmission channel from the master device to the slave device may modulate the width of periodic pulses between a first voltage level and a second voltage level with respect to a reference potential. A second transmission channel may modulate the amplitude of at least one of the first and second voltage levels to at least one third voltage level. Concurrent communications between a master device and one or more slave devices over a single-wire bus can be achieved.

Abstract: Methods and apparatus provide for: detecting an identification (ID) number associated with a piece of information technology (IT) equipment using a first computer-readable and executable program running on the piece of IT equipment; modulating a power usage of the piece of IT equipment as a function of the ID number using the first program running on the piece of IT equipment; monitoring the power usage of the piece of IT equipment using a power distribution unit (PDU) that provides operating power to the piece of IT equipment; and detecting modulation in the power usage of the piece of IT equipment caused by the first program running on the piece of IT equipment, such detection being performed using a second computer-readable and executable program running on the PDU.

Abstract: A baseband signal generator (102a) provides a polar signal (A, I p) to a processing sub-unit (704p). The processing sub-unit (704p) receives furthermore feedback signals from a down converting unit (704c) which feedback signals are used to determine the magnitude (B) of the amplified output signal and the actual error phase. The magnitude (A) of the polar signal and the determined magnitude (B) are applied to a comparator (710) having its output connected to the input of a predistortion unit (214, 216). The output of the predistortion unit (214, 216) is connected to the input of a pulse width modulating unit (210, 212) which comprises a mapping unit (210) outputting two constant magnitude signals. The actual error phase and the phase component of the polar signal are used to generate a corrected phase component which is applied to a further mapping unit (202) forming part of a phase modulating unit (202, 204).

Abstract: Exemplary gate pulse modulation circuit and sloping modulation method applied thereto are provided. The gate pulse modulation circuit has an output terminal and includes a voltage modulation circuit and a comparator control circuit. The voltage modulation circuit is electrically coupled between a gate power supply voltage and a second voltage and subjected to the control of a sloping control signal to perform a sloping operation and then output a sloped voltage signal. The comparator control circuit includes a comparing unit and a switching unit. First and second input terminals of the comparing unit respectively are electrically coupled to a node and a first voltage. During the voltage modulation circuit performing the sloping operation, a magnitude relationship between a voltage on the node and the first voltage decides on-off states of the switching unit and thereby decides the moment of the first voltage delivered to the output terminal.

Abstract: A multi-chip stack structure and a signal transmission method are disclosed in specification and drawing, where the multi-chip stack structure includes first and second chips. The first chip includes a first inductance coil with a first series capacitor, and the second chip includes a second inductance coil with a second series capacitor. The first and second inductance coils are magnetically coupled to each other. The magnetically coupled inductance coils and the capacitors constitute a coupling filter.

Abstract: Provided are an apparatus and method for generating a soft bit metric and a multi-level (M-ary) Quadrature Amplitude Modulation (QAM) receiving system using the same. The apparatus includes an analog to digital converter for converting an analog symbol signal of a demodulated I (Inphase) or Q (Quadrature) channel into a digital signal, a scaler for scaling the converted digital signal based on a reference value used for determining a space between symbols, a positive integer converter for calculating a positive integer of the scaled digital I or Q channel symbol signal, a sign determinator for determining a sign of the scaled digital I or Q channel symbol signal, and a bit information converter for converting the scaled digital I or Q channel symbol signal into soft bit metric information per bit on the basis of the calculated positive integer and the determined sign value.

Abstract: Systems (400, 500, 600) and methods (300) for generating a chaotic amplitude modulated signal absent of cyclostationary features by preserving a constant variance. The methods involve: generating a PAM signal including pulse amplitude modulation having a periodically changing amplitude; generating a first part of a constant power envelope signal (FPCPES) by dividing the PAM signal by a square root of a magnitude of the PAM signal; generating a second part of the constant power envelope signal (SPCPES) having a magnitude equal to a square root of one minus the magnitude of the PAM signal; and generating first and second spreading sequences (FSS and SSS). The methods also involve combining the FPCPES with the FSS to generate a first product signal (FPS) and combining the SPCPES with the SSS to generate a second product signal (SPS). A constant power envelope signal is generated using the FPS and SPS.

Abstract: A passive RFID transponder includes a coder and a modulator. The coder generates a digital coded data stream based on a digital data stream to be transmitted. The digital coded data stream includes an initialization bit sequence having a maximum data frequency of the digital coded data stream. Furthermore, the digital coded data stream changes its value at the latest after a predefined number of bits. The modulator modulates an amplitude of a carrier signal with the digital coded data stream to provide an amplitude-modulated coded signal.

Abstract: Disclosed is a novel design of a fully integrated UWB transmitter. The transmitter includes a pulse generator, a pulse modulator, and an ultra-wideband drive amplifier. A new low voltage low power pulse generator circuit is disclosed which can be fully integrated in CMOS or BiCMOS process. This circuit includes a squaring stage, an exponential stage, and a second-order derivative stage. Based on this, PPM, BPSK and PAM pulse modulator circuits and system are disclosed. The modulated pulse is symmetrical second-order derivative Gaussian pulses with a bandwidth up to 5 GHz and having sufficient swing for UWB applications. An ultra-wideband driver amplifier is proposed to amplify the modulator output and drive the antenna. For the driver amplifier, common source resistor and inductor shunt feedback with current reuse technique is employed to achieve the ultra-wideband bandwidth, high gain, and providing matching for the antenna simultaneously.

Abstract: A low noise oscillator includes a resonator 102 that is excited with a pulsed signal (i.e., an impulse of energy) to replace energy lost to parasitic resistive losses once every Nth period (where N=1, 2, 3 . . . ). The resonating signal is monitored by a level detector and when the signal falls below a predetermined threshold, the pulse generator outputs a pulse or adjusts pulse width, pulse amplitude (or both) of a pulsed signal to create the necessary impulse for application to the resonator to recoup losses resulting from resonator operation. A phase shifting circuit may be provided to ensure the pulses are time aligned with the resonating signal to reduce noise.

Abstract: It is an object of the invention to provide a pulse generation circuit and a modulator for realizing a high On/Off ratio in a small circuit scale and with lower power consumption. A short pulse generation circuit according to the invention includes an oscillator 101, a control signal generation circuit 102, an intermittent frequency multiplier 103, a filter 104, and an output terminal 105. The oscillator 101 and the intermittent frequency multiplier 103 are active circuits implemented as active elements. A continuous signal is output from the oscillator 101 and is input to the intermittent frequency multiplier 103 and the intermittent frequency multiplier 103 intermittently operates according to a control signal output from the control signal generation circuit 102, thereby generating a short pulse signal, and a spurious component is removed through the filter.

Abstract: A sigma-delta modulator for an ADC, passes an input signal to a loop filter, then to a multi-bit quantizer of the modulator. An output of the quantizer is passed to a digital filter, and a feedback signal is passed back to the loop filter, the feedback signal having fewer bits than are produced by the multi-bit quantizer. The digital filter has an order greater than one in the passband of the sigma-delta modulator.

Abstract: An electronic component includes an RFID transponder, and also a security document comprises such an electronic component. The electronic component has a modulator for modulating a carrier signal, the modulator being constructed from at least two organic field effect transistors.

Abstract: To reflect advantages of a constant phase modulation waveform, the invention provides a pulse amplitude modulated PAM waveform that is a superposition of Q0?2L?1 PAM component pulses in each symbol interval such that a significant portion of signal energy over each symbol interval is within the Q0 PAM component pulses. The present invention distributes most signal energy in one pulse and progressively lower energies in the remaining Q0?1 pulses of a symbol interval. The Laurent Decomposition is a special case of the present invention, but the present invention exhibits the energy distribution of the Laurent Decomposition in non-binary CPM waveforms and in multi-h (binary and non-binary) CPM waveforms, where h is a modulating index. All energy is distributed among only Q=2L?1 pulses in each symbol interval, though only Q0<Q pulses may in fact be transmitted in certain embodiments. A method, transmitter, receiver, and computer program are disclosed.

Abstract: A switching amplifier includes a modulator, which includes a pulse generator. The pulse generator generates positive and negative pulses, in response to an input signal, and the frequency of the negative pulses can be controlled independently of the frequency of the positive pulses. The positive pulses and negative pulses are combined to form a composite pulse stream, which can be low-pass filtered such that the filter output is an amplified version of the input signal.

Abstract: Efficient PAM transmit modulation is provided by a PAM modulator that includes an oscillator (404) that provides a clock signal, CKV, (408). The clock signal 408 and a delayed version (CKV_DLY) 420 of the clock signal are provided to a logic gate (414). The output of logic gate (414) is used as a power amplifier input signal (PA_IN) for radio frequency power amplifier (416). Depending on the relative time delay of the CKV clock signal (408) and the CKV_DLY delayed clock signal (420), the timing and duty cycle of the logic gate (414) duty cycle can be controlled. The duty cycle or pulse-width variation affects the turn-on time of the power amplifier (416); thereby establishing the RF output amplitude.

Abstract: Methods and apparatus are described for generating and receiving amplitude and differential-phase encoded signals in which the number of phase states at a given amplitude level is always less than or equal to that at a higher amplitude level and at least two amplitude levels have different numbers of phase states.

Abstract: A pulse amplitude modulation (PAM) signal generator that injects a copy of a pulse into the PAM baseband signal prior to frequency upconversion and power amplification. The pulse comprises a function of, or an extra copy of, a pulse in the PAM baseband signal. The pulse injector analyzes the PAM baseband signal for times when a predetermined threshold is exceeded and forms a pulse that is constructed and arranged to reduce the amplitude of the PAM baseband signal to a desired peak amplitude when the pulse is added to the PAM baseband signal.

Abstract: A phase modulation section (101) generates a first modulated signal including phase information. An amplitude signal control section (103) generates a second modulated signal including amplitude information. A waveform shaping section (104), when an amplitude of the second modulated signal is larger than a regulated value generates a waveform-shaped modulated signal. An amplitude modulated voltage supply section (105) amplifies the waveform-shaped modulated signal based on the supply voltage from a voltage control section (106) and supplies the amplified signal to a power amplification section (102). The power amplification section (102) amplifies the first modulated signal based on the amplitude modulated voltage, and outputs the resultant signal.

Abstract: In a contactless IC card system, a modulating circuit manufactured in an IC form is operable at a high power efficiency. The demodulating apparatus is configured to include: first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal, a second signal output means for outputting a second output signal having a predetermined phase with respect to that of the input signal, gate means for gating at least the second output signal, calculation means for adding, or subtracting the first output signal and the second output signal; and control means for controlling the operation of the gate means in response to a logic level of input data.

Abstract: A pulse amplitude modulation (PAM) signal generator that injects a copy of a pulse into the PAM baseband signal prior to frequency upconversion and power amplification. The pulse comprises a function of, or an extra copy of, a pulse in the PAM baseband signal. The pulse injector analyzes the PAM baseband signal for times when a predetermined threshold is exceeded and forms a pulse that is constructed and arranged to reduce the amplitude of the PAM baseband signal to a desired peak amplitude when the pulse is added to the PAM baseband signal.

Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs adaptive or adjustable equalization circuitry and techniques in the transmitter and/or receiver to enhance the system performance of, for example, a system using the PAM-4 coding.

Abstract: A polar modulator contains a phase locked loop which is designed to emit a radio-frequency signal at one frequency to one output, with the frequency being derived from the reference signal and from a phase modulation signal at a control input of the phase locked loop. The modulator additionally has a second signal input for supplying an amplitude modulation signal. The second signal input is connected to a control input of a pulse width modulator, one of whose signal inputs is coupled to the output of the phase locked loop. The pulse width modulator is designed to vary the duty ratio of a signal which is applied to the signal input, with this variation being adjustable via a regulation signal at the control input. A filter can be connected downstream from the output of the pulse width modulator and suppresses higher harmonic components in a signal which can be tapped off at the output of the pulse width modulator.

Abstract: In a contactless IC card system, a modulating circuit manufactured in an IC form is operable at a high power efficiency. The demodulating apparatus is configured to include: first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal, a second signal output means for outputting a second output signal having a predetermined phase with respect to that of the input signal, gate means for gating at least the second output signal, calculation means for adding, or subtracting the first output signal and the second output signal; and control means for controlling the operation of the gate means in response to a logic level of input data.

Abstract: A method is performed for influencing the signal shape of an output signal of an RF power resonance amplifier and an RF excitation arrangement including an RF power resonance amplifier. A basic signal of a basic frequency is amplified and modulated with a modulation signal, and an output oscillating circuit of the RF power resonance amplifier is tuned to a frequency in the range of the basic frequency, and is excited with the basic signal during normal operation. At times that are or can be predetermined, the output oscillating circuit is driven with a driving signal that differs from the basic signal, for a time period that is or can be predetermined. This reduces the dying down time of the output oscillating circuit and increases the steepness of the output signal edges.

Abstract: To significantly reduce mobile station static power consumption, and to make it possible to use a high speed asynchronous link in the mobile station, the invention uses one of the amplitude levels of, preferably, a PAM-5 (Pulse Amplitude Modulation with five amplitude levels) modulation technique as a strobe signal to generate a change in the transmitted signal. The change in the transmitted signal makes it possible for a PAM-5 receiving circuit to sample and decode two consecutive occurrences of the same data bits. The use of this invention avoids the requirement to include an oscillator in the PAM-5 receiver, or to dedicate a signal line to transmit a clock signal from the transmitter to the receiver.

Abstract: A radio communications system in which a desired signal can be accurately discriminated from interfering signals, even when signals from a plurality of transmitters are received simultaneously, in which a transmitter communicates information using signals that are repeated over predetermined periods. A pulse generator generates pulses having a predetermined repetition period based on an information bit to be communicated, and the pulses generated by the pulse generator are transmitted. A pulse amplitude altering unit controls the amplitude of the pulses to be transmitted in accordance with a predefined pattern under the control of a control unit.

Abstract: An SSB radio communication system and radio apparatus applicable to ultra high frequencies such as a VHF band and UHF band. In the transmitting side, a carrier wave is amplitude modulated by modulation input signals which comprise a constant amplitude, sine wave shaped reference pulse having a predetermined width and period and a sine wave shaped modulation pulse signal having an amplitude representing two- or multi-value digital values having the same width as the reference pulse signal and which are formed based on the amplitude of the reference pulse signal, and the modulated pulse signals are transmitted on a single side band, while in its receiving side the gain of received signals is automatically adjusted based on the reference pulse signal that is the value of the peak of the received signals.

Abstract: An AM demodulator includes an APC detection circuit that compares phases of an AM-modulated input signal and a signal output from a VCO. However, the APC detection circuit multiples the two signals before their comparison. As a result, even if the phases of the input signal or the signal output from the VCO is shifted by 180 degrees, the result of comparison by the APC detection circuit is not influenced by the phase shift. Moreover, when a signal detected by the AM detection circuit is in a potential range showing over-modulation, operation of a PLL circuit is stopped.

Abstract: A transceiver and transmitter are shown. A baseband processor receives a signal for transmission. It converts the signal into amplitude and phase polar components. Each component is then processed—the phase component through a wideband phase modulator and the amplitude component through a wideband amplitude modulator, and the components are then recombined for further processing or transmission.

Abstract: An optical processor for controlling a phased antenna array uses a frequency-shifted feedback cavity (FSFC), which includes a traveling-wave cavity. The FSFC incrementally delays and incrementally frequency shifts optical signals circulating in the traveling-wave cavity. Optical signals coupled out of the FSFC are separated by frequency, hence by delay, and processed to control either or both transmit and receive beam-forming operations. The FSFC provides a receiver with multiple receive signals which have incremental values of frequency. Each frequency corresponds to an incremental time sampling of optical signals input into the FSFC. Transmit signals coupled out of the FSFC have frequency and phase relationships that result in short time-domain pulses when combined. Controlling modulation and frequency of the transmit signals achieves carrier interference multiple access, a new type of spread-spectrum communications.

Abstract: A voltage (Vo) is added to an envelope function and input into a switching modulator (105). The output of the switching modulator (VSUP) is input to a linear regulator (103) where amplitude compensation of VSUP takes place and is output as VPA. VPA is then used to accomplish envelope modulation of a power amplifier (101). The value chosen for Vo is chosen to be adequate to maintain VSUP(t)>VPA(t) over all time.

Abstract: A voltage (Vo) is added to an envelope function and input into a switching modulator (105). The output of the switching modulator (VSUP) is input to a linear regulator (103) where amplitude compensation of VSUP takes place and is output as VPA. VPA is then used to accomplish envelope modulation of a power amplifier (101). The value chosen for Vo is chosen to be adequate to maintain VSUP(t)>VPA(t) over all time.

Abstract: A DC brushless motor operation speed control method is disclosed. First, a linearly voltage dependent current source is used to charge a capacitor and the terminal voltage of the capacitor is coupled to a linearly voltage dependent base frequency level detector. When the output voltage of the capacitor reaches the base frequency reference voltage, the signal output from the base frequency level detector will make the capacitor discharge, outputting a series of base frequency triangular waves. Under different supply voltages, all the generated base frequency triangular waves have the same cycle time. The base frequency triangular waves are transmitted to a speed control comparator. Through pulse width modulation, the speed control reference voltage adjusts the output pulse width of the comparator and thereby controls the speed of the motor.

Abstract: Direct up-conversion of a signal is accomplished using a sampling pulse generator circuit and a gated differential amplifier, enabled by the sampling signal. When not enabled, the output of the differential amplifier is pulled to zero. The sampling pulse is generated from a base frequency sine wave which is squared with a limiting amplifier, and further passed through one or more frequency doublers producing a times two signal, a times four signal and so on. The squared base frequency and frequency doubled signals are logically ORed to produce a short duration pulse which repeats at the frequency of the base signal. The resulting output is an amplitude modulated pulse doublet time domain waveform.

Abstract: A method and apparatus for adaptively quantizing a digital signal prior to digital-to-analog conversion during pulse shaping in a pulse-amplitude modulated (PAM) system. In the method and apparatus, scaling constants applied to the input signal prior to digital-to-analog conversion change according to the time-varying periodic probability density function (pdf) of the input signal. Spectral components added to the signal due to the adaptive scaling of the method may be removed by performing adaptive amplification on the output signal of the DAC before transmission as a PAM signal.

Abstract: A device for transmitting a pulse signal via a metallic line to a receiver end at which equalization is applied to the received pulse signal. The device includes a waveform adjustment unit which adjusts a pulse width in accordance with differences between characteristics of the metallic line and characteristics that are assumed for the equalization at the receiver end. The device further includes a transmission driver unit which transmits a pulse having the adjusted pulse width to the metallic line.

Abstract: Efficient PAM transmit modulation is provided by a PAM modulator that includes an oscillator (404) that provides a clock signal, CKV, (408). The clock signal 408 and a delayed version (CKV_DLY) 420 of the clock signal are provided to a logic gate (414). The output of logic gate (414) is used as a power amplifier input signal (PA_IN) for radio frequency power amplifier (416). Depending on the relative time delay of the CKV clock signal (408) and the CKV_DLY delayed clock signal (420), the timing and duty cycle of the logic gate (414) duty cycle can be controlled. The duty cycle or pulse-width variation affects the turn-on time of the power amplifier (416); thereby establishing the RF output amplitude.