Abstract: Computing device, computer instructions and method for identifying seismic traces prone to cycle-skipping in a full waveform inversion method. The method includes receiving recorded seismic data recorded with seismic sensors over a subsurface of interest; selecting a model that describes the subsurface; calculating, based on the model and the recorded seismic data, estimated seismic data; and choosing a probabilistic measure that characterizes a relationship between the recorded seismic data and the estimated seismic data. The probabilistic measure includes at least one statistical function.

Abstract: A systolic array implemented in circuitry of an integrated circuit, includes a processing element array having processing elements arranged in a vertical direction and a horizontal direction, first loaders communicatively coupled to the processing element array to load samples Am,n from at least one external memory to the processing element array, and second loaders communicatively coupled to the processing element array to load samples Bk,l from the at least one external memory to the processing element array. Each row of the samples Am,n is loaded one row at a time to a single processing element along the horizontal direction, and each row of the samples Bk,l is loaded one row at a time to a single processing element along the vertical direction, wherein pairing between the samples Am,n and Bk,l in the horizontal direction and the vertical direction enables data reuse to reduce bandwidth usage of the external memory.

Abstract: Transmission-line filtering with enhanced frequency response is disclosed. In an example aspect, an apparatus includes a transmission-line filter to enhance a frequency response of a filtering operation. The transmission-line filter includes an input port, an output port, and multiple transmission-line base units. The multiple transmission-line base units are disposed between the input port and the output port and are coupled to the input port and the output port. Each of the multiple transmission-line base units includes a respective transmission line of multiple transmission lines. At least one transmission-line base unit of the multiple transmission-line base units includes a multi-resonant circuit.

Abstract: Apparatus and methods related to multipath bandpass filters with passband notches are provided herein. In certain configurations, a multipath bandpass filter includes multiple filter circuit branches or paths that are electrically connected in parallel with one another between an input terminal and an output terminal. The input terminal receives an input signal, and each filter circuit branch includes a downconverter that downconverts the input signal to generate a downconverted signal, a filter network that generates a filtered signal by filtering the downconverted signal, and an upconverter that upconverts the filtered signal to generate a branch output signal. The filter network includes at least one low pass filter and at least one notch filter to provide a passband with in-band notches. The branch output signals from the filter circuit branches are combined to generate an output signal at the output terminal.

Abstract: What is provided is a subtractor, as a re-quantization device, which is configured to detect re-quantization noise, a discrete time filter which is configured to perform frequency weighting on the detected re-quantization noise, an adder which is configured to add an additional signal to quantization noise, and an additional signal selector which is configured to select a value at the present time of a column of an additional signal for minimizing the magnitude of quantization noise having been subjected to frequency weighting evaluated one sampling or more later.

Abstract: A system for processing of signals with poles that are low in frequency includes a switched capacitor circuit that includes two switches connected to an input and an output of a switching capacitor (Cs), respectively, in an alternating manner at a selected switching frequency (fSW); and a filter capacitor connected between an input and the switched capacitor circuit. The filter capacitor and the switched capacitor circuit together function as a filter, thereby a pole frequency depending on a ratio of capacitance of the switching capacitor (Cs) and the filter capacitor, instead of an RC product.

Abstract: The present invention aims to reduce power consumption in an ADC that performs AD conversion of a single-ended signal. A pair of sampling capacitors samples the single-ended signal. After the single-ended signal has been sampled, the connection control unit performs positive-side connection control of connecting both ends of one of the pair of sampling capacitors across a positive-side signal line and a predetermined ground potential and performs negative-side connection control of connecting both ends of the other of the pair of sampling capacitors across a negative-side signal line and the predetermined ground potential. A conversion unit converts a differential signals from the positive-side signal line and the negative-side signal line that have respectively undergone the positive-side connection control and the negative-side connection control into a digital signal.

Abstract: A differential trace structure reducing the magnitude of low frequency attenuation is disclosed. The trace structure is formed on a printed circuit board. A pair of differential traces connects a signal receiver and a signal transmitter. A passive equalizer has a first shunt coupled to one of the pair of differential traces; and a second shunt coupled to the other one of the pair of differential traces. The passive equalizer has an inductor and a resistor coupled in series to the shunts. For low frequency signals, the passive equalizer behaves as a shunt resistance to the pair of differential traces.

Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). Method and apparatus for interleaving is provided.

Abstract: Methods, apparatus, systems, and articles of manufacture to implement a third-order signal scrambler are disclosed. An example apparatus includes a controlled scramble generator to generate a controlled random sequence based on one or more subcarriers and a random pulse sequence, the random pulse sequence based on an output of a random number generator processed by a multi-order sinusoidal noise function. The example apparatus further includes a sequence modifier to form an output sequence by combining a source sequence with the controlled random sequence, the controlled random sequence to modify a characteristic of the source sequence in a frequency domain.

Abstract: High-data rate channel interface modules and equalization methods employing a finite impulse response (FIR) analog receive filter. Embodiments include an illustrative channel interface module having multiple amplifier-based delay units arranged in a sequential chain to convert an analog input signal into a set of increasingly-delayed analog signals that are weighted and combined together with the analog input signal to form an equalized signal; and a symbol decision element operating on the equalized signal to obtain a sequence of symbol decisions. An interface that extracts received data from the sequence of symbol decisions. The delay units may employ one or more delay cells each having a common-source amplifier stage followed by a source follower output stage, the two stages providing approximately equal portions of the propagation delay. An enhanced gate-to-drain capacitance in the common-source amplifier may increase propagation delay while reducing bandwidth limitations.

Abstract: A technique relates to a structure. A first surface includes an inductive element of a resonator. A second surface includes a first portion of a capacitive element of the resonator and at least one qubit. A second portion of the capacitive element of the resonator is on the first surface.

Abstract: A method of equalizing received packet data in a bus topology network, including: receiving, by a receiver of a second node, a first packet from a first node in a bus topology network in which two or more nodes are connected via a bus; setting, by the receiver, an equalizer coefficient of an equalizer using a first training sequence of the first packet and storing the set equalizer coefficient; receiving, by the receiver, a second packet including a second training sequence shorter than the first training sequence from the first node; and equalizing, by the receiver, the second packet using the stored equalizer coefficient.

Abstract: According to an aspect of the present disclosure, a method comprises computing first set of coefficients of a digital filter providing first filter performance, computing a second set of coefficients from the first set of coefficients, forming a difference digital filter with second set of coefficients to produce a difference filter output and adding a compensation factor to the difference filter output to achieve a second performance identical to the first filter performance. According to another aspect, the second set of coefficients are computed as difference between the successive first set of coefficients such that when the first set of coefficients comprises N number of coefficients, the second set of coefficients comprises N?1 number of coefficients.

Abstract: Disclosed is a noise filter. The noise filter includes an input port to receive an analog signal. The noise filter further includes a multiplexer coupled to the input port. The multiplexer separates the analog signal into a plurality of frequency bands. The frequency bands include a high frequency band and a low frequency band. The noise filter also includes a low-band variable attenuator coupled to the multiplexer. The low-band variable attenuator adjustably attenuates the low frequency band relative to the high frequency band.

Abstract: A computing device includes a complementary signal generator configured to generate first and second complementary signals, delay circuitry configured to introduce a delay in a signal, and control circuitry. The control circuitry is configured to transmit the first and second complementary signals at least in part by determining a length mismatch between first and second signal transmission paths, determining a delay based at least in part on the length mismatch, introducing the delay in the first signal, and providing the delayed first signal and the second signal to the first and second signal paths, respectively.

Abstract: In a method for detecting leakage in a digital cable system, at least one first signal is inserted on the cable system. The at least one first signal has an amplitude multiple tens of dB below the digital channel power of the digital channels carried on the cable system. A second signal containing the first signal is received. The second signal is converted to an intermediate frequency (IF) signal. The IF signal is digitized and samples of the digitized IF signal are obtained. Digitized samples of a third signal at the nominal frequency of the first signal at maximum amplitude converted to the IF are provided. The digitized IF signal and the digitized samples of a third signal at the nominal frequency of the first signal at maximum amplitude converted to the IF are correlated. The presence of the inserted first signal is detected based upon the result of the correlation. In another method, a pair of first signals are inserted on the cable system.

Abstract: A method of constructing an RF filter comprises designing an RF filter that includes a plurality of resonant elements disposed, a plurality of non-resonant elements coupling the resonant elements together to form a stop band having a plurality of transmission zeroes corresponding to respective frequencies of the resonant elements, and a sub-band between the transmission zeroes. The non-resonant elements comprise a variable non-resonant element for selectively introducing a reflection zero within the stop band to create a pass band in the sub-band. The method further comprises changing the order in which the resonant elements are disposed along the signal transmission path to create a plurality of filter solutions, computing a performance parameter for each of the filter solutions, comparing the performance parameters to each other, selecting one of the filter solutions based on the comparison of the computed performance parameters, and constructing the RF filter using the selected filter solution.

Abstract: A system and method for correcting non-linear tracking of objects that may change size when moving on a large touch sensor having a relatively large space between electrodes by dynamic compensating on-the-fly by constantly calculating the size of a finger as measured by the touch sensor, and then scaling that measured size so that look-up tables may be used to compensate for any size finger in the X and Y axes.

Abstract: A signal modulating device includes: an integrating circuit arranged to generate an integrated signal according to a scaled analog signal and a first feedback signal; a resonating circuit arranged to generate a resonating signal according to the integrated signal; a first signal converting circuit arranged to convert the resonating signal into a digital output signal; a second signal converting circuit arranged to convert the digital output signal into the first feedback signal; and a first impedance circuit having a first terminal receiving an analog signal and a second terminal coupled to the resonating circuit for altering the location of zeros in the forward-path transfer function and consequently shaping the signal transfer function (STF) of the signal modulating device; and a second impedance circuit having a first terminal receiving the analog signal and a second terminal coupled to the integrating circuit for generating the scaled analog signal.

Abstract: An NR coefficient (Kf) is calculated on the basis of a representative value (Pm) of a pixel of interest and a low-pass filtered value (La-Ld) nearest to the representative value (Pm) of the pixel of interest among a plurality of low-pass filtered values filtered one-dimensionally in different directions in an input image, and the pixel value of the pixel of interest and a value output by a two-dimensional low-pass filter (25) are weighted by the NR coefficient (Kf) and added (36). The representative value of the pixel of interest may be, for example, a median value obtained by filtering the current frame and a past frame in the time axis direction. The image processing device reduces noise without lowering resolution.

Abstract: A pulse detector that detects a pulse signal originating from the pulse of a human body includes: a pulse wave sensor that detects and outputs a first pulse wave signal in which the pulse signal and a noise signal are mixed; and a first filtering unit that generates an adaptive spectral line enhancer based on the first pulse wave signal, divides the first pulse wave signal into a first signal and a second signal, and outputs a second pulse wave signal including at least the first signal.

Abstract: A pulse detector (100) includes a pulse wave sensor (10); a pulse wave signal filtering section (200) having a first adaptive filter (202a) and second adaptive filter (202b), and an adaptive filter switching section (17); and a pulse wave frequency analyzer (400), wherein the adaptive filter switching section (17) starts an adaptive processing of the second adaptive filter (202b) at a first time point partway through a second interval in which the first adaptive filter (202a) is continuously carrying out adaptive processing, where the second interval occurs in the first interval, and switches from the first adaptive filter (202a) to the second adaptive filter (202b) at a second time point, which is a time point after the first time point and which is the end point of the second interval.

Abstract: A novel and useful high-order discrete-time charge rotating (CR) infinite impulse response (IIR) low-pass filter is presented. The filter utilizes capacitors and a gm-cell, rather than operational amplifiers, and is thus compatible with digital nanoscale technology. A 7th-order charge-sampling and 6th-order voltage-sampling discrete time filter is disclosed. The order of the filter is easily extendable to higher orders. The charge rotating filter is process-scalable with Moore's law and amenable to digital nanoscale CMOS technology. Bandwidth of this filter is precise and robust to PVT variation. The filter exhibits very low power consumption per filter pole, low input-referred noise, wide tuning range, excellent linearity and low area per minimum bandwidth and filter pole.

Abstract: A programmable transversal structure that may serve as a filter, or more generally, a transversal network. A pair of time delay elements are implemented using one or more grating control propagation path structures, multilayer waveguides with configurable gaps, or variable impedance meander lines. Electro active actuators responsive to bandwidth, center frequency, and stop band attenuation control inputs control the delay of such elements. Impedance elements are distributed between the time delay elements to provide the desired transversal response.

Abstract: Embodiments and methods and means for filtering radio frequencies (RF) via coaxial cables with a computer system are provided. Such embodiments generally include modifying an RF coaxial cables communicatively coupling an antenna to a wireless radio module within a mobile computing device allow an RF signal within certain frequency band(s) to pass with minimal attenuation while other frequencies, the RF signal is either reflected or attenuated. Modifying the RF coaxial cable entails inserting sections of varied impedance into the uniform impedance of the RF coaxial cable by altering the mechanical structure of the RF coaxial cable.

Abstract: A discrete-time analog filter including multiple storage cells each coupled to common input and output ports and each including at least one of capacitor and at least one switch. Each cell periodically samples an input signal and contributes to an output signal. At least two cells sample the input signal at different frequencies. The cells may be grouped together into one or more filter taps, where each filter tap may have a specified timing delay. Timing signals of a given tap may be non-overlapping phases of a given frequency. Cells may have a fixed or programmable capacitance associated with a corresponding weighting coefficient, and different taps may have different weighting coefficients. Taps may be coupled to implement a negative weighting coefficient. Programmable gain may be implemented with switches or by tap output coupling including sub-filter summing arrangements. Self-timed cells based on a master clock are disclosed.

Abstract: An output filter includes a polyphase common-mode filter having a polyphase common-mode choke connected to an output of a power converter at one end, a first polyphase capacitor connected to the other end of the polyphase common-mode choke at one end, and a neutral-point detecting transformer connected to the other end of the first polyphase capacitor at one end; a capacitor/resistor series-connected body connected to a frame ground of the power converter at one end and connected to the other end of the neutral-point detecting transformer at the other end; and a polyphase normal-mode filter having a polyphase normal-mode choke connected to the other end of the polyphase common-mode choke at one end, and a second polyphase capacitor connected to the other end of the polyphase normal-mode choke at one end and having the other ends connected together and further connected to the one end of the capacitor/resistor series-connected body.

Abstract: An electronic filtering device includes continuous trace on a dielectric substrate and a dissipation layer communicatively coupled to the trace. The dissipation layer may include disconnected metal particles, which may be embedded in a substrate, for example in an epoxy. The continuous trace may be meandering, for example crenulated, coil or spiral signal path. At least a second continuous trace may be spaced from the first by the substrate, and conductively coupled by a via. The electronic filtering device may be used in one or more printed circuit boards (PCBs) that form stages of an input/output system.

Abstract: The present invention is intended to efficiently implement noise countermeasures for a semiconductor circuit board and for a semiconductor circuit. The present invention is constituted by a control substrate, and a semiconductor circuit connected to the control substrate. The semiconductor circuit includes a substrate, an integrated circuit group, and a noise countermeasure, and is separated from the control substrate. The integrated circuit group includes an integrated circuit as a noise source. The substrate has a stacked multilayer structure, and shifts the frequency of a noise generated by the integrated circuit group to the high frequency side. The noise countermeasure is connected between the integrated circuit group and the control substrate. The noise countermeasure is a filter for attenuating the high frequency of a noise.

Abstract: Aspects of a method and system for generating quadrature signals utilizing an on-chip transformer are provided. In this regard, a pair of phase-quadrature signals may be generated from a single-phase signal via a transformer, one or more variable capacitors, and one or more variable resistors integrated on-chip. The transformer may comprise a plurality of loops fabricated in a plurality of metal layers in the chip. Each of the one or more variable capacitors may comprise a configurable capacitor bank and each of the one or more variable resistors may comprise a configurable resistor bank. The one or more capacitor banks may be programmatically configured on-chip, based on a frequency of the single-phase signal. The one or more resistor banks may be programmatically configured on-chip, based on a frequency of said single-phase signal.

Abstract: In an equalizing filter circuit having an input terminal 101, an output terminal 102, delay devices 104 connected in multi-stage to the input terminal 101, and a plurality of weighting circuits 105 which are branched from and connected to the plurality of delay devices to thereby combine respective output signals of the weighting circuits, gain adjustment of the weighting circuits is performed to determine a coefficient of the equalizing filter circuit without depending on a load connected to the output terminal. Thus, an amount of compensation for a distorted waveform may be enhanced. To this end, an impedance converting circuit 108 is connected between at least one weighting circuit and the output terminal.

Abstract: In one embodiment, the present invention includes an electronic circuit comprising a first stage having a first differential inductive element and a second differential inductive element, and a second stage coupled to an output of the first stage, the second stage having a first differential inductive element and a second differential inductive element, wherein the first and second differential inductive elements of the first stage couple magnetically to generate a first phase error, wherein the first and second differential inductive elements of the second stage couple magnetically to generate a second phase error, and wherein the second phase error cancels the first phase error.

Abstract: A distributed phase shifter including: a first planar winding having its ends defining accesses in phase opposition; a second planar winding coupled with the first one and grounded by a first capacitive element; a third planar winding in a conductive level different from that receiving the first winding and electrically in series with the second winding; and a fourth planar winding, coupled with the third one in a conductive level different from that receiving the second winding, first ends of the third and fourth windings being connected by a capacitive element and their second ends being connected by another capacitive element, their first and second respective ends defining accesses in phase quadrature.

Abstract: An impedance conversion device has four conductors arranged so that the first and second conductors form a transmission line having a first characteristic impedance, the third and fourth conductors form a transmission line having the first characteristic impedance, the first and third conductors form a transmission line having a second characteristic impedance, and the second and fourth conductors form a third transmission line having the second characteristic impedance. The second and fourth conductors are interconnected at proximate ends through a resistance equal to the first characteristic impedance. The third and fourth conductors are interconnected at proximate ends through a resistance equal to the second characteristic impedance. The lateral dimensions of the impedance conversion device are small enough to permit insertion in a stacked pair line.

Abstract: A circuit for the analog correlation of a 2.5 GHz signal to remove impairments such as echo, cross talk and intersymbol interference is described. Loop stability in a loop which generates an error signal and tap weights is achieved by providing a further delay from the taps of the delay line.

Abstract: A dual path equalization structure is used to equalize DMT systems operating over channels in which different impairments dominate the performance of different parts of the channel. Two TEQ/DFT structures are used to process the received signal, each optimized for a different part of the channel. The outputs of the two paths are combined with appropriate frequency-domain equalization to achieve an overall equalization architecture which is better optimized for the whole channel.

Abstract: RF programmable SAW filters achieve selectable filter performance by providing tunable input and output interdigital (IDTs) with different synchronous frequencies and substantially reduce electromagnetic interference (EMI) associated with RF signals not of interest. The RF programmable SAW filter includes tunable input and output IDT's, with the input and output IDT's having different input and output IDT synchronous frequencies. The input signal is divided into multiple output signals along multiple signal paths that are applied to an input tap weight network wherein the amplitude of each output signal may be varied individually. The individually weighted signal paths are then applied one each to individual IDT input electrode fingers in a means for IDT input, which is characterized by a synchronous frequency Fin. The IDT input means generates an acoustic wave that propagates to a means for IDT output, which is characterized by a synchronous frequency Fout, where Fin and Fout are not the same.

Abstract: A programmable driver/equalizer with an alterable FIR enables the equalization of serial links or other transmission systems to adapt to a variety of transmission media, specifically, intersymbol interference (ISI). Current mode differential drive circuits are coupled to a transmission media via a Finite Impulse Response (FIR) filter operating in the Z transform mode. The FIR filter includes A and B coefficient setting circuit, and is coupled to the drivers. The driver circuit also includes A coefficient level driver compensation and B coefficient level driver compensation to reduce self-induced ISI from the driver while the filter coefficients are activated. The coefficient setting circuit receive a combination of control bits to select the appropriate response for the driver to the various transmission media parameters. Adjustments to the driver output current are made at data run lengths exceeding certain values and subsequent adjustments are made for data run lengths exceeding larger values.

Abstract: A part of transmission signal is branched by a directional coupler, and split by a splitting circuit, so that the transmission signal can be outputted to the subscribers' terminal devices via branched output terminals. Latching relays disposed in signal paths to the branched output terminals from the splitting circuit can set the output/stop of the transmission signal to the terminal devices. A control circuit switches the connected/disconnected state of the relays in response to the command signal from the center apparatus. When an operation switch is turned on, all the relays are placed into the connected state. As a result, after the installation of the tap device, by operating the operation switch, the broadcasting signal can be distributed to the terminal devices before the command signal is received.

Abstract: Scheme for processing an input signal A(t) by N resonators (17), each having parameters characterizing it, to generate N individual output signals. Then each of the N individual output signals is weighted using a corresponding weight to generate N individual weighted output signals which are superposed to obtain M output signals C(t). One of the parameters or the weight depend on a time signal P(t).

Abstract: An analog calculation circuit in a filter circuit is corrected in the calculation error by estimating the error from a calculation result of known inputs and known multiplier. A multiplier is changed according to the estimated error. The filter circuit has a voltage to current converter at an input side and a current to voltage converter at an output side and a calculation of current is performed therein.

Abstract: Method and system for a programmable analog tapped delay line filter are disclosed. One embodiment of the present invention is a programmable analog tapped delay line filter comprising an input line, an output line, and one or more gaincells or taps coupled between the input line and the output line. The input and output lines each comprises a cascade of one or more differential delay cells, and each of the one or more gaincells or taps corresponds to a tap weight or coefficient. Furthermore, the input and output lines are terminated in impedances and the filter produces one or more outputs.

Abstract: The operational flexibility of programmable transversal filters is enhanced by incorporating switch arrays to permit passage for a plurality of tap voltages or signals to particular amplifiers in amplifier arrays. Fixed gain amplifiers may be incorporated to overcome the need to calibrate variable gain amplifiers and to reduced the number of amplifiers required.

Abstract: This invention provides a method for initializing the filter coefficients of a hybrid frequency-time domain adaptive equalizer device implementing frequency domain (FD) filter equalization in a forward path and a time domain (TD) filter equalization in a feedback path, with each filter unit having a plurality of adaptable filter taps.

Abstract: A programmable SAW transversal filter utilizing a finger array and phase shifters to implement unidirectional transducers for providing low insertion loss and reduced or suppressed triple transient echo. A piezoelectric substrate has an input unidirectional transducer and an output unidirectional transducer formed thereon. A surface acoustic wave is transmitted between the input unidirectional transducer and the output unidirectional transducer. Programmable gain devices and phase shifters are coupled to the respective input unidirectional transducer fingers and the output unidirectional transducer fingers forming multi-phase unidirectional transducers. The present invention may be utilized as a transversal filter in many communication devices, and in particular a multi format personal communication system.

Abstract: A circuit (43) generates one or more signals to be delayed by a corresponding time intervals. Tapped delay lines (40) are coupled to the signals, each tapped delay line including a plurality of delay elements (42) and having a plurality of exit points (E) through which said signal may propagate. A test circuit (20) determines a delay associated with a delay element in the circuit and selects one of said exit points of each of said tapped delay lines based on said delay.

Abstract: A variable bandpass filter system passes a selected range of frequencies while rejecting other frequencies in an RF input signal. The system includes a switch and an oscillator. The switch receives the RF input signal and an oscillating calibration signal, and passes the RF input signal or said oscillating calibration signal based on a control signal. The oscillator receives an output of the switch, and frequency and gain control signals. The frequency control signal selects an operating frequency of the oscillator, such that the operating frequency determines a range of frequencies to pass. The gain control signal selects gain of the oscillator, where the oscillating calibration signal allows the oscillator to be calibrated by varying the gain such that the oscillator acts as a filter.

Abstract: The invention relates to a direct-type FIR filter, a method for calculating a scalar product in a FIR filter, and a method for designing a direct-type FIR filter. Successive words of a digital input signal are delayed in a delay line having delays (50A-50D) of the duration of one word, and the scalar product between the variously delayed words derived from the delay line and the corresponding constant coefficients is calculated. In accordance with the invention, calculation of the scalar product comprises a) combining the bits of words at the input (X0) and outputs (X1-X4) of the delay line bit by bit in a network of bit-serial subtractor and/or adder elements (51-56) wherein at least one of the bit-serial elements is involved in the multiplication operation of at least two different coefficients, and b) multiplying (49A-K) the multiplication results from the network by powers of two, and summing together (45-48) the results to yield the scalar product.

Abstract: In a tunable recursive filter implemented in a microwave monolithic integrated circuit (MMIC), a second-order recursive filter included two first order filters, having first and second transmission lines, respectively, connected in parallel. An amplifying unit having a cascode amplifier is arranged in a forward path shared by the two first-order filters. A combiner receives an input signal and a first and second feedback signals fed back through the first and second transmission lines, respectively, and combines such signals to output a combined signal. The amplifying unit amplifies the combined signal and outputs an amplified signal. A divider divides the amplified signal from the amplifying unit, outputs a first portion of the divided signal, and feeds back a second and third portion of the divided signal through the first and second transmission lines.