Abstract: An object of the invention is to provide a semiconductor device and an adjusting method for a semiconductor device wherein power source noises and noises radiated as radio waves can be reduced and power source noises inside the semiconductor device can be cut. The open stub OS1 is formed in the upper wiring layer of the semiconductor device 1. The stub length L1 is set to a length of ¼ of the wavelength of the known frequency containing peak components of noises. The noise receiving part AT1 is disposed adjacent to the open stub OS1. The open stub OS1 is connected to the power source wiring 4 by an interlayer wiring 6. The noise receiving part AT1 is biased to a ground potential. The basic wave component and odd-number harmonic waves of noises that are generated from the PLL circuit 11 and propagate (the arrow Y1 of FIG. 2) in the power source wiring 4 are reflected (arrow Y2 of FIG. 2) by the open stub OS1 so as to return to the PLL circuit 11, and do not reach the filter circuit 12.

Abstract: The present invention is directed to adjust a resistance value of an output buffer on the basis of a resistance value of an external resistor. A potential according to a resistance ratio between an external resistor and each of resistance adjusters is detected by a code generator. In the code generator, code signals for adjusting resistance are adjusted in accordance with the detection result. The resistance value of each of the resistance adjusters is adjusted to an external resistor. Further, by code signals with which the resistance value of each of the resistance adjusters is adjusted to the resistance value of the external resistor, the resistance of the resistance value of an output buffer is adjusted.

Abstract: This invention effectively prevents potential fluctuation in the power supply terminal of a semiconductor device, that is, noise from flowing out to a main power supply wiring. A multilayer print circuit board includes a first power supply via hole which connects to the power supply terminal of a semiconductor integrated circuit on a first surface layer and extends from the first surface layer to a second surface layer, a ground via hole which connects to a ground conductive layer, extends from the ground conductive layer to the second surface layer, and connects to the first power supply via hole on the second surface layer through a bypass capacitor, a first clearance hole which is formed in a power supply conductive layer, and a second clearance hole which is formed in the ground conductive layer. The first clearance hole is larger than the second clearance hole.

Abstract: The present invention discloses a class of independent or linked facing tuning elements to be used in loadpull high gamma slide-screw tuner consisting of a radio-frequency (RF) transmission media comprising impedance tuning elements such as probes, corrugated probes, multi-section probes or single stub/double stub harmonic resonators. Multiple carriages can support multiple pairs of independent or dependent facing tuning elements. This invention, by decreasing the distances between the probes, allows the increasing of the modulus of the VSWR/Gamma. Also two dependent probes can be controlled with only two remote controls, one for the VSWR/Gamma phase control and another one for the VSWR/Gamma amplitude control.

Abstract: An impedance tuner may include a transmission media for propagating RF signals, a reflection magnitude control device mounted in a fixed position relative to a direction of signal propagation along said transmission media, and a phase shifter to control a reflection phase. A multi-section probe for an impedance tuner system may include a plurality of probe sections and a holder structure for mechanically supporting the plurality of probe sections.

Abstract: A method and apparatus for dynamically varying the impedance of a tank circuit whereby, over time, the response of the circuit to a received signal is maximized.

Abstract: An impedance matching system may be used, for example, for impedance matching between a transmitter/receiver front-end and an antenna in a mobile communication device. In a tuneable impedance matching system according to the invention a tuneable impedance matching circuit (508) is used also as a measuring circuit for obtaining a value of a load impedance. A real part and an imaginary part of a load impedance (503) is calculated based on voltages measured on nodes of the tuneable impedance matching circuit and on known component values of the tuneable impedance matching circuit. Values for adjustable electrical components (504, 505) of the tuneable impedance matching circuit are determined based on the obtained load impedance value and on an impedance matching condition.

Abstract: Disclosed is an impedance adjustment circuit including a comparator and a resistor control circuit. The comparator compares the resistance value of an external resistor and that of a replica resistor that forms a replica of a terminal resistor. The resistor control circuit includes a replica resistor control counter, a resistor-under-adjustment control signal holding circuit and a monitor circuit. The replica resistor control counter counts up and down based on the comparison result by the comparator to output a control signal to the replica resistor. The resistor-under-adjustment control signal holding circuit holds a control signal that is delivered to the terminal resistor.

Abstract: Aspects of a method and system for frequency selection using microstrip transceivers for high-speed applications may include determining an operating frequency for operating one or both of a transmitter and a receiver. A frequency response and/or impedance of one or more transmission lines that may be utilized by the transmitter and/or the receiver may be controlled by adjusting one or more capacitances, communicatively coupled to the transmission lines based on the determined operating frequency. The capacitances may be coupled to the one or more transmission line at arbitrary physical spots, and may comprise capacitors and/or varactors. The capacitors and/or the varactors may be adjusted with a digital signal or an analog signal. The capacitances may comprise a matrix arrangement of capacitors and/or varactors. The one or more transmission lines may comprise a microstrip.

Abstract: An evaluation board having an interconnection line pattern formed thereon is disclosed. The interconnection line pattern has a first end to be connected to a cable assembly and a second end to be connected to a measurement device measuring the transmission characteristic of the cable assembly. The evaluation board includes an equalizer circuit equalizing the transmission characteristic of the cable assembly.

Abstract: A harmonic rejection tuner, used for reflecting RF power at the harmonic frequencies in a load pull measurement setup, uses adjustable capacitive loading of open quarter wavelength long resonator stubs in order to vary the electrical length and thus the resonant frequency of the resonators. Since the resonators themselves are by nature narrowband, this frequency adjustability allows for a higher frequency bandwidth and better coverage of operational frequency range of the test setup. Since load pull measurements are carried out mostly at fixed frequencies, adjustment of the capacitive loading can be either manual or by remote control. Capacitive loading the resonator stubs allows DC bias to be applicable to the device under test through the tuner.

Abstract: According to the general concept disclosed herein, a circuit for adaptive matching of a load impedance to a predetermined load-line impedance of a load-line connected to a power amplifier output includes a fixed matching network between the power transistor and an adaptive matching network, whereby the fixed matching network acts as an impedance inverter which results in a relatively low insertion loss at high power. Results indicate that the impedance-inverting network can be used over more than a factor of 10 in impedance variation. Further, the usage of the fixed matching network, close to the power transistor, allows for the implementation of transmission zeros and/or for a well defined load impedance at a predetermined harmonic frequency, independent of the (variable) load impedance at the fundamental frequency.

Abstract: An impedance adjusting circuit includes a semiconductor device accommodated in a semiconductor device case which has case pins and having a folded conductive line; an external reference resistor connected between a positive power supply line and a first one of the case pins, wherein a first line between the first case pin and the semiconductor device has a specific resistance; a first reference voltage generation resistor connected between the power supply line and a second one of the case pins; a second reference voltage generation resistor connected between the ground and a third one of the case pins; a resistance circuit comprising a second line between the second case pin and the folded conductive line and a third line between the third case pin and the folded conductive line, wherein a resistance between the second case pin and the third case pin is equal to the specific resistance; and a fourth line connected from the semiconductor device to the ground through the second reference voltage generation res

Abstract: A signal transmission circuit comprising: first and second transmission lines connected to each other; a first impedance storage circuit storing an impedance of the first transmission line; and a control circuit that outputs match information between an impedance of the second transmission line and the impedance stored in the first impedance storage circuit.

Abstract: An apparatus for matching impedance within a Radio Frequency (RF) integrated circuit is presented. The apparatus includes a first impedance element placed in an RF signal path, an first inductor fabricated on the integrated circuit and connected to the first impedance element, and an adjustable capacitance circuit connected in series with the first inductor and placed between the first inductor and a ground node, where the adjustable capacitance circuit is adjusted to tune the inductance of the first inductor. A method for tuning an inductor is presented. The method includes ascertaining a target inductance value for an inductor in a RF integrated circuit, and determining a capacitance value of an adjustable capacitance circuit so that, when coupled to the inductor, the combined impedance of the adjustable capacitance circuit and the inductor is tuned to the ascertained target inductance value.

Abstract: An embodiment of the present invention provides an apparatus, comprising an RF matching network connected to at least one RF input port and at least one RF output port and including one or more voltage or current controlled variable reactive elements, a voltage detector connected to the at least one RF output port via a variable voltage divider to determine the voltage at the at least one RF output port and provide voltage information to a controller that controls a bias driving circuit which provides bias voltage or bias current to the RF matching network, and wherein the RF matching network is adapted to maximize RF power transferred from the at least one RF input port to the at least one RF output port by varying the voltage or current to the voltage or current controlled variable reactive elements to maximize the RF voltage at the at least one RF output port.

Abstract: The invention relates to an impedance matching circuit including: an input terminal for receiving an input signal; a variable impedance unit, coupled to the input terminal, having an equivalent impedance for providing the input terminal with an input impedance; a signal quality evaluating unit, coupled to the input terminal, for evaluating a signal quality of the input signal; and a control unit coupled to the variable impedance unit and the signal quality evaluating unit, for outputting a target control signal according to an evaluating result of the signal quality evaluating unit to adjust the equivalent impedance of the variable impedance unit.

Abstract: There is provide a mobile radio apparatus capable of suppressing a mismatching loss, and increasing a transmission/reception sensitivity by means of instantly and adaptively matching the impedance between the antenna and the transmission/reception circuit whatever situation a mobile radio apparatus, such as a mobile phone or the like, may be. In a mobile radio apparatus (1), when starting control of the matching circuit (102), a control section (105) evaluates an initial chromosome stored in a storage section (106), and if there is an initial chromosome for providing an impedance matching, controls the matching circuit (102) so as to have a load value corresponding to this initial chromosome. If there is no initial chromosome for providing the impedance matching, the control section (105) evolves the initial chromosome with a genetic algorithm, derives a chromosome for providing the impedance matching, and controls the matching circuit (102) so as to have a load value corresponding to the derived chromosome.

Abstract: Apparatus and methods are provided that are adapted to match the impedance of an electrical load to an impedance of an electrical signal generator. The invention includes providing a plurality of electrical components adapted to collectively match the impedance of the electrical load to the impedance of the electrical signal generator. The electrical components are arranged symmetrically and concentrically about an axis. Additionally, the invention may also include a first connector adapted to electrically couple the electrical signal generator to the electrical components. Additionally, the invention may also include a second connector adapted to electrically couple the load to the electrical components. Numerous other aspects are provided.

Abstract: A method and an apparatus are provided for impedance matching using an analog circuit. The method comprises providing the analog circuit to substantially match a start impedance to an end impedance and tuning a performance parameter of an associated circuit using the analog circuit operating at a high power level. The analog circuit may transform the start impedance to the end impedance using a characteristic impedance in a range above the start impedance and the end impedance. By reconfiguring the analog circuit, the associated circuit may operate at one of a first, second, or higher order frequency bands. By using a matching transformation process, reconfigurable matching circuits for medium and/or high power applications may be provided by using available lower power reconfiguration elements. In the matching transformation process, the intermediate impedance at which the reconfiguration is performed is higher than the matching processes used for lower power reconfiguration elements.

Abstract: In a semiconductor circuit, an impedance adjustment circuit having the characteristics same as those of a circuit having the nonlinear resistance characteristics is configured to include an operating point calculation circuit automatically calculating an operating point with a reference resistance through feedback control, and an impedance calculation circuit calculating the impedance at the operating point found by the operating point calculation circuit. The impedance adjustment circuit is also provided with an impedance determination circuit that determines whether or not the impedance found by the impedance calculation circuit is in a predetermined range. These components, i.e., the operating point calculation circuit, the impedance calculation circuit, and the impedance determination circuit, are provided each two for High-side and Low-side impedance adjustment use.

Abstract: A ferro-electric (FE) tunable antenna matching circuit is provided for a multi-band antenna. The tunable matching circuit is integrated with a diplexer on one substrate. The tunable matching circuit has a first and second inductor coupled to the antenna. The second inductor is couple to a first capacitor and a second capacitor. One side of the second capacitor forms an input/output port for connection to a duplexer. One or more of the matching circuit elements is a ferro-electric (FE) tunable component.

Abstract: An apparatus and a method for applying high voltage with high frequency. The apparatus includes a power generator for generating electric power with predetermined frequency, a voltage transformer receiving the electric power generated by the power generator, amplifying voltage of the electric power received, and applying the amplified voltage to a load, and an impedance matcher connected between the power generator and the voltage transformer to match impedances of the power generator and the voltage transformer to thereby transmit the electric power to the voltage transformer. High voltage with high frequency is obtained by transmitting the electric power generated from the power generator to the load without reflecting loss while conducting an impedance matching, and amplifying the voltage applied to the load using the coupled inductor and LC resonance.

Abstract: Provided are an impedance matching method and a matching system performing the same. The method includes: measuring an electrical characteristic of the power transmission line; determining a pulse mode of the power source; extracting a control parameter for impedance matching from the electrical characteristic of the power transmission line; and controlling the matching system through the control parameter, wherein the matching system is controlled differently according to the pulse mode.

Abstract: In a transmitting arrangement a power amplifier is coupled to a radio-frequency antenna arrangement via a controllable matching apparatus. This allows direct impedance transformation of the output of the power amplifier to the input of the radio-frequency antenna arrangement. There is no need for transformation to the 50 ohm standard. The power amplifier, matching apparatus and a control circuit for controlling the impedance of the matching apparatus form a functional unit, which is advantageously in the form of a monolithically integrated structure in a semiconductor body. A receiving arrangement is produced in the same way, comprising an antenna, a filter device and a matching apparatus connected between them.

Abstract: An apparatus comprising including a matching circuit; a first variable reactance component, having a first range of reactance values, and connected to the matching circuit and connectable to an antenna element operable in a first frequency band and a second frequency band; a second variable reactance component, having a second range of reactance values, and connected to the matching circuit; a detector for detecting a parameter, indicative of the impedance of the apparatus, over at least a part of the first range and second range of reactance values; and a controller configured to determine, using information provided by the detector, optimum ratios of second reactance values to first reactance values, at a frequency in the first frequency band, and configured to select a first optimum ratio when the second frequency band is greater than the first frequency band and configured to select a second different optimum ratio when the second frequency band is less than the first frequency band.

Abstract: An impedance matching apparatus has: a storing portion 70 for previously storing, for plural positions which can be taken by a movable portion of a variable impedance element, allowable power values respectively corresponding to the plural positions of the movable portion; and an abnormality determining portion 80 for determining an allowable power value based on the present positions of the movable portion supplied from position detecting portions 41, 42 and the allowable power values stored in the storing portion 70, for comparing the allowable power value with an input power value, and for determining that it is abnormal when the input power value is larger than the allowable power value. Accordingly, the calculation load during the matching operation can be reduced.

Abstract: A closed-loop controlled antenna tuning unit (ATU) system includes a return loss detector connected to sample an RF signal generated by a signal source to provide a return loss signal. A matching state searching circuit is connected to receive the return loss signal and, in response, selectively store a return loss value and an impedance matching state. A central controller is connected to provide a switch control signal and apply an optimum matching state to the impedance synthesizer at the conclusion of the matching state search. An impedance synthesizer is responsive to the switch control signal for coupling a radio frequency signal and matching the impedance of an antenna to a signal source.

Abstract: An embodiment of the present invention provides an apparatus, comprising an RF matching network connected to at least one RF input port and at least one RF output port and including one or more voltage or current controlled variable reactive elements; a voltage detector connected to the at least one RF output port via a variable voltage divider to determine the voltage at the at least one RF output port and provide voltage information to a controller that controls a bias driving circuit which provides voltage or current bias to the RF matching network; a variable voltage divider connected to the voltage detector and implemented using a multi-pole RF switch to select one of a plurality of different resistance ratios to improve the dynamic range of the apparatus; and wherein the RF matching network is adapted to maximize RF power transferred from the at least one RF input port to the at least one RF output port by varying the voltage or current to the voltage or current controlled variable reactive elements to

Abstract: A circuit device has a passive network (101) with an input (109) and an output, the output of the passive network (101) forming an output terminal (103) of the circuit device and a feedback path coupling the output terminal (103) of the circuit device to the input (109) of the passive network (101), the feedback path having an amplifier (107) configured to adjust an attenuation of the circuit device.

Abstract: A resistance adjusting circuit including a semiconductor integrated circuit includes a reference voltage generating circuit which generates a reference voltage corresponding to a resistance of an external resistor element connected to the semiconductor integrated circuit, a comparison voltage generating circuit which comprises a replica resistor circuit whose resistance is adjusted according to a resistance control signal and generates a comparison voltage corresponding to a resistance of the replica resistor circuit, a main body resistor circuit which has substantially the same configuration as that of the replica resistor circuit and whose resistance is adjusted according to the resistance control signal, and a control signal generating circuit which receives the reference and comparison voltages and converts the voltages to frequency signals corresponding to the voltages, integrates the frequency signals to produce integration data of the frequency signals, and generates the resistance control signal based

Abstract: The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear frequency response, which diminishes signal integrity and limits the bandwidth of the bus. A compensating element, such as a capacitor which ties the bus to a reference plane (e.g., a ground potential), or an inductor wired in series with the bus, is located approximately midway between the memory controller and the memory slots. The use of the compensating element equalizes signal amplitudes and minimizes phase errors of signals in an interested frequency range and diminishes the amplitudes of high frequency signals which exhibit high degrees of phase error. The resulting bus structure has increased desirable harmonic content with low phase error, thereby permitting the bus to exhibit better rise time performance and permitting a higher data transfer rate.

Abstract: Provided is an impedance matching network having: an amplitude-adjusting variable capacitor and a phase-adjusting variable capacitor that are positioned between an input terminal and an output terminal, matching being achieved by adjustment of values of the variable capacitors; a first capacitor connected in series to one of the variable capacitors; a first switch connected in parallel to the one of the variable capacitors; and a unit operable to a) keep the first switch to an ON state while the input terminal does not receive RF power, and b) bring the first switch to an OFF state immediately after an initial start-up of a load connected to the output terminal after the input terminal has started to receive RF power.

Abstract: A system and method for managing distribution of wideband radio frequency signals includes detecting an impedance signature of a device connected at the end of transmission medium. A switch is opened to apply a wideband radio frequency signal to a transmission medium for distribution. A biasing voltage can be applied to the transmission medium based on the detected impedance signature. A signal conditioning circuit is selected based on the amplitude of the biasing voltage, and the wideband radio frequency signal is distributed to an output device.

Abstract: Provided are an impedance matching method and a matching system performing the same. The method includes: measuring an electrical characteristic of the power transmission line including the matching system and the load; extracting a control parameter for impedance matching from the electrical characteristic of the power transmission line; and controlling the matching system by using the control parameter. The extracting of the control parameter comprises utilizing an analytic coordinate system that quantitatively relates the electrical characteristic of the matching system to the electrical characteristic of the power transmission line.

Abstract: A bipolar pulse forming transmission line module for linear induction accelerators having first, second, third, fourth, and fifth planar conductors which form an interleaved stack with dielectric layers between the conductors. Each conductor has a first end, and a second end adjacent an acceleration axis. The first and second planar conductors are connected to each other at the second ends, the fourth and fifth planar conductors are connected to each other at the second ends, and the first and fifth planar conductors are connected to each other at the first ends via a shorting plate adjacent the first ends. The third planar conductor is electrically connectable to a high voltage source, and an internal switch functions to short a high voltage from the first end of the third planar conductor to the first end of the fourth planar conductor to produce a bipolar pulse at the acceleration axis with a zero net time integral.

Abstract: An electrical component is described with a first signal path (TX, RX1) and a second signal path (RX, RX2) that are connected to a common signal path (ANT, RX12). In the first signal path a first filter (F1) is arranged, and in the second signal path a second filter (F2) is arranged. The component comprises a first matching circuit (MA1) that comprises a shunt arm to ground. In the shunt arm, an inductor (L) is arranged, which is connected to the first signal path, the second signal path, and the common signal path. The component comprises a carrier substrate (SU) on which the filters (F1, F2), which are preferably implemented as chips, are mounted. The inductor (L) is integrated in the carrier substrate (SU).

Abstract: The invention relates to a compact automatic impedance adapter in a waveguide, characterised in that the impedance is controlled by plungers, filling the entire guide with a magic-tee coupler plane E/plane H modifying the electrical and magnetic field, one plunger modifying the electrical field (E) in the guide and the second modifying the magnetic field (H).

Abstract: An impedance adjusting circuit includes a semiconductor device accommodated in a semiconductor device case which has case pins and having a folded conductive line; an external reference resistor connected between a positive power supply line and a first one of the case pins, wherein a first line between the first case pin and the semiconductor device has a specific resistance; a first reference voltage generation resistor connected between the power supply line and a second one of the case pins; a second reference voltage generation resistor connected between the ground and a third one of the case pins; a resistance circuit comprising a second line between the second case pin and the folded conductive line and a third line between the third case pin and the folded conductive line, wherein a resistance between the second case pin and the third case pin is equal to the specific resistance; and a fourth line connected from the semiconductor device to the ground through the second reference voltage generation res

Abstract: A system and a method for on-chip impedance matching, of at least two ports: an output source and an input load. The system includes an on-chip integrated impedance matching circuit (IMC) that comprises: at least one variable capacitor; a control unit that enables tuning of the variable capacitor, receiving and transmitting of signals and processing of signals; and at least one peak detector that enables detection of signal peaks (SP). Control unit enables determining of a substantially optimal signal peak and tuning of the variable capacitor to a substantially optimal capacitance that is corresponding to the said optimal signal peak. The highest signal peak provides the substantially optimal impedance matching between the ports.

Abstract: A circuit matches the load impedance of an electronic device. The circuit comprises an impedance network, a control circuit suitable for varying the impedance of said network and a sensor coupled with said network and said load and suitable for detecting the ratio between the incident and reflected standing waves in transferring power from the electronic device to the load; the sensor is suitable for providing two signals substantially proportional to the incident and reflected amplitude of the waves at the control circuit. The impedance network is a network of variable resistances and the control circuit is suitable for varying the value of the resistances to lower said ratio between the incident and reflected standing waves to a value that ensures the transfer of power from the electronic device to the load.

Abstract: An embodiment of the present invention provides a power amplifier, comprising tunable impedance matching circuit including a plurality of tunable dielectric varactors and a DC voltage source interface capable of providing voltage to said plurality of said tunable dielectric varactors.

Abstract: An embodiment of the present invention provides an apparatus, comprising a filter; and a matching network coupled to the filter, the matching network including a plurality of voltage tunable dielectric varactors.

Abstract: An embodiment of the present invention provides an apparatus, comprising a delay line and a matching network coupled to the delay line, the matching network including a plurality of voltage tunable dielectric varactors.

Abstract: An automatic tuning apparatus for a filter includes a mode wherein a switching part is controlled so that a reference signal is inputted to the filter, a plural number of control signals are successively input to a control terminal of the filter, a tentative value of the control signal is determined based on respective amplitudes detected by an amplitude detection part as a “coarse tuning step”, a plural number of control signals are successively input in the vicinity of the tentatively determined value to a control terminal, and the value of the control signal is determined to be used in a mode as a “fine tuning step” based on respective phase differences detected by a phase comparator part”.

Abstract: The present invention generally provides a cost-effective method and apparatus for matching power source and transducer load impedances for an array of acoustic-wave transducers used in wet processing chambers. In one embodiment, a single radio frequency generator provides power to multiple megasonic transducers. Each transducer contains multiple piezoelectric crystals, and each processing chamber includes multiple megasonic transducers.

Abstract: A satellite antenna switching apparatus has LNB ports to which LNBs are connected, receiver ports to which receivers that exchange signals with the LNBs are connected, cascade ports to which another switching apparatus is cascade-connected, and impedance circuits that function as means for detecting the signals exchanged between the LNBs and receivers. The impedance circuits provide impedances according to the connection states of the cascade ports, and are electrically disconnected from the signal paths when another switching apparatus is cascade-connected to the cascade ports. With this configuration, the satellite antenna switching apparatus suffers from less attenuation of the exchanged signals even in a cascade connection of a plurality of stages of switching apparatuses.

Abstract: Provided are an impedance matching device of a sensor node and an impedance matching method of a sensor node. The impedance matching device comprises: a variable impedance matching unit disposed between a transmission unit, which is used for modulating a received signal to a radio frequency (RF) signal and outputting the RF signal, and an antenna and including a plurality of impedance matching circuits which have different impedance values from each other; a signal intensity measuring unit which measures the intensity of an output signal that is output through the variable impedance matching unit; and a control unit which controls one of the impedance matching circuits of the variable impedance matching unit to have an impedance value that maximizes the intensity of the output signal.

Abstract: An impedance matching apparatus 3 calculates a forward wave voltage Vfo and a reflected wave voltage Vro at an output terminal 3b, based on a forward wave voltage Vfi and a reflected wave voltage Vri at an input terminal 3a, on information on variable values of variable capacitors VC1, VC2 acquired in advance through measurement, and on a T parameter of the impedance matching apparatus 3 corresponding to the information on the variable values of variable capacitors VC1, VC2. The impedance matching apparatus 3 calculates an input reflection coefficient ?i at the input terminal 3a corresponding to the information on the variable values of the variable capacitors VC1, VC2, based on the forward wave voltage Vfo, the reflected wave voltage Vro and the T parameter.

Abstract: A reconfigurable circuit and a related method for its use, the circuit including multiple microelectromechanical systems (MEMS) switches connected between selected points in the circuit. The MEMS switches are controlled to select a desired circuit condition, such as an impedance matching condition, and then the switch conditions may be fused permanently. In the context of an impedance matching circuit, the MEMS switches may be used to optimize matching after circuit fabrication or after packaging, thereby allowing optimization even after potentially performance changing events.