Having Significant Physical Structure Patents (Class 333/185)
  • Patent number: 10566947
    Abstract: A filter for both a differential mode and a common mode is provided. A filter for both a differential mode and a common mode according to an embodiment of the present invention comprises: a pair of series inductors having a plurality of coil patterns; two pairs of parallel capacitors connected to opposite ends of the pair of inductors, respectively; and a pair of series capacitors connected to the pair of inductors in parallel. Therefore, the filter can be used in both a common mode and a differential mode, and can remove noise without using an additional filter in an application having a comparatively high data processing speed.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: February 18, 2020
    Assignee: AMOTECH CO., LTD.
    Inventors: Jong Soo Kim, Jae Su Ryu, Yoon Ho Hwang
  • Patent number: 10566945
    Abstract: The present invention provides a noise suppression device and equivalent circuit thereof. The noise suppression device comprises a metal plate and at least one first resonance unit. The first resonance unit comprises a plurality of first resonators. Each of the first resonators comprises a first metal segment and at least one first conductive connection segment, the first metal segment is connected to the first conductive connection segment. When the first resonance unit is configured on the metal plate, each of the first metal segments is electrically connected to the metal plate by the corresponding first conductive connection segment. When the resonance of the first resonator occurs, a noise transmitted on the metal plate can be conducted to the first resonator and suppressed by the first resonator.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: February 18, 2020
    Assignee: National Taiwan University
    Inventors: Tzong-Lin Wu, Ying-Cheng Tseng
  • Patent number: 10560066
    Abstract: An electronic component capable of downsizing and narrowing of a mounting space. The electronic component includes: a laminated body made up of a plurality of laminated insulator layers and having an upper surface and a bottom surface; a plurality of inner conductors disposed in the laminated body; and a plurality of terminal electrodes electrically connected to the plurality of inner conductors and exposed from the laminated body. The electronic component has a plurality of recesses formed on a bottom surface of the laminated body. The plurality of terminal electrodes includes first conductive parts formed on wall surfaces of the plurality of recesses.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: February 11, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kosuke Ishida
  • Patent number: 10542622
    Abstract: A printed wiring board of the present disclosure includes a power supply layer and a ground layer. A power supply layer pattern to be formed partially on the power supply layer includes a branch and a power supply layer electrode. The branch is a direct-current power feeding path for connecting adjacent electromagnetic band gap (EBG) unit cells, and the power supply layer electrode is connected through a slit provided along the branch. A capacitive coupling element disposed to oppose the power supply layer electrode with an interlayer being provided therebetween has a structure in which the EBG unit cells are disposed at regular intervals, the EBG unit cells being connected to the branch in the power supply layer pattern through a via.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: January 21, 2020
    Assignees: NATIONAL UNIVERSITY CORPORATION OKAYAMA UNIVERSITY, KYOCERA CORPORATION
    Inventors: Yoshitaka Toyota, Kengo Iokibe, Xingxiaoyu Lin, Toshiyuki Kaneko, Masanori Naito, Toshihisa Uehara
  • Patent number: 10530322
    Abstract: A resonant circuit includes a first inductor and a first capacitor which define a first series circuit and a second inductor connected in parallel to the first series circuit. The first inductor and the second inductor are coupled via a magnetic field in a direction in which magnetic fluxes passing through the inductor and the second inductor strengthen each other to effectively increase steepness in a transient band.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: January 7, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroshi Nishida, Kenichi Ishizuka
  • Patent number: 10515750
    Abstract: A coil electronic component includes a substrate; a coil pattern formed on at least one of first and second main surfaces of the substrate; a body region filling at least a core region of the coil pattern and having a magnetic material; and a lead portion forming a portion of an outermost region of the coil pattern and exposed to the outside of the body region. A distance between the lead portion and a portion of the coil pattern which is immediately adjacent to the lead portion and which is disposed between the lead portion and a center of the coil pattern is larger than a distance between adjacent patterns of the coil pattern.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Dong Jin Jeong
  • Patent number: 10498307
    Abstract: An integrated device that includes a substrate, a first interconnect over the substrate and a second interconnect comprising a first portion and a second portion. The integrated device further comprising a first dielectric layer between the first interconnect and the first portion of the second interconnect such that the first interconnect vertically overlaps with the first dielectric layer and the first portion of the second interconnect. The integrated device also includes a second dielectric layer formed over the substrate. The first interconnect, the first dielectric layer and the first portion of the second interconnect are configured to operate as a capacitor. The first portion and the second portion of the second interconnect are configured to operate as an inductor.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: December 3, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Mario Francisco Velez, Niranjan Sunil Mudakatte, Jonghae Kim, Changhan Hobie Yun, David Francis Berdy, Shiqun Gu, Chengjie Zuo
  • Patent number: 10461716
    Abstract: A low-pass filter includes first and second input/output ports, first and second LC parallel resonators connected in series and provided between the first and second input/output ports, and first to third paths. The first path includes a first LC series resonator and connects a first end of the first LC parallel resonator closest to the first input/output port to a ground. The second path includes a second LC series resonator and connects a second end of the second LC parallel resonator closest to the second input/output port to the ground. The third path includes a third-path capacitor and connects a connection point between the first and second LC parallel resonators to the ground.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: October 29, 2019
    Assignee: TDK CORPORATION
    Inventors: Manabu Kitami, Noriyuki Hirabayashi
  • Patent number: 10454444
    Abstract: An analog time delay filter circuit including a first delay circuit block arranged in a modular layout, having a first time delay filter, a first input, a first output, and first and second pass-throughs; and a second delay circuit block arranged in the same modular layout, having a second time delay filter, a second input, a second output, and third and fourth pass-throughs.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: October 22, 2019
    Assignee: Kumu Networks, Inc.
    Inventors: Wilhelm Steffen Hahn, Alfred Riddle, Ernie Landi
  • Patent number: 10454445
    Abstract: A common mode filter includes: a body including a filter portion; first and second external electrodes each including an electrode layer including conductive particles, intermetallic compound (IMC) formation particles, and a resin, and disposed on an external surface of the body; and first and second coils disposed in the filter portion, the first and second coils being connected through lead portions to the electrode layers of the first and second external electrodes, respectively. The conductive particles include a first conductive particle and a second conductive particle having a diameter smaller than that of the first conductive particle.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 22, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Moon Lee, Bon Seok Koo, Kun Hoi Koo, Sung Ryong Ma, Sung Jin Park, Ha Yoon Song
  • Patent number: 10439584
    Abstract: A common mode noise filter includes a laminated body having insulator layers therein and first and second spiral conductors provided on layer planes different from each other. The first spiral conductor includes a first spiral conductor line, a first pad provided at an outer end of the first spiral conductor line, and a second pad provided at an inner end of the first spiral conductor line. The second spiral conductor includes a second spiral conductor line, a third pad provided at an outer end of the second spiral conductor line, and a fourth pad provided at an inner end of the second spiral conductor line. The first spiral conductor line faces the second spiral conductor line. Each of the second pad and the sixth pad overlaps none of the fourth pad and the eighth pad viewing from above.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: October 8, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshiharu Oomori, Atsushi Shinkai, Masakatsu Nawate
  • Patent number: 10424866
    Abstract: A waterproof connector includes a base and a guiding seat. The base includes a seat. The seat includes a bottom plate and a guiding sleeve is connected to the bottom plate. A first waterproof sealing ring is disposed in the connection of the guiding sleeve and the bottom plate. A conductive member is disposed within the guiding sleeve. The conductive member extends through a first fixing seat. A second waterproof sealing ring allows the conductive member to extends therethrough and overlaps the first fixing seat. The second waterproof sealing ring has two grooves formed on two surfaces thereof. The conductive member extends through a second fixing seat, and the second fixing seat overlaps the second waterproof sealing ring. Finally the guiding seat is connected to the guiding sleeve. The guiding seat has a through groove, and the first waterproof sealing ring is sandwiched between an inner surface of the through groove and the outer surface of the guiding groove for the first waterproof element.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: September 24, 2019
    Assignee: F TIME TECHNOLOGY INDUSTRIAL CO., LTD.
    Inventors: Chang-Lin Peng, Xin-Fu Liu, Yen-Hua Huang, Chih-Hsuan Tung
  • Patent number: 10388452
    Abstract: Disclosed herein is a coil component that includes a coil conductor part, and first and second high permeability parts provided respectively on both sides of the coil conductor part in a coil axis direction. The second high permeability part has a larger thickness in the coil axis direction than the first high permeability part. A low permeability part that segments at least a part of a magnetic path exists between the first and second high permeability parts in an outer diameter area of the coil conductor part when viewed in the coil axis direction.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: August 20, 2019
    Assignee: TDK CORPORATION
    Inventors: Toshio Tomonari, Sachiko Takano, Shigeki Sato
  • Patent number: 10354791
    Abstract: An electronic component includes a multilayer body, a primary coil including an n-number primary coil conductor layers and one series coil conductor layer, a secondary coil including an n-number secondary coil conductor layers, and a tertiary coil including an n-number tertiary coil conductor layers. The arrangement includes one primary coil conductor layer, one secondary coil conductor layer, and one tertiary coil conductor layer in this order from a first side to a second side of a laminating direction. The series coil conductor layer is electrically connected in series to the n-number primary coil conductor layers and is provided at the second side of the laminating direction with respect to the tertiary coil conductor layer closest to the second side of the laminating direction.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: July 16, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Katsufumi Sasaki
  • Patent number: 10355660
    Abstract: An electronic component includes two or more first parallel resonators arranged in an orthogonal direction orthogonal or substantially orthogonal to a lamination direction, each first LC parallel resonator including a first inductor and a first capacitor, two second LC parallel resonators surrounding the two or more first LC parallel resonators from both sides in the orthogonal direction, each second LC parallel resonator including a second inductor and a second capacitor, a second capacitor connected to one end of the two second LC parallel resonators, and a first connecting conductor that connects two of the first LC parallel resonators that are not adjacent in the orthogonal direction, or connects one of the first LC parallel resonators and one of the second LC parallel resonators that are not adjacent in the orthogonal direction.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: July 16, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akira Tanaka, Naoshi Ishimaru
  • Patent number: 10340875
    Abstract: An electronic component includes a second inductor including a second inductor conductor that includes a first coupling portion electrically coupled to a second capacitor conductor and a second coupling portion electrically coupled to a second ground conductor, and when viewed in a plan view from a lamination direction, a first region surrounded by a first inductor conductor and the second inductor conductor is smaller in area than a second region surrounded by a third inductor conductor layer and the second inductor conductor, and a second region forming portion, which is included in the second inductor conductor and surrounds the second region, and a first region forming portion, which is included in the second inductor conductor and surrounds the first region, are electrically coupled in series in this order on a path from the first coupling portion to the second coupling portion.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: July 2, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Akira Tanaka
  • Patent number: 10304588
    Abstract: There is described herein a harness (106) that remains neutral until configured by a configuration device (110). Wires that connect to specific pins responsible for the configuration of a system are taken out and connected to a configuration port (108) on the harness (106). The configuration port (108), when mated with the configuration device (110), sets a configuration setting of the system. The configuration device (110) may be used to set the power and/or signal parameters of the harness (106) for a system or to configure various options within the system itself or another system.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: May 28, 2019
    Assignee: C SERIES AIRCRAFT LIMITED PARTNERSHIP
    Inventors: Anthony El Haddad, Philippe Desy, Jean-Guy Gaudreau
  • Patent number: 10284164
    Abstract: A circuit substrate includes a first electrode connecting a capacitance element, a first inductance element including a first interconnect that extends from one end connected to the first electrode to another end across a region at which the capacitance element is to be mounted, a second inductance element including a second interconnect that extends from one end connected to the first electrode to another end across the region at which the capacitance element is to be mounted from a side opposite to the first interconnect, an input terminal connected to the another end of the second interconnect, an output terminal connected to the another end of the first interconnect, and a second electrode that provides a capacitance between the output terminal and the second electrode, wherein the capacitance provided by the output terminal and the second electrode is equal to or larger than a capacitance of the capacitance element.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: May 7, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Atsushi Toujo
  • Patent number: 10263170
    Abstract: A technique relates a structure. An inductive element is on a first surface. A capacitive element is on the first surface and a second surface. An interconnect structure is between the first surface and the second surface.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 16, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Markus Brink, Antonio D. Corcoles-Gonzalez, Jay M. Gambetta, Sami Rosenblatt, Firat Solgun
  • Patent number: 10262805
    Abstract: A variable capacitance element includes variable capacitance layers made of a dielectric material, paired electrodes located on both main surfaces of the variable capacitance layers opposite to each other across the variable capacitance layers, insulating elements; and at least one pair of lead-out elements. The variable capacitance layers and the insulating elements are alternately laminated to provide a laminated body. The variable capacitance layers and the paired electrodes define capacitor structures, and the lead-out elements are electrically connected at one end thereof to an electrode defining the capacitor structures, penetrate the insulating elements, and are electrically connected at the other end to external electrodes or other electrical elements.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: April 16, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Keisuke Kageyama
  • Patent number: 10253929
    Abstract: Disclosed is a lamp (1) comprising a driver circuit board (16) and a base (2) which are electrically connected to one another by a plug connector (3, 17). The invention applies to semiconductor lamps, for example, especially LED lamps, in particular retrofit lamps, e.g. to replace conventional incandescent lamps or halogen lamps.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: April 9, 2019
    Assignee: LEDVANCE GMBH
    Inventors: Klaus Eckert, Michael Rosenauer
  • Patent number: 10209296
    Abstract: In a testing circuit performing a testing operation to detect an RF circuit characteristic, a first filter unit is provided, having a first external terminal electrically coupled to a testing signal and a second external terminal electrically coupled to an RF circuit of the RF device. The first filter unit is configured to allow the testing signal to enter the RF circuit while blocking an RF signal transmitted in the RF circuit from entering the testing circuit. In addition, a testing-result informing unit is provided, having an external input electrically coupled to the first external terminal, and generating an informing signal, which indicates a condition of the RF circuit according to an electric level at the external input.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: February 19, 2019
    Assignee: ALPHA NETWORKS INC.
    Inventors: Rong- Fa Kuo, Ming-Chih Peng
  • Patent number: 10200012
    Abstract: A high-frequency filter (10) includes resonators (21, 31, and 32), an inductor (41), and a switch (51). The resonator (21) is connected between a first input/output terminal (P1) and a second input/output terminal (P2). One end of the inductor (41) is connected between the resonator (21) and the first input/output terminal (P1). One end of the resonator (31) is connected to the other end of the inductor (41). The switch (51) selects either a connection portion that connects the inductor (41) and the resonator (31) or the resonator (32) and connects either the connection portion or the resonator (32), which has been selected, to a terminal of the resonator (21) on the side of the second input/output terminal (P2). The switching between the connection modes of the switch (51) changes the circuit configuration of the high-frequency filter (10).
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: February 5, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideki Tsukamoto, Masakazu Tani
  • Patent number: 10200009
    Abstract: A transformer-based balun circuit is disclosed herein. The balun can be implemented using a spiral transformer, where primary and secondary transformer windings can be inductively coupled and can be implemented on the same metal layer (or different metal layers, e.g. vertically adjacent metal layers). The balun can further include a compensation capacitor and a digital frequency tuning circuit. The compensation capacitor can be introduced at one of the differential terminals to reduce or suppress the amplitude and phase imbalance. The digital frequency tuning circuit can be a switchable bank of capacitors, which allows for tuning the frequency of operation of the transformer-based balun.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: February 5, 2019
    Assignee: Analog Devices Global
    Inventors: Mohamed A. Abdalla, Mohamed Mobarak, Ahmed Ibrahim Khalil
  • Patent number: 10199157
    Abstract: An inductor has a conductor layer formed by multiple concentric co-planar turns of ultra-thick metal (UTM) adapted to receive current at a frequency of at least one gigahertz. The multiple turns of UTM proceed from an innermost turn to an outermost turn, and aluminum stacking is provided over all of the UTM turns except at least the innermost turn, thereby optimizing the Q of the inductor.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: February 5, 2019
    Assignee: Intel IP Corporation
    Inventors: Chi-Taou Robert Tsai, Lillian Lent, Curtiss Roberts, Cindy Muir
  • Patent number: 10158338
    Abstract: A circuit structure is disclosed, wherein the circuit structure comprises: a substrate comprising a top surface, a bottom surface and lateral surfaces connecting the top surface and the bottom surface; a plurality of conductive layers disposed over the top surface of the substrate, wherein a dielectric layer is disposed between each two adjacent conductive layers, wherein at least one capacitor is formed by a first portion of the plurality of conductive layers with the dielectric layers therebetween, and wherein at least one first inductor is formed by a second portion of the plurality of conductive layers; and at least one conductive pattern layer disposed over at least one of the lateral surface to form at least one second inductor, wherein a third portion of the plurality of conductive layers electrically connects with said at least one capacitor, said at least one first inductor and said at least one second inductor.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: December 18, 2018
    Assignee: CYNTEC CO., LTD.
    Inventor: Shih-Hsien Tseng
  • Patent number: 10135421
    Abstract: A bulk-acoustic wave filter device includes: a first substrate; a first filter disposed on the first substrate, within a cavity of the bulk-acoustic wave filter device; a second substrate coupled to the first substrate; a second filter disposed on the second substrate, within the cavity and facing the first filter; a first inductor layer disposed on the first substrate and around the first filter; a second inductor layer disposed on the second substrate and around the second filter, and bonded to the first inductor layer; and a sealing member sealing the cavity, together with the first and second inductor layers.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: November 20, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Seong Jong Cheon
  • Patent number: 10110191
    Abstract: A laminate defining a high-frequency laminated component includes a ground electrode on a bottom surface of a lowermost insulating layer. A second insulating layer includes an inner-layer ground electrode arranged over substantially the entire surface thereof. A portion from a third insulating layer to a fifth insulating layer is provided with a capacitor electrode defining a series capacitor of a ground impedance adjustment circuit and capacitor electrodes defining a first parallel capacitor and a second parallel capacitor. A sixth insulating layer has an inner-layer ground electrode provided over substantially the entire surface thereof. The inner-layer ground electrodes are arranged in electrical continuity with the ground electrode by via holes.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: October 23, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Tetsuo Taniguchi
  • Patent number: 10110192
    Abstract: An electronic component includes a multilayer body and a first resonator. The multilayer body includes insulating layers stacked on each other in a stacking direction. The first resonator includes a first inductor and a first capacitor disposed in the multilayer body. The first inductor is defined by a conductive layer disposed on an insulating layer of the plurality of insulating layers and an interlayer connecting conductor which passes through an insulating layer of the plurality of insulating layers in the stacking direction connected to each other so that the first inductor preferably has a helical or substantially helical shape as viewed from a first direction perpendicular or substantially perpendicular to the stacking direction. A certain portion of the first inductor is located on a predetermined plane perpendicular or substantially perpendicular to the first direction, and a remaining portion of the first inductor is displaced from the predetermined plane in the first direction.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: October 23, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kunihiro Watanabe
  • Patent number: 10102961
    Abstract: A laminated inductor includes a ceramic body, a coil part including a plurality of first internal electrodes including connection portions at both end portions thereof and disposed in the ceramic body in a spiral shape, a second internal electrode including a lead electrode portion exposed to the outside of the ceramic body, having an internal area smaller than that of the first internal electrode, and disposed on or below the coil part in a spiral shape, and a connection electrode portion extended from the second internal electrode in a direction opposite to the lead electrode portion.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: October 16, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ju Hyun Kim, Yun Suk Oh
  • Patent number: 10096427
    Abstract: The electronic component includes a substantially rectangular parallelepiped multilayer body formed by laminating a plurality of insulation layers, a capacitor including a plurality of capacitor conductor layers provided on the insulation layers, and a substantially spiral-shaped inductor including one or more inductor conductor layers provided on the insulation layers and having a center axis extending along the lamination direction. A mounting surface of the multilayer body is a surface of the multilayer body located on the end of one side of a first orthogonal direction orthogonal to the lamination direction. The inductor conductor layer and the capacitor conductor layer are provided on the first insulation layer. On the first insulation layer, an end portion of the capacitor conductor layer on the one side of the first orthogonal direction are closer to the mounting surface than an end portion of the inductor conductor layer on the one side of the first orthogonal direction.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: October 9, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Masayuki Yoneda
  • Patent number: 10096417
    Abstract: In a common mode noise filter, first coil (12) includes first coil conductor (16) and second coil conductor (17) with spiral shapes. Second coil (13) includes third coil conductor (18) and fourth coil conductor (19) with spiral shapes. First coil conductor (16), third coil conductor (18), second coil conductor (17), and fourth coil conductor (19) are placed in this order from above. First metal layer (14) configured to be connected to a ground is provided above first coil conductor (16).
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: October 9, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshiharu Omori, Kenichi Matsushima, Ryohei Harada, Kenji Ueno, Atsushi Shinkai, Nariaki Ishida, Takeshi Ichihara
  • Patent number: 10090239
    Abstract: A Metal-Insulator-Metal on-die capacitor is described with partial vias. In one example, first and second power grid layers are formed in a semiconductor die. The power grid layers have power rails. First and second metal plates are formed in metal layers of the die between the power grid layers. Full vias extend from a power rail of the first polarity of the first power grid layer to a first side of the second metal plate and from a second side of the second metal plate opposite the first side of the metal plate to a power rail of the first polarity of the second power grid layer. Partial vias extend from the power rail of the first polarity of the second power grid layer and end at the second side of the second metal plate.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: October 2, 2018
    Assignee: Intel Corporation
    Inventors: Jayong Koo, Suzanne L. Huh
  • Patent number: 10075144
    Abstract: Systems and methods for enhanced high frequency power bias tee designs are provided. In one embodiment, a bias tee network comprises: a first port configured to couple across a data line comprising a first electrically conducting line and a second electrically conducting line; a second port configured to couple to a power port of an electrical device; and a distributed impedance interface coupled between the power supply unit and the differential data line, wherein the distributed impedance interface includes a ferrite impedance gradation network having a plurality of ferrite impedance elements series coupled in an order of progressing impedance, wherein a low impedance end of the first ferrite impedance gradation network is coupled to the first port.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: September 11, 2018
    Assignee: CommScope Connectivity UK Limited
    Inventor: Ian Miles Standish
  • Patent number: 10069198
    Abstract: The invention relates to a compact multi-level antenna including: a ground plane; a radiating element including n?2 portions extending in n?2 parallel planes in a planar pattern, the planes defining a volume above the ground plane, the radiating element including a first end connected to the ground plane and a second end ending with an open circuit.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: September 4, 2018
    Assignee: Institut Mines Telecom/Telecom Bretagne
    Inventor: Jean-Philippe Coupez
  • Patent number: 10070517
    Abstract: An electronic component (11) is embedded in an end portion of a surface (P1) and an end portion of a surface (P2) adjacent to each other in a three-dimensional base (2). The portion of an electrode (21) exposed from the surface (P1) and an electrode (101) of a packaged IC (41) are connected to each other via a wiring line (201). The portion of the electrode (21) exposed from the surface (P2) and an electrode (25) of an electronic component (15) are connected to each other via a wiring line (202). Accordingly, it is possible to realize a three-dimensional circuit structure requiring no wiring line spanning over or along an end portion thereof.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: September 4, 2018
    Assignee: OMRON Corporation
    Inventor: Wakahiro Kawai
  • Patent number: 10056540
    Abstract: A system for adjusting qubit frequency includes a qubit device having a Josephson junction and a shunt capacitor coupled to electrodes of the Josephson junction. A cantilevered conductor is separated from the shunt capacitor by a spacing. An adjustment mechanism is configured to deflect the cantilevered conductor to tune a qubit frequency for the qubit device.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: August 21, 2018
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, Jerry M. Chow, Jay M. Gambetta, John A. Smolin
  • Patent number: 10056667
    Abstract: A signal transmission cable including a high-Q value band-elimination filter includes a first signal line conductor pattern including a first capacitor conductor portion and an inductor conductor portion on a first base layer. The first capacitor conductor portion includes a flat conductor, and the inductor conductor portion has a spiral shape. A second signal line conductor pattern including a second capacitor conductor portion is provided on a second base layer. The inductor conductor portion constitutes an inductor, and the first and second capacitor conductor portions and the first base layer constitute a capacitor. The inductor and the capacitor are connected in parallel by transmission conductor portions on the first and second base layers and an interlayer-connector conductor on the first base layer.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: August 21, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kuniaki Yosui
  • Patent number: 10038290
    Abstract: Various examples of a connector device for connecting an electronic device with an external electronic device are described.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: July 31, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cheol-Yoon Chung, Dong-Sub Kim, Kwang-Min Gil, Yu-Ji Yu, Byoung-Hee Lee, Cheol-Ho Lee
  • Patent number: 10014575
    Abstract: An electronic device is provided. The electronic device includes an antenna radiator configured to operate in at least one frequency band, a ground stub disposed at a coupling location in proximity to the antenna radiator, and a switching device configured to selectively ground the ground stub and a ground of a main board. Thus, the present disclosure is easily applicable without design constraints in terms of space use when the main board and the antenna radiator are separated, and simplifies the assembly and reduces the cost without a separate sub-board.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: July 3, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Wu Park, Soon-Sang Park
  • Patent number: 9998084
    Abstract: A front-surface-side 3-terminal capacitor and a rear-surface-side 3-terminal capacitor are disposed respectively on a front surface and a rear surface of a circuit substrate at opposing positions. A first outer terminal and a second outer terminal of the front-surface-side 3-terminal capacitor are electrically connected to hot-side conductor patterns and, respectively. Third outer terminals and of the rear-surface-side 3-terminal capacitor are electrically connected to ground-side conductor patterns and, respectively. Third outer terminals and of the front-surface-side 3-terminal capacitor are electrically connected to a first outer terminal and a second outer terminal of the rear-surface-side 3-terminal capacitor by employing vias and, respectively. The front-surface-side 3-terminal capacitor and the rear-surface-side 3-terminal capacitor are thereby electrically connected in series.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: June 12, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Akio Kanezaki
  • Patent number: 9964586
    Abstract: In a testing circuit performing a testing operation to detect an RF circuit characteristic, a first filter unit is provided, having a first external terminal electrically coupled to a testing signal and a second external terminal electrically coupled to an RF circuit of the RF device. The first filter unit is configured to allow the testing signal to enter the RF circuit while blocking an RF signal transmitted in the RF circuit from entering the testing circuit. In addition, a testing-result informing unit is provided, having an external input electrically coupled to the first external terminal, and generating an informing signal, which indicates a condition of the RF circuit according to an electric level at the external input.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: May 8, 2018
    Assignee: ALPHA NETWORKS INC.
    Inventors: Rong-Fa Kuo, Ming-Chih Peng
  • Patent number: 9960746
    Abstract: Provided is an LC composite component having a multi-layer substrate, a pattern coil, and a chip capacitive element. The multi-layer substrate is configured such that insulating layers are stacked. The pattern coil forms a coiled shape of which the coil axis extends along a stacking direction of the multi-layer substrate, and includes a coil conductor disposed between the insulating layers. The chip capacitive element includes a ceramic body having a relative permittivity higher than that of the insulating layers and counter electrodes. The chip capacitive element is at least partially disposed within the pattern coil.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: May 1, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kuniaki Yosui, Takahiro Baba, Wataru Tamura
  • Patent number: 9947474
    Abstract: A multilayer capacitor includes a first grounding internal electrode including a first grounding electrode having a lead-out part led to one side surface of a stacked body, and a second grounding electrode having a lead-out part led to the other side surface; a second grounding internal electrode including a third grounding electrode which overlaps the first grounding electrode and has a lead-out part led to the other side surface, and a fourth grounding electrode which overlaps the second grounding electrode and has a lead-out part led to one side surface; and a signal internal electrode disposed between the first and second grounding internal electrodes, wherein the first and second grounding electrodes and the third and fourth grounding electrodes have, at their adjacent opposed sides, corners curved as seen in a plan view in the stacking direction, respectively, the corners being each located opposite to the corresponding lead-out part.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: April 17, 2018
    Assignee: KYOCERA CORPORATION
    Inventors: Kazuhiro Akada, Takafumi Nogi, Hidefumi Hatanaka
  • Patent number: 9935601
    Abstract: An LC parallel resonant element includes a first planar or substantially planar conductor on a first base material layer and second and third planar or substantially planar conductors on second and third base material layers. The first and third planar or substantially planar conductors extend over nearly the entire surfaces of the first and third base material layers. The second planar or substantially planar conductor extends over nearly the entire length of the second base material layer in a second direction such that a space from the other end portion of two end portions of a multilayer body in a first direction is provided. The first and third planar or substantially planar conductors are connected to each other by interlayer conductors near the other end portion of the multilayer body. The first and second planar or substantially planar conductor are connected to each other by interlayer conductors near one end portion of the multilayer body.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: April 3, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Wataru Tamura, Kuniaki Yosui, Jun Sasaki, Noboru Kato
  • Patent number: 9935602
    Abstract: In a laminated LC filter, at least four LC parallel resonators are provided inside a multilayer body. At least a pair of loops of inductors in odd numbered-stage LC parallel resonators among the at least four LC parallel resonators are disposed at an angle at which magnetic coupling is obtained therebetween, and winding directions thereof are the same, so as to obtain magnetic coupling between the inductors. In addition, magnetic coupling may also be obtained between a pair of loops of inductors in even numbered-staged LC parallel resonators among the at least four LC parallel resonators.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: April 3, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsutoshi Imamura
  • Patent number: 9935603
    Abstract: In a laminated LC filter, at least four LC parallel resonators are provided inside a multilayer body. At least a pair of loops of inductors in odd numbered-stage LC parallel resonators among the at least four LC parallel resonators are disposed at an angle at which magnetic coupling is obtained therebetween, and winding directions thereof are the same, so as to obtain magnetic coupling between the inductors. In addition, magnetic coupling may also be obtained between a pair of loops of inductors in even numbered-staged LC parallel resonators among the at least four LC parallel resonators.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: April 3, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsutoshi Imamura
  • Patent number: 9935252
    Abstract: A system for adjusting qubit frequency includes a qubit device having a Josephson junction and a shunt capacitor coupled to electrodes of the Josephson junction. A cantilevered conductor is separated from the shunt capacitor by a spacing. An adjustment mechanism is configured to deflect the cantilevered conductor to tune a qubit frequency for the qubit device.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: April 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, Jerry M. Chow, Jay M. Gambetta, John A. Smolin
  • Patent number: 9929710
    Abstract: A laminated composite electronic device has a circuit including a coil and a capacitor within a laminate having a plurality of conductor layers laminated with an insulating layer interposed between the respective ones of the conductor layers. The device includes a coil conductor arranged on a first conductor layer and forming part of the coil, and a pair of capacitor electrodes for forming the capacitor, one of which is arranged on a second conductor layer such that the one capacitor electrode laps over the coil conductor when viewed from a laminating direction of the laminate, wherein the coil conductor forms part of the coil, and simultaneously serves as the other of the pair of capacitor electrode for forming part of the capacitor.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: March 27, 2018
    Assignee: TDK Corporation
    Inventors: Masamichi Tanaka, Tomokazu Ito
  • Patent number: 9911531
    Abstract: A common mode filter includes a substrate; an insulating layer disposed on the substrate and including coil patterns, the insulating layer having a cavity disposed in a central portion therein; and a magnetic particle-resin composite layer including a core part filling the cavity and a cover part covering the insulating layer. The core part contains fine magnetic particles having an average particle diameter of 30 ?m or less, and the cover part contains the fine magnetic particles having the average particle diameter of 30 ?m or less and coarse magnetic particles having an average particle diameter greater than that of the fine magnetic particles.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: March 6, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Wook Park, Kwang Mo Kim, Sang Moon Lee