Abstract: Adaptive equalization system for allowing the equalization of a base-band line of a DCE, includes an adaptive filter for adjusting its coefficients in accordance with an adaptive algorithm. The equalizer includes controls to work during a preliminary period, in an adaptive or non-adaptive mode according to the convergence of the recursive algorithm process. The algorithm is triggered depending on whether the equalized signal belongs to one of several predefined intervals of convergence. After this preliminary period, when the mean square of the residual error is considered small enough to ensure the convergence of the adaptive process, the algorithm is computed on a continuous mode.

Abstract: A modified branch line coupler amplitude equalizer circuit employing cross arms and branch lines of varying lengths and impedances to minimize the return loss of the circuit.

Abstract: To compensate for nonlinear signal distortions in analog optical communication transmission systems, caused by laser chirps and the chromatic dispersion of the optical fiber, an equalizer in the form of an LC component is known, whose capacitance is formed by a variable capacitance diode. However, the known equalizer functions only when the capacitance has the proper polarity, which cannot be predicted because of possible polarity inversion during signal transmission. According to the invention, the variable capacitance diode (C.sub.a) has another variable capacitance diode (C.sub.b), with the opposite polarity, connected in parallel, and is equally biased in the high-resistance direction. By adjusting the bias voltage of both capacitances, it can be achieved that one of the two variable capacitance diodes takes over the equalization function, and the other is practically inoperative.

Abstract: An equalizer circuit for equalizing RF frequencies implemented as an MMIC or MIC having a series of microstrip transmission lines between an RF input terminal and an RF output terminal and having at least one shunt path comprised of a series combination of a FET able to be switched between a conducting state and a nonconducting state and a stud tuner microstrip transmission line, wherein the FET is used as a voltage variable resistor to selectively de-Q the stub tuner and thereby control the depth of the equalization curve. In a modified embodiment, artificial transmission lines which include a plurality of inductive elements and FETs are coupled to each shunt path, wherein the shunt paths may be selectively shorted by changing the state of the FETs, thereby permitting the center frequency of the equalizer circuit to be shifted as well.

Abstract: In a channel impulse response estimator (12), a local preamble generator (35) generates a local preamble signal identical with a transmission preamble signal in a received signal. A preamble detector (37) detects the transmission preamble signal in an estimated sequence signal to produce a preamble detection signal. Responsive to the preamble detection signal, a sequence selector (39) selects one of the local preamble signal and the estimated sequence signal as a selected sequence signal which is supplied to a re-modulator (14). Responsive to the preamble detection signal, a step-size generator (41) generates one of first and second step-size signals as a selected step-size signal which is supplied to a tap coefficient producer (26).

Abstract: A fast settling, wide dynamic range vector modulator for use in an interference cancellation system or the like includes a quadrature hybrid which receives an RF signal and divides the signal into a primary in-phase component signal and a primary quadrature phase component signal. A first 180.degree. hybrid receives the primary in-phase component signal and provides first and second secondary in-phase component signals which are 180.degree. out of phase with each other. A second 180.degree. hybrid receives the primary quadrature phase component signal and provides first and second secondary quadrature phase component signals which are 180.degree. out of phase with each other. A first switching device selects one of the first and second secondary in-phase component signals, and a second switching device selects one of the first and second secondary quadrature phase component signals.

Abstract: In an automatic cable attenuation compensation system comprising a fixed compensation part (FC-R/G/B) providing a stepwise adjustable attenuation compensation for substantially compensating cable attenuation, the stepwise adjustable attenuation compensation of the fixed compensation part being set after power-up, an adaptive compensation part (VC-R/G/B) is provided for a continuously active compensation for a further accurate compensation of the cable attenuation.

Abstract: An adaptive equalization circuit which has first path that includes a boost stage and a first variable gain stage and a second path that includes a second variable gain stage. The first path generates a fully equalized signal in response to an input signal while the second path generates an unequalized signal in response to the input signal. A summing stage combines the fully equalized signal and the unequalized signal to produce an equalized output signal.

Abstract: A sound recording apparatus for use in video tape recorders, for equalizing a sound signal before the sound signal is recorded onto a recording medium includes an operational amplifier where the sound signal is inputted to its first input terminal, a feedback resistor connected to an output terminal and a second input terminal of the operational amplifier, and a simulated inductor circuit connected to the second input terminal of the operational amplifier. The simulated inductor circuit has a buffer where a predetermined bias is provided to its input. Between an output of the buffer and the second input terminal of the operational amplifier is connected an impedance network whose circuit constant is switched by a switch which operates according to a recording speed mode of the video tape recorder. This switching changes an equalizing characteristic of the amplifier.

Abstract: A method and apparatus are disclosed for imparting a linear, but sloped, frequency response signal to a narrowband signal having a sinusoidal component at .omega..sub.0 radians per second. An illustrative embodiment comprises: a first signal divider, a first signal combiner and three signal paths between them. The first signal path advantageously comprises a first bi-phase attenuator; the second signal path advantageously comprises a first delay element; and the third signal path advantageously comprises both a second bi-phase attenuator and a second delay element. The first delay element preferably makes the second signal path substantially close to ##EQU1## seconds longer than the first signal path, where N is an integer. The second delay element preferably makes the third signal path substantially close to ##EQU2## seconds longer than the first signal path.

Abstract: A two stage accumulator is provided for updating coefficients. The accumulator is particularly useful in an adaptive equalizer. A first stage of the accumulator receives an error word and outputs sign and carry bits resulting from the addition of the error word and an N-bit LSB portion of a larger M-bit coefficient. A second stage is responsive to the sign and carry bits for updating the (M-N) MSB's of the M-bit coefficient. New error words are cyclically provided to the first stage during successive coefficient update cycles. The first stage can be implemented using an N-bit twos complement adder. The second stage can be implemented using an up/down counter. A leakage function is provided by causing the up/down counter to periodically skip over increment and decrement cycles.

Abstract: An adjustable impedance-correcting delay line adapted to form a standard line for providing an adjustable group delay time for measurement purposes or the like in which a plurality of different delay networks including coaxial segments of different lengths with or without damping compensating amplifiers can be selectively connected in the cascade or shunted. A bridge circuit can be provided with fundamental damping and delay time for bridging with the standard delay line where difference measurements are of interest.

Abstract: For use in combination with a demodulator (23) for demodulating a received signal susceptible to fading into a demodulated signal, an adaptive equalizer comprises a fading detecting circuit (51) for detecting the received signal to produce a detection signal representative of a magnitude of the fading. Into a processed signal and supplied with the detection signal, an equalizer multiplier (53) processes an equalized signal produced in an equalizer section (25, 26 and 27) which is for carrying out a predetermined equalization operation. In accordance with the processed signal, an automatic gain control circuit (52) modifies the demodulated signal into a modified signal on which the predetermined equalization operation is carried out.

Abstract: To compensate for nonlinear distortions in analog optical communication transmission systems, caused by laser chirps and the chromatic dispersion of the optical fiber, an equalizer in the form of an LC component is known, whose capacitance is formed by a variable capacitance diode. If this equalizer is to be adjusted for considerable signal distortions (long transmission path length), it must operate at great capacitance, which reduces its bandwidth. In order to be able to equalize large bandwidth signals (e.g. 600 MHz) containing considerable distortions, the invention indicates an LC chain circuit with LC components of the known type, as the equalizer. Further developments of this solution concern the appropriate polarizing of the variable capacitance diode and maintaining the frequency response constant, when adjusting the equalization.

Abstract: A tri-phase combiner/splitter system that has similar advantages to presently available binary combiner/splitter systems which uses quadrature couplers. Notably, the combiner input Voltage Standing Wave Ratio ("VSWR") remains at 1:1 for identical mismatch impedance at the output ports. There is also a complete cancellation of back-door intermodulation components for identical output device nonlinearities. An innovative wideband, 0.degree. three way combiner/splitter is the basic building block of the present invention. To achieve equal port impedances, a new wideband transmission line transformer is used. By using 60.degree. or 120.degree. phase equalization networks at the three, 0.degree. output ports, this device is converted to a wideband tri-phase combiner.For moderate bandwidths, a coupled transmission line version is possible using meandering strip lines in the same fashion used in quadrature coupler design.

Abstract: The present invention is an equalizer circuit for RF frequencies comprising a microstrip transmission line having a stub tuner extending transversely therefrom and further having resistive means coupled to the stub tuner to de-Q the stub tuner, thereby selectively determining an attenuation profile for the equalizer circuit.

Abstract: Equalizing amplifying circuitry for compensating frequency dependent losses occurring in a signal transmitted over a network such as a cable. The circuitry includes an equalizing network responsive to the signal transmitted over the cable, the equalizing circuitry having a predetermined frequency response characteristic. The output signal from the equalizing network is applied to an amplifier and an attenuator applies a portion of the amplifier output as a positive feedback signal to frequency response characteristic modifying circuitry to vary the amount of current passing through the equalizing circuitry as a function of the amplitude of the positive feedback signal to thereby effectively modify the frequency response characteristic of the equalizing circuitry.

Abstract: A circuit for compensating for GaAs FET amplifier gain variations over a frequency band as a function of temperature. The circuit includes a passive equalizer circuit having a fixed gain over the frequency band and an active equalizer circuit having a gain which varies over the frequency band as a function of temperature. The passive and active equalizers are coupled in series. The active equalizer circuit comprises varactor diodes in a low pass filter arrangement with the bias voltage of the varactor being provided by an external driver controlled by a temperature sensitive thermistor. As the value of the varactor's junction capacitance is increased (as a function of the temperature controlled bias voltage), the cutoff frequency of the low pass filter decreases.

Abstract: An automatic equalizer for use with a recording and/or reproducing apparatus or with a communication transmission channel, wherein equalizer parameters are rendered variable and the degree of change of the error rate is extracted to set the parameters to optimum values based on the degree of change of the error rate. Output signal error rates are sequentially detected at a plurality of measurement points corresponding to preset plural characteristic parameters to find a minimum error rate measurement point. An initial parameter setting operation is performed for providing characteristic parameters for this measurement point to the equalizer as the initial parameter.

Abstract: A first filter the group delay of which in the pass band contains a ripple is connected to a second filter so as to cancel the ripple. The second filter has a pass band at least within the pass band of the first filter. The gain of the second filter is reduced gradually from the frequency of the minimum attenuation into the lower and higher frequency regions and the group delay thereof is reduced gradually from the frequency of the minimum attenuation into the lower and higher frequency regions.

Abstract: A microwave equalizer is used in aerospace applications to correct the gain/frequency response of a microwave system, in particular in a given range of temperatures. To obtain a variation opposite to that of the microwave system by introducing absorption at the operating frequency, it comprises at least one microwave coupler one branch of which has an active device fitted at each of its two ends so that variation in the device parameters enables displacement of the absorption frequency and optionally power. The coupler(s) are coupled to a transmission line of the system and a control circuit.

Abstract: An integrated circuit digital signal processor (DSP) including a bump equalizer and a slope equalizer and method of implementing an equalizer in an integrated circuit digital signal processor (DSP) are provided. The memory size of the DSP and the size of numbers storable in the DSP prevent simply storing the required coefficients. The method reduces the quantity of numbers which must be stored and scales the numbers to allow their storage in the DSP.

Abstract: A parallel optical data transmission device has an optical signal emitting unit, an optical signal reception unit and a parallel optical signal transmission cable for optically coupling therebetween. The optical signal emitting unit has an array of semiconductor lasers, whereas the reception unit has an array of semiconductor photodetectors of the same number. The transmission cable essentially consists of optical fibers bundled together. In the optical signal emitting unit, electrical drive signal transfer lines for the lasers have a stair-step bending pattern such that their transmission lengths sequentially vary.

Abstract: Equalizer which includes a filter for compensating the frequency attenuation of the received signal transmitted by a Data circuit terminating equipment DCE through a base-band telecommunication line. The equalizer includes a detector determining the instants when the received signal is equal to a predetermined voltage reference value Vref and a timer for measuring the period DT separating two consecutive instants. The coefficients of the filters included in the equalizer are computed in accordance with the measured period DT. This provides an adaptive compensation of the distortion introduced by the telecommunication line without necessitating any training sequence. For this purpose, the equalizer further includes a comparator for comparing the measured DT value to a given DTref value. When the former is greater than the latter, the equalization process is increased by a factor depending on DTref, DTmax being the maximum measured value and DTmin corresponding to the minimum measured DT value.

Abstract: A transversal equalizer having a specified number of rear taps. The transversal equalizer includes a first transversal equalizer unit which receives input signals through a first input terminal, equalizes their waveforms, and outputs the equalized signals as cascaded signals and a second transversal equalizer unit which receives the cascade output signals and also receives input signals and outputs an equalized signal derived from the input signals.

Abstract: A method and apparatus for equalizing high frequency video signals is disclosed. A video signal to be equalized is received at an input terminal of a network and an equalized video signal is provided from an output of an operational amplifier to an output terminal of the network. The equalized video signal is fedback to one input of the operational amplifier. The video signal to be equalized is coupled to another input of the operational amplifier and is also coupled to respective ones of a plurality of alterable circuit elements such as varactor diodes, which function to mitigate distortions to the frequency response characteristic of the video signal to be equalized by cancelling the effect thereon by the video signal to be equalized.

Abstract: Apparatus and a method are disclosed for providing a microwave attenuator system using distributed (transmission line) reactive elements to achieve a reduction in the transmitted electrical signal amplitude. The attenuator system includes a fixed attenuator unit and an adjustable attenuator unit. The fixed attenuator unit contains a "T" resistive attenuator component. Transmission line resonator components are added to the attenuator component to provide frequency selectively. The transmission line resonator components are coupled to the resistive attenuator component in such a way as not to compromise the impedance match of the transmission line. The step adjustable loss component includes shunt transmission lines coupled to the center conductor of the transmission line by means of a spring contacting mechanism. The shunt transmission lines include preselected resistive elements.

Abstract: An equalizer (10) for removing parabolic phase distortion from an analog signal (3), utilizing a pair of series connected transversal filters. The parabolic phase distortion is cancelled by generating an inverse parabolic approximation using a sinusoidal phase control filter (18). The signal (3) is then passed through an amplitude control filter (21) to remove magnitude ripple components.

Abstract: An equalizer circuit having a medium and high frequency correction circuits having a characteristics that a phase of an input aural signal advances as a frequency of the aural signal is increased in a higher frequency range than the 1 KHz and a circuit constant which advances a phase of the frequency from about 1 KHz to 5 KHz relatively and a low frequency correction circuit having a characteristic that a phase of the input aural signal is delayed as the frequency of the aural signal is lowered in a lower frequency range than about 1 KHz and a circuit constant having a reverse characteristic to a peak of a resonance frequency of the sound field to be regenerated.

Abstract: A three terminal compensation network for frequency dependent attenuation has a control terminal, an input terminal, and an output terminal. The network is particularly useful for an off-premises CATV system for slope compensation of a broadband television signal. The control terminal is supplied with a voltage indicative of the amount and direction of the slope in the actual television signal. The voltage oppositely biases a set of diodes which are used as controlled resistances in a pair of tuned circuits in the network. One series tuned circuit provides for varying degrees of negative slope compensation and a parallel tuned circuit provides for varying degrees of positive slope compensation. The network elements are connected in a modified bridge T configuration such that the characteristic impedance of the CATV system (75 ohms) can be approximately matched for the input and output of the broadband television signal.

Abstract: A transmission line transformer (20, 30, 31) with inherent DC isolation has two sets (22, 22') of transmission line elements (ZN) with characteristic impedances which vary from relatively high values near the transformer inputs (P1, P2) to relatively low values near an intermediate location (28, 28') are ordered in a mirror image symmetry with respect to one another relative to the intermediate location (28, 28') in plural element embodiments (20, 30). The primaries (24, 24') are connected in series, while the secondaries (26, 26') of adjacent pairs of transmission line elements (ZN, ZN') are connected in series with the series connected pair connected in parallel across the output terminals (P3, P4). A center line transmission element (CZN) at the intermediate location (28') has a substantial zero impedance, and an electrical length equal to twice that of the other elements.

Abstract: A frequency response equalizer, particularly for wideband networks, whose purpose is to reduce the influence of parasitic capacitances on the frequency behavior, includes the series arrangement of a first coil, a capacitor, a resistor and a second coil, in parallel with a series resistor, in which series arrangement the coils constitute a bifilarly wound transformer. The transformer includes two main inductances and two leakage sub-inductances, in series with the resistor and the capacitor, being arranged in parallel with the series resistor as an active series resonant circuit.

Abstract: A frequency equalizer is provided for suitably correcting a frequency characteristic of a signal transmitted through a signal transmitting system such as a coaxial cable and the like. The frequency equalizer has a plurality of serially connected fundamental circuits in each of which an input signal is processed by a series circuit of a multiplying circuit and an amplifier having its own frequency characteristic to generate a first signal, the input signal is separately processed by an amplifier having a flat frequency characteristic to generate a second signal and the first and second signals are added or subtracted to derive an output signal. Therefore, a desired frequency characteristic can be corrected with ease only by setting the frequency characteristics of the plurality of fundamental circuits to proper frequency characteristics. Also, the circuit arrangement is formed of a building block system and therefore can be fabricated as an integrated circuit (IC).

Abstract: A dual mode LMS channel equalizer is disclosed. The inventive channel equalizer utilizes an LMS algorithm to both identify channel parameters and to smooth the received data signal to mitigate the effects of channel additive noise. In real time operation, the inventive equalizer first identifies the channel parameters in a training period. Thereafter, the same LMS algorithm is switched to smooth the received data signal, while intermittently, the LMS algorithm is switched back to track the slowly changing channel parameters. In comparison with the conventional LMS adaptive channel equalizer, the inventive dual mode channel equalizer achieves a significant performance improvement at little additional cost.

Abstract: A method of an apparatus for decision feedback equalization, capable of dealing with time reversal for the transmission characteristic arising in a course of equalization. Without a considerable increase of the number of taps used and the resulting reduction of the response speed. In this apparatus, a number of feedforward taps for providing a forward part and a number of feedback taps for providing a feedback part are controlled according to whether the transmission signal is to be read in a normal time direction or in a reversed time direction; the forward part and the feedback part are added; and the digital transmission signal is reconstructed according to a result of the addition.

Abstract: An adaptive polarization combining system automatically adjusts the polarization of a polarization diverse antenna to match that of the incoming RF signal, thereby maximizing the received signal-to-noise ratio. Signals from the orthogonally polarized ports of the antenna are passed through a variable combiner circuit which is adjusted to maximize the combined signal at a single output port. Sample signals from each antenna port are provided to a calibration circuit which obtains phase and amplitude information from the two orthogonally polarized received signals and uses this information to control the combiner circuit phase shifters to adapt the combiner circuit to the polarization of the received signals. Therefore, the combining system can rapidly adapt electronically to polarization changes in the received signals.

Abstract: An equalizer characteristic of an amplitude equalizer for use in a modulating and demodulating device (MODEM) can be set with considerable ease. One of a plurality of equalization characteristics assigned to an amplitude equalizer is set by generating and feeding to a transmission line a plurality of reference signals at the same level but with respectively-different frequencies. Each of such respective reference signals are received from the transmission line, separated, and measured as to its reception level. Level errors are then determined between each measured reception level and an estimated reception level previously determined in association with a respective one of the equalization characteristics. A selection and setting is then made of one of the equalization characteristics that is associated with one of the estimated receptions levels having the smallest level error.

Abstract: An equalizer for equalizing an input data signal of a digital transmission filter for jitter, overshoot and undershoot in amplitude includes a delay circuit which delays an input non-return-to-zero (NRZ) data signal a specified number of bits by synchronizing the input data signal with a basic clock signal, and outputs a plurality of delayed data bit streams each corresponding to a respective delay element of the delay circuit. The delayed data bit streams are input to a logic circuit which produces a plurality of voltage control signals corresponding to patterns of logic symbols in the data bit streams of the delayed input data signal, these voltage control signals designating information as to how much the delayed input data signal will be distorted due to data signals adjacent thereto upon passing through a digital transmission filter.

Abstract: A transversal equalizer is realized by employing variable gain and delay in the amplification branches of a traveling wave amplifier. Specifically, by adjusting the gain and delay in each branch, the traveling wave type transversal equalizer may be adjusted to having a complementary frequency response in order to compensate for linear channel gain and phase ripples. This approach permits the transversal equalizer to be designed without the use of resistive splitter and combiner networks and, therefore, without the use of high gain amplifiers. Without such amplifiers, splitters and combiners, the smaller physical size, which is afforded thereby, allows the transversal equalizer to be easily assembled as a hybrid integrated circuit.

Abstract: A SAW device tapped delay line includes an apodized input IDT (inter-digital transducer) and a plurality of substantially identical unapodized output IDTs arranged to receive, after delays which successively increase by an amont T, a SAW propagated from the input IDT. Each output IDT is terminated with a low impedance which is constituted by the low input impedance of a buffer amplifier, to minimize acoustic regeneration by the output IDTs. Grounded dummy fingers with the same metallization ratio as the output IDTs are provided between adjacent output IDTs to provide a constant SAW velocity. The delay line is particularly suited to use in an equalizer of a microwave radio transmission system, in which the delay T is the inverse of the symbol rate of the system. Intermediate frequency automatic time domain equalizer (IF ATDE) arrangements using the SAW device tapped delay line are described.

Abstract: A digital decision feedback equalizer is disclosed in which compensation for the post-cursors of the impulse response of the transmission channel is divided up into two regions. A first region encompasses the initial rapidly changing unpredictable transient response, possibly oscillatory, of the transmission channel. A fast acting, close-tracking linear filter is used to compensate for this largely unpredictable initial transient. The second region of the impulse response is the slowly changing, easily predictable asymptotic tail of the impulse response. This second region can be compensated for by a relatively slow acting, simple pole-zero filter. Together, the two equalizer sections provide an overall equalizer design far less complicated and less expensive than an equalizer based on a single linear compensating filter.

Abstract: Apparatus for compensating component audio signals comprises amplifier means and a gain control circuit for selectively adjusting the gain of the amplifier means in response to data values received by the gain control circuit. The apparatus has power supply terminals for supplying operating current from an external power source to the amplifier and the gain control circuit. In addition, the apparatus comprises an electronic storage device for storing data values and applying those data values to the gain control circuit. The stored data values are maintained in the apparatus upon interruption of the supply of operating current to the power supply terminals. The apparatus has an input port for applying data values to the storage device, and does not have manually actuable controls for selectively adjusting the stored data values.

Abstract: Circuitry is disclosed which compensates for magnitude and phase variations in the transfer function of a transmission medium. The medium is characterized by amplitude and phase variations in its transfer function wherein the amplitude variations produce increasing loss in the medium as frequency increases. The circuitry possesses an inverse characteristic to these variations, thereby generating a relatively flat magnitude characteristic for the medium-circuitry combination. The circuitry includes a buffer amplifier that receives a portion of an input signal, a network coupled to the amplifier and having zero-pole pairs in its signal transfer function, and a summer which has both the input signal and the output of the network as inputs. Accordingly, the compensation circuit has an overall transfer function which has fixed poles but adjustable zeros, these zeros being dependent on the amplifier gain and the portion of the input signal applied to the amplifier.

Abstract: A microwave frequency group delay corrector operates by reflecting the microwave on a correcting complex impedance (jx). It makes use of a power divider (13), of the Wilkinson type. The complex impedance (20) is connected to the port (14) which is normally the inlet port to the power divider (13). The microwave (E) is applied to one of the other two ports (15), and the remaining other port (16) is used as the port from which the phase corrected outlet microwave (S) is taken.

Abstract: A phase shifter providing constant group delay and a wide instantaneous bandwidth is taught. In one embodiment, an input port is connected to an output port with a power splitter formed of a transformer connected between the input port and the output port, and having a center tap serving as a sum port. An impedance, such as a resistor, is connected in parallel with the transformer between the input port and the output port. A reactive network is connected between the sum port and ground, including one or more variable reactance device, such as a varactor, which alter the reactance of the reactive network in response to a control signal. Additional reactive elements are included in the reactive network to provide additional poles and zeros which change frequency in response to the variable reactance elements, in order to provide a group delay which is constant for various reactance values provided by the reactive network between the lowest frequency of interest and a higher frequency of interest.

Abstract: An apparatus monitors the convergence of the equalization training sequence in a multipoint communication network. Various latches record the period of the incoming sequence and the time to convergence, if any. A counter records the number of periods free of convergence, and upon the counter exceeding a threshold, the network train time is doubled. A register records the longest required time to convergence. This value is periodically compared to the network train time, and, if less, substituted therefor.

Abstract: This disclosure depicts an equalizer circuit having input and output terminals and a reference terminal for receiving a reference voltage. The equalizer circuit comprises a first operational amplifier which has a positive input operatively connected to the input terminal and which also has a negative input and an output. A first adjustable resistive means has a first terminal operatively connected to the negative input of the first operational amplifier a second terminal operatively connected to the output of the first operational amplifier has a reference connection operatively connected to the reference terminal and has a third terminal. A second operational amplifier has a positive input operatively connected to the third terminal of the first adjustable resistive means, has a negative input and has an output operatively connected to the output terminal.

Abstract: A MMIC variable slope gain-equalizer varies the conductance of depletion mode Schottky gate FETs to controllably insert frequency dependent resonant members in a modified bridged-T configuration. Resistors connected from circuit input port to output port define the arms of the "T" and a T-node to which a first frequency dependent resonant member is connected in series with a first FET. A second FET and a second frequency dependent resonant member are each connected in series between the circuit ports, bridging the T. Preferably a third frequency dependent resonant member is series connected with the second frequency dependent member. Each frequency dependent resonant member resonates at about the highest frequency of interest, typically about 18 GHz. When the first FET is on and the second FET off, maximum attenuation at lower frequencies is inserted into the circuit, and when the first FET is off and the second FET on, minimum attenuation is inserted at lower frequencies.

Abstract: This invention covers a phase shifter-equalizer circuit including a purely resistive impedance, a purely reactive impedance, at least one of which adjustable, and a phase inverter device, which permit to adjust in a continuous way the phase between the output current and the input current, while maintaining the amplitude of the output current constant and substantially equal to the amplitude of the imput current versus phase and group delay variations between the two currents. Furthermore, continuous phase adjustment is achieved by adjusting one only parameter of the circuit.

Abstract: An amplitude equalizer which adds the outputs of two circuit means having opposite characteristics, whereby a flat delay-frequency characteristic and powerful frequency-amplitude characteristic are obtained. Further, a variable amplitude equalizer including two of the same connected in parallel and a variable attenuator inserted in one of the parallel paths. Still further, an automatic amplitude equalizer wherein the variable attenuator is feedback controlled by an equalization residual. The amplitude equalizer includes a minimum phase circuit and non-minimum phase circuit connected in series.